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SEMICONDUCTOR TECHNICAL DATA
1
REV 0.2
Motorola, Inc. 1995
9/95
& $ %
!%$ $
$ "$ !%$#
The MC74LCX00 is a high performance, quad 2–input NAND gate
operating from a 2.7 to 3.6V supply. High impedance TTL compatible
inputs significantly reduce current loading to input drivers while TTL
compatible outputs offer improved switching noise performance. A VI
specification of 5.5V allows MC74LCX00 inputs to be safely driven from
5V devices.
Current drive capability is 24mA at the outputs.
•
Designed for 2.7 to 3.6V VCC Operation
•
5V Tolerant Inputs — Interface Capability With 5V TTL Logic
•
LVTTL Compatible
•
LVCMOS Compatible
•
24mA Balanced Output Sink and Source Capability
•
Near Zero Static Supply Current (10
µ
A) Substantially Reduces System
Power Requirements
•
Latchup Performance Exceeds 500mA
•
ESD Performance: Human Body Model >2000V; Machine Model >200V
Pinout: 14–Lead (Top View)
13
14
12
11
10
9
8
2
1
3
4
5
6
7
VCC
A2
B2
O2
A3
B3
O3
A0
B0
O0
A1
B1
O1
GND
3
O0
1
A0
LOGIC DIAGRAM
2
B0
6
O1
4
A1
5
B1
11
O2
13
A2
12
B2
8
O3
10
A3
9
B3
This document contains information on a product under development. Motorola reserves the right to
change or discontinue this product without notice.
DT SUFFIX
PLASTIC TSSOP
CASE 948G–01
14
1
SD SUFFIX
PLASTIC SSOP
CASE 940A–03
14
1
M SUFFIX
PLASTIC SOIC EIAJ
CASE 965–01
14
1
D SUFFIX
PLASTIC SOIC
CASE 751A–03
14
1
PIN NAMES
Function
Data Inputs
Outputs
Pins
An, Bn
On
LOW–VOLTAGE CMOS
QUAD 2–INPUT NAND GATE
L
L
H
H
L
H
L
H
Inputs
Outputs
An
Bn
H
H
H
L
On
FUNCTION TABLE
MC74LCX00
MOTOROLA
Low–Voltage CMOS Data
BR1339 — Rev 2
2
ABSOLUTE MAXIMUM RATINGS*
Symbol
Parameter
Value
Condition
Unit
VCC
DC Supply Voltage
–0.5 to +7.0
V
VI
DC Input Voltage
–0.5
≤
VI
≤
+7.0
V
VO
DC Output Voltage
–0.5
≤
VO
≤
VCC + 0.51
Output in HIGH or LOW State
V
IIK
DC Input Diode Current
–50
VI < GND
mA
IOK
DC Output Diode Current
–50
VO < GND
mA
+50
VO > VCC
mA
IO
DC Output Source/Sink Current
±
50
mA
ICC
DC Supply Current Per Supply Pin
±
100
mA
IGND
DC Ground Current Per Ground Pin
±
100
mA
TSTG
Storage Temperature Range
–65 to +150
°
C
* Absolute maximum continuous ratings are those values beyond which damage to the device may occur. Exposure to these conditions or
conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute–maximum–rated conditions is
not implied.
1. IO absolute maximum rating must be observed.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
Typ
Max
Unit
VCC
Supply Voltage
Operating
Data Retention Only
2.0
1.5
3.3
3.3
3.6
3.6
V
VI
Input Voltage
0
5.5
V
VO
Output Voltage
(HIGH or LOW State)
0
VCC
V
IOH
HIGH Level Output Current, VCC = 3.0V – 3.6V
–24
mA
IOL
LOW Level Output Current, VCC = 3.0V – 3.6V
24
mA
IOH
HIGH Level Output Current, VCC = 2.7V – 3.0V
–12
mA
IOL
LOW Level Output Current, VCC = 2.7V – 3.0V
12
mA
TA
Operating Free–Air Temperature
–40
+85
°
C
∆
t/
∆
V
Input Transition Rise or Fall Rate, VIN from 0.8V to 2.0V,
VCC = 3.0V
0
10
ns/V
DC ELECTRICAL CHARACTERISTICS
TA = –40
°
C to +85
°
C
Symbol
Characteristic
Condition
Min
Max
Unit
VIH
HIGH Level Input Voltage (Note 1)
2.7V
≤
VCC
≤
3.6V
2.0
V
VIL
LOW Level Input Voltage (Note 1)
2.7V
≤
VCC
≤
3.6V
0.8
V
VOH
HIGH Level Output Voltage
2.7V
≤
VCC
≤
3.6V; IOH = –100
µ
A
VCC – 0.2
V
VCC = 2.7V; IOH = –12mA
2.2
VCC = 3.0V; IOH = –18mA
2.4
VCC = 3.0V; IOH = –24mA
2.2
VOL
LOW Level Output Voltage
2.7V
≤
VCC
≤
3.6V; IOL = 100
µ
A
0.2
V
VCC = 2.7V; IOL= 12mA
0.4
VCC = 3.0V; IOL = 16mA
0.4
VCC = 3.0V; IOL = 24mA
0.55
1. These values of VI are used to test DC electrical characteristics only. Functional test should use VIH
≥
2.4V, VIL
≤
0.5V.
MC74LCX00
Low–Voltage CMOS Data
BR1339 — Rev 2
3
MOTOROLA
DC ELECTRICAL CHARACTERISTICS
(continued)
TA = –40
°
C to +85
°
C
Symbol
Characteristic
Condition
Min
Max
Unit
II
Input Leakage Current
2.7V
≤
VCC
≤
3.6V; 0V
≤
VI
≤
5.5V
±
5.0
µ
A
ICC
Quiescent Supply Current
2.7
≤
VCC
≤
3.6V; VI = GND or VCC
10
µ
A
CC
2.7
≤
VCC
≤
3.6V; 3.6
≤
VI
≤
5.5V
±
10
µ
A
∆
ICC
Increase in ICC per Input
2.7
≤
VCC
≤
3.6V; VIH = VCC – 0.6V
500
µ
A
AC CHARACTERISTICS1 (tR = tF = 2.5ns; CL = 50pF; RL = 500
Ω
)
Limits
TA = –40
°
C to +85
°
C
VCC = 3.0V to 3.6V
VCC = 2.7V
Symbol
Parameter
Waveform
Min
Max
Max
Unit
tPLH
tPHL
Propagation Delay
Input to Output
1
1.5
1.5
5.2
5.2
6.0
6.0
ns
tOSHL
tOSLH
Output–to–Output Skew
(Note 2)
1.0
1.0
ns
1. These AC parameters are preliminary and may be modified prior to release. The maximum AC limits are design targets. Actual performance
will be specified upon completion of characterization.
2. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device.
The specification applies to any outputs switching in the same direction, either HIGH–to–LOW (tOSHL) or LOW–to–HIGH (tOSLH); parameter
guaranteed by design.
DYNAMIC SWITCHING CHARACTERISTICS
TA = +25
°
C
Symbol
Characteristic
Condition
Min
Typ
Max
Unit
VOLP
Dynamic LOW Peak Voltage1
VCC = 3.3V, CL = 50pF, VIH = 3.3V, VIL = 0V
0.8
V
VOLV
Dynamic LOW Valley Voltage1
VCC = 3.3V, CL = 50pF, VIH = 3.3V, VIL = 0V
0.8
V
1. Number of outputs defined as “n”. Measured with “n–1” outputs switching from HIGH–to–LOW or LOW–to–HIGH. The remaining output is
measured in the LOW state.
CAPACITIVE CHARACTERISTICS
Symbol
Parameter
Condition
Typical
Unit
CPD
Power Dissipation Capacitance
10MHz, VCC = 3.3V, VI = 0V or VCC
25
pF
CIN
Input Capacitance
VCC = 3.3V, VI = 0V or VCC
7
pF
COUT
Output Capacitance
VCC = 3.3V, VI = 0V or VCC
8
pF
MC74LCX00
MOTOROLA
Low–Voltage CMOS Data
BR1339 — Rev 2
4
PROPAGATION DELAYS
tR = tF = 2.5ns, 10% to 90%; f = 1MHz; tW = 500ns
2.7V
0V
VOH
VOL
An, Bn
On
tPLH
tPHL
1.5V
1.5V
1.5V
1.5V
Figure 1. AC Waveforms
PULSE
GENERATOR
RT
DUT
VCC
RL
CL
CL = 50pF or equivalent (Includes jig and probe capacitance)
RL = R1 = 500
Ω
or equivalent
RT = ZOUT of pulse generator (typically 50
Ω
)
Figure 2. Test Circuit
MC74LCX00
Low–Voltage CMOS Data
BR1339 — Rev 2
5
MOTOROLA
OUTLINE DIMENSIONS
D SUFFIX
PLASTIC SOIC PACKAGE
CASE 751A–03
ISSUE F
MIN
MIN
MAX
MAX
MILLIMETERS
INCHES
DIM
A
B
C
D
F
G
J
K
M
P
R
8.55
3.80
1.35
0.35
0.40
0.19
0.10
0
°
5.80
0.25
8.75
4.00
1.75
0.49
1.25
0.25
0.25
7
°
6.20
0.50
0.337
0.150
0.054
0.014
0.016
0.008
0.004
0
°
0.228
0.010
0.344
0.157
0.068
0.019
0.049
0.009
0.009
7
°
0.244
0.019
1.27 BSC
0.050 BSC
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
–A
–
–B
–
P
7 PL
G
C
K
SEATING
PLANE
D
14 PL
M
J
R
X 45
°
1
7
8
14
0.25 (0.010)
T
B
A
M
S
S
B
0.25 (0.010)
M
M
F
M SUFFIX
PLASTIC SOIC EIAJ PACKAGE
CASE 965–01
ISSUE O
Z
D
HE
E
1
14
8
7
b
A1
A
e
L
DIM
MIN
MAX
MIN
MAX
INCHES
---
2.05
---
0.081
MILLIMETERS
0.05
0.20
0.002
0.008
0.35
0.50
0.014
0.020
0.18
0.27
0.007
0.011
9.90
10.50
0.390
0.413
5.10
5.45
0.201
0.215
1.27 BSC
0.050 BSC
7.40
8.20
0.291
0.323
0.50
0.85
0.020
0.033
1.10
1.50
0.043
0.059
0
0.70
0.90
0.028
0.035
---
1.42
---
0.056
A1
A
b
c
D
E
e
L
M
Z
HE
Q1
LE
_
10
_
0
_
10
_
LE
Q1
c
M
_
VIEW P
DETAIL P
NOTES:
1 DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2 CONTROLLING DIMENSION: MILLIMETER.
3 DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH OR PROTRUSIONS AND ARE MEASURED
AT THE PARTING LINE. MOLD FLASH OR
PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006)
PER SIDE.
4 TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
5 THE LEAD WIDTH DIMENSION (b) DOES NOT
INCLUDE DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08 (0.003)
TOTAL IN EXCESS OF THE LEAD WIDTH
DIMENSION AT MAXIMUM MATERIAL CONDITION.
DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OR THE FOOT. MINIMUM SPACE
BETWEEN PROTRUSIONS AND ADJACENT LEAD
TO BE 0.46 ( 0.018).
0.13 (0.005)
M
0.10 (0.004)
MC74LCX00
MOTOROLA
Low–Voltage CMOS Data
BR1339 — Rev 2
6
OUTLINE DIMENSIONS
DIM
A
MIN
MAX
MIN
MAX
INCHES
6.07
6.33
0.238
0.249
MILLIMETERS
B
5.20
5.38
0.205
0.212
C
1.73
1.99
0.068
0.078
D
0.05
0.21
0.002
0.008
F
0.63
0.95
0.024
0.037
G
0.65 BSC
0.026 BSC
H
1.08
1.22
0.042
0.048
J
0.09
0.20
0.003
0.008
J1
0.09
0.16
0.003
0.006
K
0.25
0.38
0.010
0.015
K1
0.25
0.33
0.010
0.013
_
_
_
_
NOTES:
6 DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
7 CONTROLLING DIMENSION: MILLIMETER.
8 DIMENSION A DOES NOT INCLUDE MOLD FLASH,
PROTRUSIONS OR GATE BURRS. MOLD FLASH
OR GATE BURRS SHALL NOT EXCEED 0.15
(0.006) PER SIDE.
9 DIMENSION B DOES NOT INCLUDE INTERLEAD
FLASH OR PROTRUSION. INTERLEAD FLASH OR
PROTRUSION SHALL NOT EXCEED 0.15 (0.006)
PER SIDE.
10 DIMENSION K DOES NOT INCLUDE DAMBAR
PROTRUSION/INTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.13 (0.005) TOTAL IN
EXCESS OF K DIMENSION AT MAXIMUM
MATERIAL CONDITION. DAMBAR INTRUSION
SHALL NOT REDUCE DIMENSION K BY MORE
THAN 0.07 (0.002) AT LEAST MATERIAL
CONDITION.
11 TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
12 DIMENSION A AND B ARE TO BE DETERMINED
AT DATUM PLANE –W–.
H
A
B
14
8
7
1
F
M
K
14X REF
S
U
M
0.12 (0.005)
V
S
T
L
L/2
PIN 1
IDENT
S
U
M
0.20 (0.008)
T
–V–
–U–
D
C
0.076 (0.003)
G
–T–
SEATING
PLANE
DETAIL E
DETAIL E
–W–
N
N
0.25 (0.010)
ÇÇÇÇ
ÇÇÇÇ
ÇÇÇÇ
ÇÇÇÇ
ÉÉÉÉ
ÉÉÉÉ
ÉÉÉÉ
ÉÉÉÉ
K
J
J1
K1
SECTION N–N
L
7.65
7.90
0.301
0.311
M
0
8
0
8
DT SUFFIX
PLASTIC TSSOP PACKAGE
CASE 948G–01
ISSUE O
DIM
MIN
MAX
MIN
MAX
INCHES
MILLIMETERS
A
4.90
5.10
0.193
0.200
B
4.30
4.50
0.169
0.177
C
–––
1.20
–––
0.047
D
0.05
0.15
0.002
0.006
F
0.50
0.75
0.020
0.030
G
0.65 BSC
0.026 BSC
H
0.50
0.60
0.020
0.024
J
0.09
0.20
0.004
0.008
J1
0.09
0.16
0.004
0.006
K
0.19
0.30
0.007
0.012
K1
0.19
0.25
0.007
0.010
L
6.40 BSC
0.252 BSC
M
0
8
0
8
NOTES:
1 DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2 CONTROLLING DIMENSION: MILLIMETER.
3 DIMENSION A DOES NOT INCLUDE MOLD FLASH,
PROTRUSIONS OR GATE BURRS. MOLD FLASH
OR GATE BURRS SHALL NOT EXCEED 0.15
(0.006) PER SIDE.
4 DIMENSION B DOES NOT INCLUDE INTERLEAD
FLASH OR PROTRUSION. INTERLEAD FLASH OR
PROTRUSION SHALL NOT EXCEED
0.25 (0.010) PER SIDE.
5 DIMENSION K DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN
EXCESS OF THE K DIMENSION AT MAXIMUM
MATERIAL CONDITION.
6 TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7 DIMENSION A AND B ARE TO BE DETERMINED
AT DATUM PLANE –W–.
_
_
_
_
S
U
0.15 (0.006) T
2X
L/2
S
U
M
0.10 (0.004)
V
S
T
L
–U–
SEATING
PLANE
0.10 (0.004)
–T–
ÇÇÇ
ÇÇÇ
ÇÇÇ
ÇÇÇ
SECTION N–N
DETAIL E
J J1
K
K1
ÉÉÉ
ÉÉÉ
ÉÉÉ
ÉÉÉ
DETAIL E
F
M
–W–
0.25 (0.010)
8
14
7
1
PIN 1
IDENT.
H
G
A
D
C
B
S
U
0.15 (0.006) T
–V–
14X REF
K
N
N
SD SUFFIX
PLASTIC SSOP PACKAGE
CASE 940A–03
ISSUE B
MC74LCX00
Low–Voltage CMOS Data
BR1339 — Rev 2
7
MOTOROLA
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Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit,
and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters can and do vary in different
applications. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. Motorola does
not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in
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associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part.
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are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer.
MC74LCX00/D
*MC74LCX00/D*
◊
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