SMSC USB3317 REV C
Revision 2.1 (06-02-10)
DATASHEET
Datasheet
PRODUCT FEATURES
USB3317
Hi-Speed USB Transceiver with
1.8V-3.3V ULPI Interface -
26MHz Reference Clock
USB-IF “Hi-Speed” compliant to the Universal Serial
Bus Specification Rev 2.0
Interface compliant with the ULPI Specification
revision 1.1 as a Single Data Rate (SDR) PHY
1.8V to 3.3V IO Voltage (±10%)
flexPWR
®
Technology
— Low current design ideal for battery powered
applications
— “Sleep” mode tri-states all ULPI pins and places the
part in a low current state
Supports FS pre-amble for FS hubs with a LS device
attached (UTMI+ Level 3)
Supports HS SOF and LS keep-alive pulse
Includes full support for the optional On-The-Go
(OTG) protocol detailed in the On-The-Go
Supplement Revision 2.0 specification
Supports the OTG Host Negotiation Protocol (HNP)
and Session Request Protocol (SRP)
Allows host to turn VBUS off to conserve battery
power in OTG applications
Support OTG monitoring of VBUS levels with internal
comparators
“Wrapper-less” design for optimal timing performance
and design ease
— Low Latency Hi-Speed Receiver (43 Hi-Speed clocks
Max) allows use of legacy UTMI Links with a ULPI
bridge
Internal 5V cable short-circuit protection of ID, DP
and DM lines to VBUS or ground
26MHz Reference Clock Operation
— 0 to 3.6V input drive tolerant
— Able to accept “noisy” clock sources
Internal low jitter PLL for 480MHz Hi-Speed USB
operation
Internal detection of the value of resistance to ground
on the ID pin
Integrated battery to 3.3V LDO regulator
— 2.2uF bypass capacitor
— 100mV dropout voltage
Integrated ESD protection circuits
— Up to
±
15kV without any external devices
Carkit UART mode for non-USB serial data transfers
Industrial Operating Temperature -40
°C to +85°C
Packaging Options
— 24 pin QFN lead-free RoHS compliant package
(4 x 4 x 0.90 mm height)
— 25 ball VFBGA lead-free RoHS compliant package also
available; (3 x 3 x 0.88mm height)
Applications
The USB3317 is targeted for any application where a Hi-
Speed USB connection is desired and when board
space, power, and interface pins must be minimized.
The USB3317 is well suited for:
Cell Phones
PDAs
MP3 Players
GPS Personal Navigation
Scanners
External Hard Drives
Digital Still and Video Cameras
Portable Media Players
Entertainment Devices
Printers
Set Top Boxes
Video Record/Playback Systems
IP and Video Phones
Gaming Consoles
POS Terminals
Order Number(s):
USB3317C-CP-TR FOR 24 PIN, QFN LEAD-FREE ROHS COMPLIANT PACKAGE (TAPE AND REEL)
USB3317C-GJ-TR FOR 25 PIN, VFBGA LEAD-FREE ROHS COMPLIANT PACKAGE (TAPE AND REEL)
REEL SIZE IS 4000 PIECES.
This product meets the halogen maximum concentration values per IEC61249-2-21
For RoHS compliance and environmental information, please visit
Hi-Speed USB Transceiver with 1.8V-3.3V ULPI Interface - 26MHz Reference Clock
Datasheet
Revision 2.1 (06-02-10)
2
SMSC USB3317 REV C
DATASHEET
80 ARKAY DRIVE, HAUPPAUGE, NY 11788 (631) 435-6000, FAX (631) 273-3123
Copyright © 2010 SMSC or its subsidiaries. All rights reserved.
Circuit diagrams and other information relating to SMSC products are included as a means of illustrating typical applications. Consequently, complete information sufficient for
construction purposes is not necessarily given. Although the information has been checked and is believed to be accurate, no responsibility is assumed for inaccuracies. SMSC
reserves the right to make changes to specifications and product descriptions at any time without notice. Contact your local SMSC sales office to obtain the latest specifications
before placing your product order. The provision of this information does not convey to the purchaser of the described semiconductor devices any licenses under any patent
rights or other intellectual property rights of SMSC or others. All sales are expressly conditional on your agreement to the terms and conditions of the most recently dated
version of SMSC's standard Terms of Sale Agreement dated before the date of your order (the "Terms of Sale Agreement"). The product may contain design defects or errors
known as anomalies which may cause the product's functions to deviate from published specifications. Anomaly sheets are available upon request. SMSC products are not
designed, intended, authorized or warranted for use in any life support or other application where product failure could cause or contribute to personal injury or severe property
damage. Any and all such uses without prior written approval of an Officer of SMSC and further testing and/or modification will be fully at the risk of the customer. Copies of
this document or other SMSC literature, as well as the Terms of Sale Agreement, may be obtained by visiting SMSC’s website at http://www.smsc.com. SMSC is a registered
trademark of Standard Microsystems Corporation (“SMSC”). Product names and company names are the trademarks of their respective holders.
SMSC DISCLAIMS AND EXCLUDES ANY AND ALL WARRANTIES, INCLUDING WITHOUT LIMITATION ANY AND ALL IMPLIED WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE, TITLE, AND AGAINST INFRINGEMENT AND THE LIKE, AND ANY AND ALL WARRANTIES ARISING FROM ANY COURSE
OF DEALING OR USAGE OF TRADE. IN NO EVENT SHALL SMSC BE LIABLE FOR ANY DIRECT, INCIDENTAL, INDIRECT, SPECIAL, PUNITIVE, OR CONSEQUENTIAL
DAMAGES; OR FOR LOST DATA, PROFITS, SAVINGS OR REVENUES OF ANY KIND; REGARDLESS OF THE FORM OF ACTION, WHETHER BASED ON CONTRACT;
TORT; NEGLIGENCE OF SMSC OR OTHERS; STRICT LIABILITY; BREACH OF WARRANTY; OR OTHERWISE; WHETHER OR NOT ANY REMEDY OF BUYER IS HELD
TO HAVE FAILED OF ITS ESSENTIAL PURPOSE, AND WHETHER OR NOT SMSC HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
Hi-Speed USB Transceiver with 1.8V-3.3V ULPI Interface - 26MHz Reference Clock
Datasheet
SMSC USB3317 REV C
3
Revision 2.1 (06-02-10)
DATASHEET
0.1
Reference Documents
Universal Serial Bus Specification, Revision 2.0, April 27, 2000
On-The-Go Supplement to the USB 2.0 Specification, Revision 2.0, May 8, 2009
27% Resistor ECN
USB 2.0 Transceiver Macrocell Interface (UTMI) Specification, Version 1.02, May 27, 2000
UTMI+ Specification, Revision 1.0, February 2, 2004
UTMI+ Low Pin Interface (ULPI) Specification, Revision 1.1, October 20, 2004
Technical Requirements and Test Methods of Charger and Interface for Mobile Telecommunication
Terminal Equipment (Chinese Charger Specification Approval Draft 11/29/2006)
Hi-Speed USB Transceiver with 1.8V-3.3V ULPI Interface - 26MHz Reference Clock
Datasheet
Revision 2.1 (06-02-10)
4
SMSC USB3317 REV C
DATASHEET
Table of Contents
0.1
Reference Documents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Chapter 1 General Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Chapter 2 USB3317 Pin Locations and Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.1
USB3317 Pin Locations and Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.1.1
Package Diagram with Pin Locations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.1.2
Pin Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Chapter 3 Limiting Values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.1
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.2
Recommended Operating Conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Chapter 4 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
4.1
Operating Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
4.2
CLKOUT Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
4.3
ULPI Interface Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
4.4
Digital IO Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
4.5
DC Characteristics: Analog I/O Pins. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
4.6
Dynamic Characteristics: Analog I/O Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4.7
OTG Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4.8
Regulator Output Voltages and Capacitor Requirement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Chapter 5 Architecture Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
5.1
ULPI Digital Operation and Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
5.2
Interface to DP/DM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
5.2.1
USB Transceiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
5.2.2
Termination Resistors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
5.3
Bias Generator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
5.4
Integrated Low Jitter PLL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
5.4.1
Reference Clock Requirements. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
5.5
Internal Regulators and POR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
5.5.1
Integrated Low Dropout Regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
5.5.2
Power On Reset (POR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
5.5.3
Recommended Power Supply Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
5.5.4
Start-Up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
5.6
USB On-The-Go (OTG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
5.6.1
ID Resistor Detection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
5.6.2
VBUS Monitor and Pulsing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
5.6.3
Driving External Vbus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
5.7
USB UART Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
5.8
USB Charger Detection Support. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Chapter 6 ULPI Operation Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
6.1
Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
6.1.1
ULPI Interface Signals. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
6.1.2
ULPI Interface Timing in Synchronous Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
6.2
ULPI Register Access. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
6.2.1
ULPI Register Write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
6.2.2
ULPI Register Read. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
6.2.3
ULPI RXCMD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
6.2.4
USB3317 Transmitter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Hi-Speed USB Transceiver with 1.8V-3.3V ULPI Interface - 26MHz Reference Clock
Datasheet
SMSC USB3317 REV C
5
Revision 2.1 (06-02-10)
DATASHEET
6.2.5
USB Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
6.2.6
Low Power Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
6.3
Full Speed/Low Speed Serial Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
6.3.1
3pin FS/LS Serial Mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
6.3.2
6pin FS/LS Serial Mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
6.4
Carkit Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
6.4.1
USB UART Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
6.5
RID Converter Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
6.6
Headset Audio Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
Chapter 7 ULPI Register Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
7.1
ULPI Register Array . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
7.1.1
ULPI Register Set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
7.1.2
Carkit Control Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
7.1.3
Extended Register Access . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
7.1.4
Vendor Register Access . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
Chapter 8 Application Notes. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
8.1
Application Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
8.2
USB Charger Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
8.2.1
Detecting the ID Resistor in a Charger . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
8.2.2
Detecting DP Shorted to DM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
8.3
Reference Designs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
8.4
ESD Performance. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
8.4.1
Human Body Model (HBM) Performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
8.4.2
EN/IEC 61000-4-2 Performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
8.4.3
Air Discharge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
8.4.4
Contact Discharge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
Chapter 9 Package Outlines, Tape & Reel Drawings, Package Markings. . . . . . . . . . . . . 69
Chapter 10 Datasheet Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
Hi-Speed USB Transceiver with 1.8V-3.3V ULPI Interface - 26MHz Reference Clock
Datasheet
Revision 2.1 (06-02-10)
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SMSC USB3317 REV C
DATASHEET
List of Figures
Figure 1.1 USB3317 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Figure 2.1 USB3317 QFN Pinout - Top View . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Figure 2.2 USB3317 VFBGA Pinout - Top View . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Figure 4.1 External Reference Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 5.1 USB3317 System Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 5.2 Example of circuit used to shift a reference clock common-mode voltage level. . . . . . . . . . . 23
Figure 5.3 Powering the USB3317 from a Battery . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 5.4 Powering the USB3317 from a 3.3V Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 5.5 Powering the USB3317 from the USB Cable Vbus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 5.6 ULPI Start-up Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Figure 5.7 USB3317 ID Resistor Detection Circuitry. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Figure 5.8 USB3317 OTG Vbus Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Figure 5.9 USB3317 Drives External Vbus Supply or Switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Figure 6.1 ULPI Digital Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Figure 6.2 ULPI Single Data Rate Timing Diagram in Synchronous Mode. . . . . . . . . . . . . . . . . . . . . . . 36
Figure 6.3 ULPI Register Write in Synchronous Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Figure 6.4 ULPI Extended Register Write in Synchronous Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Figure 6.5 ULPI Register Read in Synchronous Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Figure 6.6 ULPI Extended Register Read in Synchronous Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Figure 6.7 ULPI Transmit in Synchronous Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Figure 6.8 ULPI Receive in Synchronous Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Figure 6.9 Entering Low Power Mode from Synchronous Mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Figure 6.10 Exiting Low Power Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Figure 8.1 USB3317 QFN Application Diagram (Device) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
Figure 8.2 USB3317 VFBGA Application Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
Figure 8.3 USB3317 QFN Application Diagram (Host or OTG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
Figure 9.1 24-pin QFN, 4x4mm Body, 0.5mm Pitch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
Figure 9.2 QFN, 4x4 Tape & Reel. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
Figure 9.3 25-pin VFBGA, 3x3mm Body, 0.5mm Pitch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
Figure 9.4 VFBGA, 3x3 Tape & Reel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
Figure 9.5 Reel Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
Figure 9.6 QFN, 4x4 Package Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
Figure 9.7 VFBGA, 3x3 Package Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
Hi-Speed USB Transceiver with 1.8V-3.3V ULPI Interface - 26MHz Reference Clock
Datasheet
SMSC USB3317 REV C
7
Revision 2.1 (06-02-10)
DATASHEET
List of Tables
Table 2.1
USB3317 Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 3.1
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Table 3.2
Recommended Operating Conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Table 4.1
Electrical Characteristics: Operating Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Table 4.2
Electrical Characteristics: CLKOUT Specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Table 4.3
ULPI Interface Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Table 4.4
Digital IO Characteristics: RESETB, CLKOUT, STP, DIR, NXT, DATA[7:0] and XI Pins . . . . . . . . . . . . . 15
Table 4.5
DC Characteristics: Analog I/O Pins (DP/DM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 4.6
Dynamic Characteristics: Analog I/O Pins (DP/DM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Table 4.7
OTG Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Table 4.8
Regulator Output Voltages and Capacitor Requirement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Table 4.9
ESD and LATCH-UP Performance. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Table 5.1
DP/DM Termination vs. Signaling Mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Table 5.2
Operating Mode vs. Power Supply Configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Table 5.3
Valid Values of ID Resistance to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Table 5.4
IdGnd and IdFloat vs. ID Resistance to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Table 5.5
External Vbus Indicator Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Table 5.6
USB Weak Pull-up Enable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Table 6.1
ULPI Interface Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Table 6.2
ULPI TXD CMD Byte Encoding . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Table 6.3
ULPI RX CMD Encoding. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Table 6.4
Interface Signal Mapping During Low Power Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Table 6.5
Pin Definitions in 3 pin Serial Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Table 6.6
Pin Definitions in 6 pin Serial Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Table 6.7
Pin Definitions in Carkit Mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Table 6.8
Pin Definitions in Headset Audio Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
Table 7.1
ULPI Register Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Table 8.1
Component Values in Application Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
Table 8.2
Capacitance Values at VBUS of USB Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
Table 10.1 Customer Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
Hi-Speed USB Transceiver with 1.8V-3.3V ULPI Interface - 26MHz Reference Clock
Datasheet
Revision 2.1 (06-02-10)
8
SMSC USB3317 REV C
DATASHEET
Chapter 1 General Description
The USB3317 is a highly integrated Hi-Speed USB 2.0 Transceiver (PHY) that supports systems
architectures based on a 26MHz reference clock.
It is designed to be used in both commercial and
industrial temperature applications.
The USB3317 meets all of the electrical requirements to be used as a Hi-Speed USB Host, Device,
or an On-the-Go (OTG) device. In addition to the supporting USB signaling the USB3317 also provides
USB UART mode
USB3317 uses the industry standard UTMI+ Low Pin Interface (ULPI) to connect the USB PHY to the
Link. The industry standard ULPI interface uses a method of in-band signaling and status byte transfers
between the Link and PHY, to facilitate a USB session. By using in-band signaling and status byte
transfers the ULPI interface requires only 12 pins.
The USB3317 uses SMSC’s “wrapper-less” technology to implement the ULPI interface. This “wrapper-
less” technology allows the PHY to achieve a low latency transmit and receive time. SMSC’s low
latency transceiver allows an existing UTMI Link to be reused by adding a UTMI to ULPI bridge. By
adding a bridge to the ASIC the existing and proven UTMI Link IP can be reused.
Figure 1.1 USB3317 Block Diagram
The USB3317 is designed to run with a 26MHz reference clock. By using a reference clock from the
Link the USB3317 is able to remove the cost of a crystal reference from the design.
The USB3317 includes a integrated 3.3V LDO regulator to generate its own supply from power applied
at the VBAT pin. The voltage on the VBAT pin can range from 3.1 to 5.5V. The regulator dropout
voltage is less than 100mV which allows the PHY to continue USB signaling when the voltage on
VBAT drops to 3.1V. The USB transceiver will continue to operate at lower voltages, although some
parameters may be outside the limits of the USB specifications. If the user would like to provide a 3.3V
supply to the USB3317, the VBAT and VDD33 pins should be connected together as described in
Section 5.5.1
.
The USB3317 also includes integrated pull-up resistors that can be used for detecting the attachment
of a USB Charger. By sensing the attachment to a USB Charger, a product using the USB3317 can
charge its battery at more than the 500mA allowed when charging from a USB Host as described in
Section 8.2
.
OTG
Carkit
Hi-Speed
USB
Transceiver
ULPI Interface
ULPI
Registers
and State
Machine
BIAS
Low Jitter
Integrated
PLL
Integrated
Power
Management
VBUS
ID
DP
DM
RBIAS
RESETB
VDD18
VDD33
REFCLK
ESD
Protect
ion
VBAT
VDDIO
DIR
NXT
STP
CLKOUT
DATA[7:0]
CPEN
Hi-Speed USB Transceiver with 1.8V-3.3V ULPI Interface - 26MHz Reference Clock
Datasheet
SMSC USB3317 REV C
9
Revision 2.1 (06-02-10)
DATASHEET
Chapter 2 USB3317 Pin Locations and Definitions
2.1
USB3317
Pin Locations and Descriptions
2.1.1
Package Diagram with Pin Locations
The pinout below is viewed from the top of the package.
Figure 2.1 USB3317 QFN Pinout - Top View
Figure 2.2 USB3317 VFBGA Pinout - Top View
CP
E
N
VBUS
ID
VDD3.3
DM
DP
NXT
DI
R
ST
P
CLKO
U
T
DATA0
DATA2
DATA3
DATA1
VBAT
VD
D
1
.8
DA
TA4
DA
TA6
DA
TA7
DA
TA5
1
2
3
4
5
6
7
8
9
10
11
12
18
17
16
15
14
13
24
23
22
21
20
19
24Pin QFN
4x4mm
RE
S
E
TB
VDDIO
RB
IA
S
RE
FCLK
A
E
D
C
B
1
5
4
3
2
TOP VIEW
Hi-Speed USB Transceiver with 1.8V-3.3V ULPI Interface - 26MHz Reference Clock
Datasheet
Revision 2.1 (06-02-10)
10
SMSC USB3317 REV C
DATASHEET
2.1.2
Pin Definitions
The following table details the pin definitions for the figure above.
Table 2.1 USB3317 Pin Description
PIN
BALL
NAME
DIRECTION/
TYPE
ACTIVE
LEVEL
DESCRIPTION
1
B1
ID
Input,
Analog
N/A
ID pin of the USB cable. For non-OTG
applications this pin can be floated. For
an A-Device ID is grounded. For a B-
Device ID is floated.
2
C1
VBUS
I/O,
Analog
N/A
VBUS pin of the USB cable. This pin is
used for the Vbus comparator inputs and
for Vbus pulsing during session request
protocol.
3
C2
VBAT
Power
N/A
Regulator input. The regulator supply can
be from 5.5V to 3.1V.
4
D2
VDD3.3
Power
N/A
3.3V Regulator Output. A 2.2uF (<1 ohm
ESR) bypass capacitor to ground is
required for regulator stability. The
bypass capacitor should be placed as
close as possible to the USB3317.
5
D1
DM
I/O,
Analog
N/A
D- pin of the USB cable.
6
E1
DP
I/O,
Analog
N/A
D+ pin of the USB cable.
7
E2
CPEN
Output,
CMOS
High
External 5 volt supply enable. This pin is
used to enable the external Vbus power
supply. The CPEN pin is low on POR.
This pad uses VDD3.3 logic level.
8
E3
DATA[7]
I/O,
CMOS
N/A
ULPI bi-directional data bus. DATA[7] is
the MSB.
9
D3
DATA[6]
I/O,
CMOS
N/A
ULPI bi-directional data bus.
10
E4
DATA[5
I/O,
CMOS
N/A
ULPI bi-directional data bus.
11
D4
DATA[4]
I/O,
CMOS
N/A
ULPI bi-directional data bus.
12
E5
CLKOUT
Output,
CMOS
N/A
60MHz reference clock output. All ULPI
signals are driven synchronous to the
rising edge of this clock.
Following POR or hardware reset, the
voltage at CLKOUT must not exceed
V
IH_ED
as provided in
Table 4.4
.
13
D5
DATA[3]
I/O,
CMOS
N/A
ULPI bi-directional data bus.