2010 Microchip Technology Inc.
DS40039F
PIC16F630/676
Data Sheet
14-Pin, Flash-Based 8-Bit
CMOS Microcontrollers
DS40039F-page 2
2010 Microchip Technology Inc.
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The Microchip name and logo, the Microchip logo, dsPIC,
K
EE
L
OQ
, K
EE
L
OQ
logo, MPLAB, PIC, PICmicro, PICSTART,
PIC
32
logo, rfPIC and UNI/O are registered trademarks of
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© 2010, Microchip Technology Incorporated, Printed in the
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Printed on recycled paper.
ISBN: 978-1-60932-173-4
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
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and India. The Company’s quality system processes and procedures
are for its PIC
®
MCUs and dsPIC
®
DSCs, K
EE
L
OQ
®
code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
2010 Microchip Technology Inc.
DS40039F-page 3
PIC16F630/676
High-Performance RISC CPU:
• Only 35 Instructions to Learn
- All single-cycle instructions except branches
• Operating Speed:
- DC – 20 MHz oscillator/clock input
- DC – 200 ns instruction cycle
• Interrupt Capability
• 8-level Deep Hardware Stack
• Direct, Indirect, and Relative Addressing modes
Special Microcontroller Features:
• Internal and External Oscillator Options
- Precision Internal 4 MHz oscillator factory
calibrated to ±1%
- External Oscillator support for crystals and
resonators
- 5
s wake-up from Sleep, 3.0V, typical
• Power-Saving Sleep mode
• Wide Operating Voltage Range – 2.0V to 5.5V
• Industrial and Extended Temperature Range
• Low-Power Power-on Reset (POR)
• Power-up Timer (PWRT) and Oscillator Start-up
Timer (OST)
• Brown-out Detect (BOD)
• Watchdog Timer (WDT) with Independent
Oscillator for Reliable Operation
• Multiplexed MCLR/Input-pin
• Interrupt-on-Pin Change
• Individual Programmable Weak Pull-ups
• Programmable Code Protection
• High Endurance Flash/EEPROM Cell
- 100,000 write Flash endurance
- 1,000,000 write EEPROM endurance
- Flash/data EEPROM retention: > 40 years
Low-Power Features:
• Standby Current:
- 1 nA @ 2.0V, typical
• Operating Current:
- 8.5
A @ 32 kHz, 2.0V, typical
- 100
A @ 1 MHz, 2.0V, typical
• Watchdog Timer Current
- 300 nA @ 2.0V, typical
• Timer1 Oscillator Current:
- 4
A @ 32 kHz, 2.0V, typical
Peripheral Features:
• 12 I/O Pins with Individual Direction Control
• High Current Sink/Source for Direct LED Drive
• Analog Comparator module with:
- One analog comparator
- Programmable on-chip comparator voltage
reference (CV
REF
) module
- Programmable input multiplexing from device
inputs
- Comparator output is externally accessible
• Analog-to-Digital Converter module (PIC16F676):
- 10-bit resolution
- Programmable 8-channel input
- Voltage reference input
• Timer0: 8-bit Timer/Counter with 8-bit
Programmable Prescaler
• Enhanced Timer1:
- 16-bit timer/counter with prescaler
- External Gate Input mode
- Option to use OSC1 and OSC2 in LP mode
as Timer1 oscillator, if INTOSC mode
selected
• In-Circuit Serial Programming
TM
(ICSP
TM
) via
two pins
Device
Program
Memory
Data Memory
I/O
10-bit A/D
(ch)
Comparators
Timers
8/16-bit
Flash
(words)
SRAM
(bytes)
EEPROM
(bytes)
PIC16F630
1024
64
128
12
–
1
1/1
PIC16F676
1024
64
128
12
8
1
1/1
14-Pin, Flash-Based 8-Bit CMOS Microcontroller
PIC16F630/676
DS40039F-page 4
2010 Microchip Technology Inc.
Pin Diagrams
14-pin PDIP, SOIC, TSSOP
V
DD
RA5/T1CKI/OSC1/CLKIN
RA4/T1G/OSC2/AN3/CLKOUT
RA3/MCLR/V
PP
RC5
RC4
RC3/AN7
V
SS
RA0/AN0/CIN+/ICSPDAT
RA1/AN1/CIN-/V
REF
/ICSPCLK
RA2/AN2/COUT/T0CKI/INT
RC0/AN4
RC1/AN5
RC2/AN6
PI
C16F
676
1
2
3
4
5
6
7
14
13
12
9
11
10
8
V
DD
RA5/T1CKI/OSC1/CLKIN
RA4/T1G/OSC2/CLKOUT
RA3/MCLR/V
PP
RC5
RC4
RC3
V
SS
RA0/CIN+/ICSPDAT
RA1/CIN-/ICSPCLK
RA2/COUT/T0CKI/INT
RC0
RC1
RC2
P
IC16F
630
1
2
3
4
5
6
7
14
13
12
9
11
10
8
2010 Microchip Technology Inc.
DS40039F-page 5
PIC16F630/676
Table of Contents
1.0
Device Overview ......................................................................................................................................................................... 7
2.0
Memory Organization .................................................................................................................................................................. 9
3.0
Ports A and C ............................................................................................................................................................................ 21
4.0
Timer0 Module .......................................................................................................................................................................... 31
5.0
Timer1 Module with Gate Control ............................................................................................................................................. 34
6.0
Comparator Module .................................................................................................................................................................. 39
7.0
Analog-to-Digital Converter (A/D) Module (PIC16F676 only) ................................................................................................... 45
8.0
Data EEPROM Memory............................................................................................................................................................ 51
9.0
Special Features of the CPU .................................................................................................................................................... 55
10.0 Instruction Set Summary ........................................................................................................................................................... 73
11.0 Development Support ............................................................................................................................................................... 81
12.0 Electrical Specifications ............................................................................................................................................................ 85
13.0 DC and AC Characteristics Graphs and Tables ..................................................................................................................... 107
14.0 Packaging Information ............................................................................................................................................................ 117
Appendix A: Data Sheet Revision History ......................................................................................................................................... 123
Appendix B: Device Differences ....................................................................................................................................................... 123
Appendix C: Device Migrations ......................................................................................................................................................... 124
Appendix D: Migrating from other PIC
®
Devices .............................................................................................................................. 124
Index ................................................................................................................................................................................................. 125
On-Line Support ................................................................................................................................................................................ 129
Systems Information and Upgrade Hot Line ..................................................................................................................................... 129
Reader Response ............................................................................................................................................................................. 130
Product Identification System ........................................................................................................................................................... 131
TO OUR VALUED CUSTOMERS
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PIC16F630/676
DS40039F-page 6
2010 Microchip Technology Inc.
NOTES:
2010 Microchip Technology Inc.
DS40039F-page 7
PIC16F630/676
1.0
DEVICE OVERVIEW
This document contains device specific information for
the PIC16F630/676. Additional information may be
found in the PIC
®
Mid-Range Reference Manual
(DS33023), which may be obtained from your local
Microchip Sales Representative or downloaded from
the Microchip web site. The Reference Manual should
be considered a complementary document to this Data
Sheet and is highly recommended reading for a better
understanding of the device architecture and operation
of the peripheral modules.
The PIC16F630 and PIC16F676 devices are covered
by this Data Sheet. They are identical, except the
PIC16F676 has a 10-bit A/D converter. They come in
14-pin PDIP, SOIC and TSSOP packages. Figure 1-1
shows a block diagram of the PIC16F630/676 devices.
Table 1-1 shows the pinout description.
FIGURE 1-1:
PIC16F630/676 BLOCK DIAGRAM
Flash
Program
Memory
13
Data Bus
8
14
Program
Bus
Instruction Reg
Program Counter
RAM
File
Registers
Direct Addr
7
RAM Addr
9
Addr MUX
Indirect
Addr
FSR Reg
STATUS Reg
MUX
ALU
W Reg
Instruction
Decode and
Control
Timing
Generation
OSC1/CLKIN
OSC2/CLKOUT
PORTA
8
8
8
3
8-Level Stack
64
1K x 14
bytes
(13-bit)
Power-up
Timer
Oscillator
Start-up Timer
Power-on
Reset
Watchdog
Timer
MCLR
V
SS
Brown-out
Detect
Analog
Timer0
Timer1
DATA
EEPROM
128 bytes
EEDATA
EEADDR
RA0
RA1
RA2
RA3
RA4
RA5
Comparator
Analog to Digital Converter
(PIC16F676 only)
AN0 AN1 AN2 AN3
CIN- CIN+ COUT
T0CKI
INT
T1CKI
Configuration
Internal
Oscillator
V
REF
and reference
T1G
PORTC
RC0
RC1
RC2
RC3
RC4
RC5
AN4 AN5 AN6 AN7
V
DD
8
PIC16F630/676
DS40039F-page 8
2010 Microchip Technology Inc.
TABLE 1-1:
PIC16F630/676 PINOUT DESCRIPTION
Name
Function
Input
Type
Output
Type
Description
RA0/AN0/CIN+/ICSPDAT
RA0
TTL
CMOS
Bidirectional I/O w/ programmable pull-up and
interrupt-on-change.
AN0
AN
—
A/D Channel 0 input.
CIN+
AN
Comparator input.
ICSPDAT
TTL
CMOS
Serial Programming Data I/O.
RA1/AN1/CIN-/V
REF
/
ICSPCLK
RA1
TTL
CMOS
Bidirectional I/O w/ programmable pull-up and
interrupt-on-change.
AN1
AN
—
A/D Channel 1 input.
CIN-
AN
—
Comparator input.
V
REF
AN
—
External Voltage reference.
ICSPCLK
ST
—
Serial Programming Clock.
RA2/AN2/COUT/T0CKI/INT
RA2
ST
CMOS
Bidirectional I/O w/ programmable pull-up and
interrupt-on-change.
AN2
AN
—
A/D Channel 2 input.
COUT
—
CMOS
Comparator output.
T0CKI
ST
—
Timer0 clock input.
INT
ST
—
External Interrupt.
RA3/MCLR/V
PP
RA3
TTL
—
Input port with interrupt-on-change.
MCLR
ST
—
Master Clear.
V
PP
HV
—
Programming voltage.
RA4/T1G/AN3/OSC2/
CLKOUT
RA4
TTL
CMOS
Bidirectional I/O w/ programmable pull-up and
interrupt-on-change.
T1G
ST
—
Timer1 gate.
AN3
AN3
—
A/D Channel 3 input.
OSC2
—
XTAL
Crystal/Resonator.
CLKOUT
—
CMOS
F
OSC
/4 output.
RA5/T1CKI/OSC1/CLKIN
RA5
TTL
CMOS
Bidirectional I/O w/ programmable pull-up and
interrupt-on-change.
T1CKI
ST
—
Timer1 clock.
OSC1
XTAL
—
Crystal/Resonator.
CLKIN
ST
—
External clock input/RC oscillator connection.
RC0/AN4
RC0
TTL
CMOS
Bidirectional I/O.
AN4
AN4
—
A/D Channel 4 input.
RC1/AN5
RC1
TTL
CMOS
Bidirectional I/O.
AN5
AN5
—
A/D Channel 5 input.
RC2/AN6
RC2
TTL
CMOS
Bidirectional I/O.
AN6
AN6
—
A/D Channel 6 input.
RC3/AN7
RC3
TTL
CMOS
Bidirectional I/O.
AN7
AN7
—
A/D Channel 7 input.
RC4
RC4
TTL
CMOS
Bidirectional I/O.
RC5
RC5
TTL
CMOS
Bidirectional I/O.
V
SS
V
SS
Power
—
Ground reference.
V
DD
V
DD
Power
—
Positive supply.
Legend: Shade = PIC16F676 only
TTL = TTL input buffer
ST = Schmitt Trigger input buffer
2010 Microchip Technology Inc.
DS40039F-page 9
PIC16F630/676
2.0
MEMORY ORGANIZATION
2.1
Program Memory Organization
The PIC16F630/676 devices have a 13-bit program
counter capable of addressing an 8K x 14 program
memory space. Only the first 1K x 14 (0000h-03FFh)
for the PIC16F630/676 devices is physically imple-
mented. Accessing a location above these boundaries
will cause a wrap around within the first 1K x 14 space.
The Reset vector is at 0000h and the interrupt vector is
at 0004h (see Figure 2-1).
FIGURE 2-1:
PROGRAM MEMORY MAP
AND STACK FOR THE
PIC16F630/676
2.2
Data Memory Organization
The data memory (see Figure 2-2) is partitioned into
two banks, which contain the General Purpose Regis-
ters and the Special Function Registers. The Special
Function Registers are located in the first 32 locations
of each bank. Register locations 20h-5Fh are General
Purpose Registers, implemented as static RAM and
are mapped across both banks. All other RAM is
unimplemented and returns ‘0’ when read. RP0
(STATUS<5>) is the bank select bit.
• RP0 = 0 Bank 0 is selected
• RP0 = 1 Bank 1 is selected
2.2.1
GENERAL PURPOSE REGISTER
FILE
The register file is organized as 64 x 8 in the
PIC16F630/676 devices. Each register is accessed,
either directly or indirectly, through the File Select
Register FSR (see Section 2.4 “Indirect Addressing,
INDF and FSR Registers”).
PC<12:0>
13
000h
0004
0005
03FFh
0400h
1FFFh
Stack Level 1
Stack Level 8
Reset Vector
Interrupt Vector
On-chip Program
Memory
CALL, RETURN
RETFIE, RETLW
Stack Level 2
Note:
The IRP and RP1 bits STATUS<7:6> are
reserved and should always be maintained
as ‘0’s.
PIC16F630/676
DS40039F-page 10
2010 Microchip Technology Inc.
2.2.2
SPECIAL FUNCTION REGISTERS
The Special Function Registers are registers used by
the CPU and peripheral functions for controlling the
desired operation of the device (see Table 2-1). These
registers are static RAM.
The special registers can be classified into two sets:
core and peripheral. The Special Function Registers
associated with the “core” are described in this section.
Those related to the operation of the peripheral
features are described in the section of that peripheral
feature.
FIGURE 2-2:
DATA MEMORY MAP OF
THE PIC16F630/676
Indirect addr.
(1)
TMR0
PCL
STATUS
FSR
PORTA
PCLATH
INTCON
PIR1
TMR1L
TMR1H
T1CON
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
10h
11h
12h
13h
14h
15h
16h
17h
18h
19h
1Ah
1Bh
1Ch
1Dh
1Eh
1Fh
20h
7Fh
Bank 0
Unimplemented data memory locations, read as ‘0’.
1: Not a physical register.
2: PIC16F676 only.
CMCON
VRCON
General
Purpose
Registers
accesses
20h-5Fh
64 Bytes
EEDAT
EEADR
EECON2
(1)
5Fh
60h
File
Address
File
Address
WPUA
IOCA
Indirect addr.
(1)
OPTION_REG
PCL
STATUS
FSR
TRISA
PCLATH
INTCON
PIE1
PCON
OSCCAL
80h
81h
82h
83h
84h
85h
86h
87h
88h
89h
8Ah
8Bh
8Ch
8Dh
8Eh
8Fh
90h
91h
92h
93h
94h
95h
96h
97h
98h
99h
9Ah
9Bh
9Ch
9Dh
9Eh
9Fh
A0h
FFh
Bank 1
DFh
E0h
ADRESH
(2)
ADCON0
(2)
EECON1
ADRESL
(2)
ADCON1
(2)
ANSEL
(2)
TRISC
PORTC