MCP3001 2.7V 10-Bit A/D Converter with SPI Serial Interface

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©

 2007 Microchip Technology Inc.

DS21293C-page 1

MCP3001

Features

• 10-bit resolution

• ±1 LSB max DNL

• ±1 LSB max INL

• On-chip sample and hold

• SPI™ serial interface (modes 0,0 and 1,1)

• Single supply operation: 2.7V - 5.5V

• 200 ksps sampling rate at 5V

• 75 ksps sampling rate at 2.7V

• Low power CMOS technology

- 5 nA typical standby current, 2 µA max

- 500 µA max active current at 5V

• Industrial temp range: -40°C to +85°C 

• 8-pin PDIP, SOIC, MSOP and TSSOP packages

Applications

• Sensor Interface

• Process Control

• Data Acquisition

• Battery Operated Systems

Description

The Microchip Technology Inc. MCP3001 is a succes-
sive approximation 10-bit A/D converter (ADC) with on-
board sample and hold circuitry. The device provides a
single pseudo-differential input. Differential Nonlinear-
ity (DNL) and Integral Nonlinearity (INL) are both spec-
ified at ±1 LSB max. Communication with the device is
done using a simple serial interface compatible with the
SPI protocol. The device is capable of sample rates up
to 200 ksps at a clock rate of 2.8 MHz. The MCP3001
operates over a broad voltage range   (2.7V - 5.5V).
Low current design permits operation with a typical
standby current of only 5 nA and a typical active current
of 400 µA. The device is offered in 8-pin PDIP, MSOP,
TSSOP and 150 mil SOIC packages.

Package Types

Functional Block Diagram

V

REF

IN+

IN–

V

SS

V

DD

CLK

D

OUT

CS/SHDN

1

2

3

4

8

7

6

5

PDIP, MSOP, SOIC, TSSOP

MC

P3
001

Illustration not to scale

Comparator

Sample

and 

Hold

10-Bit SAR

DAC

Control Logic

CS/SHDN

V

REF

IN+

IN-

V

SS

V

DD

CLK

D

OUT

Shift

Register

2.7V 10-Bit A/D Converter with SPI Serial Interface

SPI™ is a trademark of Motorola Inc.

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MCP3001

DS21293C-page 2

©

 2007 Microchip Technology Inc.

1.0

ELECTRICAL 
CHARACTERISTICS

1.1

Maximum Ratings*

V

DD

.........................................................................7.0V

All inputs and outputs w.r.t. V

SS

...... -0.6V to V

DD

 +0.6V

Storage temperature ..........................-65°C to +150°C

Ambient temp. with power applied .....-65°C to +125°C

ESD protection on all pins (HBM)........................ > 4kV

*Notice: Stresses above those listed under “Maximum ratings”
may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at those or
any other conditions above those indicated in the operational
listings of this specification is not implied. Exposure to maxi-
mum rating conditions for extended periods may affect device
reliability.

PIN FUNCTION TABLE

ELECTRICAL CHARACTERISTICS

Name

Function

V

DD

+2.7V to 5.5V Power Supply

V

SS

Ground

IN+

Positive Analog Input

IN-

Negative Analog Input

CLK

Serial Clock

D

OUT

Serial Data Out

CS/SHDN

Chip Select/Shutdown Input

V

REF

Reference Voltage Input

All parameters apply at V

DD

 = 5V, V

SS

 = 0V, V

REF

 = 5V, T

AMB

 = -40°C to +85°C, f

SAMPLE

 = 200 ksps and f

CLK

 = 14*f

SAMPLE

unless otherwise noted. Typical values apply for V

DD

 = 5V,  T

AMB

 =25°C, unless otherwise noted.

Parameter

Sym

Min

Typ

Max

Units

Conditions

Conversion Rate:

Conversion Time

t

CONV

10

clock 

cycles

Analog Input Sample Time

t

SAMPLE

1.5

clock 

cycles

Throughput Rate

f

SAMPLE

200

75

ksps
ksps

V

DD

 

= V

REF

 = 5V

V

DD

 

= V

REF

 

= 2.7V

DC Accuracy:

Resolution

10

bits

Integral Nonlinearity

INL

±0.5

±1

LSB

Differential Nonlinearity

DNL

±0.25

±1

LSB

No missing codes over tem-
perature

Offset Error

±1.5

LSB

Gain Error

±1

LSB

Dynamic Performance:

Total Harmonic Distortion

THD

-76

dB

V

IN

 = 0.1V to 4.9V@1 kHz

Signal to Noise and Distortion 
(SINAD)

SINAD

61

dB

V

IN

 

= 0.1V to 4.9V@1 kHz

Spurious Free Dynamic Range

SFDR

80

dB

V

IN

 

= 0.1V to 4.9V@1 kHz

Reference Input:

Voltage Range

V

REF

0.25

V

DD

 

V

Note 2

Current Drain

I

REF

90

0.001

150

3

µA
µA

CS = V

DD

 = 5V

Note 1: This parameter is guaranteed by characterization and not 100% tested.

2: See graph that relates linearity performance to V

REF

 level.

3: Because the sample cap will eventually lose charge, clock rates below 10 kHz can affect linearity perfor-

mance, especially at elevated temperatures.

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DS21293C-page 3

MCP3001

Temperature Ranges:

Specified Temperature Range

T

A

-40

+85

°C

Operating Temperature Range

T

A

-40

+85

°C

Storage Temperature Range

T

A

-65

+150

°C

Thermal Package Resistance:

Thermal Resistance, 8L-PDIP

θ

JA

85

°C/W

Thermal Resistance, 8L-SOIC

θ

JA

163

°C/W

Thermal Resistance, 8L-MSOP

θ

JA

206

°C/W

Thermal Resistance, 8L-TSSOP

θ

JA

°C/W

Analog Inputs:

Input Voltage Range (IN+)

IN+

IN-

V

REF

+IN-

V

Input Voltage Range (IN-)

IN-

V

SS

-100

V

SS

+100

mV

Leakage Current

0.001

±1

µA

Switch Resistance

R

SS

1K

Ω

See Figure 4-1

Sample Capacitor

C

SAMPLE

20

pF

See Figure 4-1

Digital Input/Output:

Data Coding Format

Straight Binary

High Level Input Voltage

V

IH

0.7 V

DD

V

Low Level Input Voltage

V

IL

0.3  V

DD

V

High Level Output Voltage

V

OH

4.1

V

I

OH

 = -1 mA, V

DD

 = 4.5V

Low Level Output Voltage

V

OL

0.4

V

I

OL

 = 1 mA, V

DD

 = 4.5V

Input Leakage Current

I

LI

-10

10

µA

V

IN

 = V

SS

 or V

DD

Output Leakage Current

I

LO

-10

10

µA

V

OUT

 = V

SS

 or V

DD

Pin Capacitance
(all inputs/outputs)

C

IN

, C

OUT

10

pF

V

DD

 = 5.0V (Note 1)

T

AMB

 = 25°C, f = 1 MHz

Timing Parameters:

Clock Frequency

f

CLK

2.8

1.05

MHz
MHz

V

DD

 = 5V (Note 3)

V

DD

 = 2.7V (Note 3)

Clock High Time

t

HI

160

ns

Clock Low Time

t

LO

160

ns

CS Fall To First Rising CLK Edge

t

SUCS

100

ns

CLK Fall To Output Data Valid

t

DO

125
200

ns
ns

V

DD

 = 5V, See Figure 1-2

V

DD

 = 2.7, See Figure 1-2

CLK Fall To Output Enable

t

EN

125
200

ns
ns

V

DD

 = 5V, See Figure 1-2

V

DD

 = 2.7, See Figure 1-2

CS Rise To Output Disable

t

DIS

100

ns

See test circuits, Figure 1-2 
(Note 1)

CS Disable Time

t

CSH

350

ns

D

OUT

 Rise Time

t

R

100

ns

See test circuits, Figure 1-2 
(Note 1)

D

OUT

 Fall Time

t

F

100

ns

See test circuits, Figure 1-2 
(Note 1)

All parameters apply at V

DD

 = 5V, V

SS

 = 0V, V

REF

 = 5V, T

AMB

 = -40°C to +85°C, f

SAMPLE

 = 200 ksps and f

CLK

 = 14*f

SAMPLE

unless otherwise noted. Typical values apply for V

DD

 = 5V,  T

AMB

 =25°C, unless otherwise noted.

Parameter

Sym

Min

Typ

Max

Units

Conditions

Note 1: This parameter is guaranteed by characterization and not 100% tested.

2: See graph that relates linearity performance to V

REF

 level.

3: Because the sample cap will eventually lose charge, clock rates below 10 kHz can affect linearity perfor-

mance, especially at elevated temperatures.

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MCP3001

DS21293C-page 4

©

 2007 Microchip Technology Inc.

FIGURE 1-1:

Serial Timing.

Power Requirements:

Operating Voltage

V

DD

2.7

5.5

V

Operating Current

I

DD

400
210

500

µA
µA

V

DD

 = 5.0V, D

OUT

 unloaded

V

DD

 = 2.7V, D

OUT

 unloaded

Standby Current

I

DDS

0.005

2

µA

CS = V

DD

 = 5.0V 

All parameters apply at V

DD

 = 5V, V

SS

 = 0V, V

REF

 = 5V, T

AMB

 = -40°C to +85°C, f

SAMPLE

 = 200 ksps and f

CLK

 = 14*f

SAMPLE

unless otherwise noted. Typical values apply for V

DD

 = 5V,  T

AMB

 =25°C, unless otherwise noted.

Parameter

Sym

Min

Typ

Max

Units

Conditions

Note 1: This parameter is guaranteed by characterization and not 100% tested.

2: See graph that relates linearity performance to V

REF

 level.

3: Because the sample cap will eventually lose charge, clock rates below 10 kHz can affect linearity perfor-

mance, especially at elevated temperatures.

CS

CLK

t

SUCS

t

CSH

t

HI

t

LO

D

OUT

t

EN

t

DO

t

R

t

F

LSB

MSB OUT

t

DIS

Null BIT

HI-Z

HI-Z

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DS21293C-page 5

MCP3001

FIGURE 1-2:

Test Circuits.

V

IH

t

DIS

CS

D

OUT

Waveform 1*

D

OUT

Waveform 2†

90%

10%

* Waveform 1 is for an output with internal condi-

tions such that the output is high, unless disabled
by the output control.

† Waveform 2 is for an output with internal condi-

tions such that the output is low, unless disabled
by the output control.

Voltage Waveforms for t

DIS

Test Point

1.4V

D

OUT

Load circuit for t

R

, t

F

, t

DO

3 k

Ω

C

L

 = 30 pF

Test Point

D

OUT

Load circuit for t

DIS

 and t

EN

3 k

Ω

30 pF

t

DIS

 Waveform 2

t

DIS

 Waveform 1

CS

CLK

D

OUT

t

EN

1

2

B9

Voltage Waveforms for t

EN

 t

EN

 Waveform

V

DD

V

DD

/2

V

SS

3

4

D

OUT

t

R

Voltage Waveforms for t

R

, t

F

CLK

D

OUT

t

DO

Voltage Waveforms for t

DO

t

F

V

OH

V

OL

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MCP3001

DS21293C-page 6

©

 2007 Microchip Technology Inc.

2.0

TYPICAL PERFORMANCE CHARACTERISTICS

Note: Unless otherwise indicated, V

DD

 = V

REF

 = 5V, f

SAMPLE

 = 200 ksps, f

CLK

 = 14*Sample Rate, T

A

 = 25°C

FIGURE 2-1:

Integral Nonlinearity (INL) vs. Sample

Rate.

FIGURE 2-2:

Integral Nonlinearity (INL) vs. V

REF

.

FIGURE 2-3:

Integral Nonlinearity (INL) vs. Code

(Representative Part).

FIGURE 2-4:

Integral Nonlinearity (INL) vs. Sample

Rate (V

DD

 = 2.7V).

FIGURE 2-5:

Integral Nonlinearity (INL) vs. V

REF

(V

DD

 = 2.7V).

FIGURE 2-6:

Integral Nonlinearity (INL) vs. Code

(Representative Part, V

DD

 = 2.7V).

Note:

The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only.  The performance characteristics listed herein
are not tested or guaranteed.  In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.

-0.4

-0.3

-0.2

-0.1

0.0

0.1

0.2

0.3

0.4

0

25

50

75 100 125 150 175 200 225 250

Sample Rate (ksps)

IN

L

 (L

S

B

)

Positive INL

Negative INL

-1.0

-0.8

-0.6

-0.4

-0.2

0.0

0.2

0.4

0.6

0.8

1.0

0

1

2

3

4

5

6

V

REF

 (V)

IN

L (

L

S

B

)

Positive INL

Negative INL

-0.5

-0.4

-0.3

-0.2

-0.1

0.0

0.1

0.2

0.3

0.4

0.5

0

128

256

384

512

640

768

896

1024

Digital Code

INL (

L

S

B

)

V

DD

 = V

REF

 = 5V

f

SAMPLE

 = 200 ksps

-0.4

-0.3

-0.2

-0.1

0.0

0.1

0.2

0.3

0.4

0

25

50

75

100

Sample Rate (ksps)

IN

L

 (L

S

B

)

Positive INL

Negative INL

V

DD

 = V

REF

 = 2.7V

-1.0

-0.8

-0.6

-0.4

-0.2

0.0

0.2

0.4

0.6

0.8

1.0

0.0

0.5

1.0

1.5

2.0

2.5

3.0

V

REF

 (V)

IN

L (

L

S

B

)

Positive INL

Negative INL

V

DD

 = V

REF

= 2.7V

f

SAMPLE

 = 75 ksps

-0.50

-0.40

-0.30

-0.20

-0.10

0.00

0.10

0.20

0.30

0.40

0.50

0

128

256

384

512

640

768

896

1024

Digital Code

INL (

L

S

B

)

V

DD

 = V

REF

 = 2.7V

f

SAMPLE

 = 75 ksps

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DS21293C-page 7

MCP3001

Note: Unless otherwise indicated, V

DD

 = V

REF

 = 5V, f

SAMPLE

 = 200 ksps, f

CLK

 = 14*Sample Rate,T

A

 = 25°C

FIGURE 2-7:

Integral Nonlinearity (INL) vs.

Temperature.

FIGURE 2-8:

Differential Nonlinearity (DNL) vs.

Sample Rate.

FIGURE 2-9:

Differential Nonlinearity (DNL) vs.

V

REF

.

FIGURE 2-10: Integral Nonlinearity (INL) vs.
Temperature (V

DD

 = 2.7V).

FIGURE 2-11: Differential Nonlinearity (DNL) vs.
Sample Rate (V

DD

 = 2.7V).

FIGURE 2-12: Differential Nonlinearity (DNL) vs. V

REF

(V

DD

 = 2.7V).

-0.4

-0.3

-0.2

-0.1

0.0

0.1

0.2

0.3

0.4

-50

-25

0

25

50

75

100

Temperature (°C)

IN

L

 (

L

SB

)

Positive INL

Negative INL

-0.4

-0.3

-0.2

-0.1

0.0

0.1

0.2

0.3

0.4

0

25

50

75

100

125

150

175

200

225

250

Sample Rate (ksps)

DNL (

L

S

B

)

Positive DNL

Negative DNL

-1.0

-0.8

-0.6

-0.4

-0.2

0.0

0.2

0.4

0.6

0.8

1.0

0

1

2

3

4

5

V

REF

 (V)

 DNL (LS

B

)

Negative DNL

Positive DNL

-0.4

-0.3

-0.2

-0.1

0.0

0.1

0.2

0.3

0.4

-50

-25

0

25

50

75

100

Temperature (°C)

INL (

L

S

B

)

Positive INL

V

DD

 = V

REF

 = 2.7V

f

SAMPLE

 = 75 ksps

Negative INL

-0.4

-0.3

-0.2

-0.1

0.0

0.1

0.2

0.3

0.4

0

25

50

75

100

Sample Rate (ksps)

DNL

 (L

S

B

)

Positive DNL

Negative DNL

V

DD

 = V

REF

 = 2.7V

-1.0

-0.8

-0.6

-0.4

-0.2

0.0

0.2

0.4

0.6

0.8

1.0

0.0

0.5

1.0

1.5

2.0

2.5

3.0

V

REF

(V)

DNL (LS

B

)

Positive DNL

Negative DNL

V

DD

 = V

REF 

= 2.7V

f

SAMPLE

 = 75 ksps

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MCP3001

DS21293C-page 8

©

 2007 Microchip Technology Inc.

Note: Unless otherwise indicated, V

DD

 = V

REF

 = 5V, f

SAMPLE

 = 200 ksps, f

CLK

 = 14*Sample Rate,T

A

 = 25°C

FIGURE 2-13: Differential Nonlinearity (DNL) vs.
Code (Representative Part).

FIGURE 2-14: Differential Nonlinearity (DNL) vs.
Temperature.

FIGURE 2-15: Gain Error vs. V

REF

.

FIGURE 2-16: Differential Nonlinearity (DNL) vs.
Code (Representative Part, V

DD

 = 2.7V).

FIGURE 2-17: Differential Nonlinearity (DNL) vs.
Temperature (V

DD

 = 2.7V).

FIGURE 2-18: Offset Error vs. V

REF

.

-0.5

-0.4

-0.3

-0.2

-0.1

0.0

0.1

0.2

0.3

0.4

0.5

0

128

256

384

512

640

768

896

1024

Digital Code

DNL (LS

B

)

V

DD

 = V

REF

 = 5V

f

SAMPLE

 = 200 ksps

-0.3

-0.2

-0.1

0.0

0.1

0.2

0.3

-50

-25

0

25

50

75

100

Temperature (°C)

DNL

 (

L

S

B

)

Positive DNL

Negative DNL

-1.0

-0.8

-0.6

-0.4

-0.2

0.0

0.2

0.4

0.6

0.8

1.0

0

1

2

3

4

5

V

REF

(V)

Ga

in Error (

L

SB

)

V

DD

 = 2.7V

f

SAMPLE

 = 75 ksps

V

DD

 = 5V

f

SAMPLE

 = 200 ksps

-0.5

-0.4

-0.3

-0.2

-0.1

0.0

0.1

0.2

0.3

0.4

0.5

0

128

256

384

512

640

768

896

1024

Digital Code

DNL (LS

B

)

V

DD

 = V

REF

 = 2.7V

f

SAMPLE

 = 75 ksps

-0.3

-0.2

-0.1

0.0

0.1

0.2

0.3

-50

-25

0

25

50

75

100

Temperature (°C)

DNL (LS

B

)

Positive DNL

V

DD

 = V

REF

 = 2.7V

f

SAMPLE

 = 75 ksps

Negative DNL

0

1

2

3

4

5

6

7

8

0.0

1.0

2.0

3.0

4.0

5.0

V

REF

 (V)

Of

fs

e

t Error (

L

SB

)

V

DD

 = 5V

f

SAMPLE

 = 200 ksps

V

DD

 = 2.7V

f

SAMPLE

 = 75 ksps

/var/www/html/datasheet/sites/default/files/pdfhtml_dummy/21293C-html.html
background image

©

 2007 Microchip Technology Inc.

DS21293C-page 9

MCP3001

Note: Unless otherwise indicated, V

DD

 = V

REF

 = 5V, f

SAMPLE

 = 200 ksps, f

CLK

 = 14*Sample Rate,T

A

 = 25°C

FIGURE 2-19: Gain Error vs. Temperature.

FIGURE 2-20: Signal to Noise Ratio (SNR) vs. Input
Frequency.

FIGURE 2-21: Total Harmonic Distortion (THD) vs.
Input Frequency.

FIGURE 2-22: Offset Error vs. Temperature.

FIGURE 2-23: Signal to Noise Ratio and Distortion
(SINAD) vs. Input Frequency.

FIGURE 2-24: Signal to Noise and Distortion
(SINAD) vs. Input Signal Level.

-0.4

-0.3

-0.2

-0.1

0.0

0.1

-50

-25

0

25

50

75

100

Temperature (°C)

Ga

in Error (

L

SB

)

V

DD

 = V

REF

 = 5V

f

SAMPLE

 = 200 ksps

V

DD

 = V

REF

 = 2.7V

f

SAMPLE

 = 75 ksps

0

10

20

30

40

50

60

70

1

10

100

Input Frequency (kHz)

SNR (d

B)

V

DD

 = V

REF

 = 2.7V

f

SAMPLE

 = 75 ksps

V

DD

 = V

REF

 = 5V

f

SAMPLE

 = 200 ksps

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

1

10

100

Input Frequency (kHz)

T

HD (

d

B)

V

DD

 = V

REF

 = 5V

f

SAMPLE

 = 200 ksps

V

DD

 = V

REF

 = 2.7V

f

SAMPLE

 = 75 ksps

0.0

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

1.0

-50

-25

0

25

50

75

100

Temperature (°C)

Of

fset

 Erro

r (

L

SB

)

V

DD

 = V

REF

 = 5V

f

SAMPLE

 = 200 ksps

V

DD

 = V

REF

 = 2.7V

f

SAMPLE

 = 75 ksps

0

10

20

30

40

50

60

70

1

10

100

Input Frequency (kHz)

S

INAD (

d

B

)

V

DD

 = V

REF

 = 2.7V

f

SAMPLE

 = 75 ksps

V

DD

 = V

REF

 = 5V

f

SAMPLE

 = 200 ksps

0

10

20

30

40

50

60

70

80

-40

-35

-30

-25

-20

-15

-10

-5

0

Input Signal Level (dB) 

S

INAD (

d

B)

V

DD

 = V

REF

 = 2.7V

f

SAMPLE

 = 75 ksps

V

DD

 = V

REF

 = 5V

f

SAMPLE

 = 200 ksps

/var/www/html/datasheet/sites/default/files/pdfhtml_dummy/21293C-html.html
background image

MCP3001

DS21293C-page 10

©

 2007 Microchip Technology Inc.

Note: Unless otherwise indicated, V

DD

 = V

REF

 = 5V, f

SAMPLE

 = 200 ksps, f

CLK

 = 14*Sample Rate,T

A

 = 25°C

FIGURE 2-25: Effective Number of Bits (ENOB) vs.
V

REF

.

FIGURE 2-26: Spurious Free Dynamic Range
(SFDR) vs. Input Frequency.

FIGURE 2-27: Frequency Spectrum of 10 kHz Input
(Representative Part).

FIGURE 2-28: Effective Number of Bits (ENOB) vs.
Input Frequency.

FIGURE 2-29: Power Supply Rejection (PSR) vs.
Ripple Frequency.

FIGURE 2-30: Frequency Spectrum of 1 kHz Input
(Representative Part, V

DD

 

= 2.7V).

9.0

9.1

9.2

9.3

9.4

9.5

9.6

9.7

9.8

9.9

10.0

0.0

1.0

2.0

3.0

4.0

5.0

V

REF

 (V)

ENO

B

 (r

ms

)

V

DD

 = V

REF

 = 2.7V

f

SAMPLE

 = 75 ksps

V

DD

 = V

REF

 = 5V

f

SAMPLE

 = 200 ksps

0

10

20

30

40

50

60

70

80

90

100

1

10

100

Input Frequency (kHz)

SF

DR (d

B)

V

DD

 = V

REF

 = 5V

f

SAMPLE

 = 200 ksps

V

DD

 = V

REF

 = 2.7V

f

SAMPLE

 = 75 ksps

-130

-120

-110

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

0

20000

40000

60000

80000

100000

Frequency (Hz)

Am

plit

ude

 (

d

B)

V

DD

 = V

REF

 = 5V

f

SAMPLE

 = 200 ksps

f

INPUT

 = 10.0097 kHz

4096 points

8.0

8.2

8.4

8.6

8.8

9.0

9.2

9.4

9.6

9.8

10.0

1

10

100

Input Frequency (kHz)

ENOB (rm

s

)

V

DD

 = V

REF

 = 2.7V

f

SAMPLE

 = 75 ksps

V

DD

 = V

REF

 = 5V

f

SAMPLE

 = 200 ksps

-80

-70

-60

-50

-40

-30

-20

-10

0

1

10

100

1000

10000

Ripple Frequency (kHz)

P

o

we

r S

uppl

y

 Re

je

c

ti

on (dB)

V

DD

 = V

REF

 = 5V

f

SAMPLE

 = 200 ksps

-130

-120

-110

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

0

5000

10000 15000 20000 25000 30000 35000

Frequency (Hz)

Am

plit

ude

 (

d

B)

V

DD

 = V

REF

 = 2.7V

f

SAMPLE

 = 75 ksps

f

INPUT

 = 1.00708 kHz

4096 points

Maker
Microchip Technology Inc.
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