2017 Microchip Technology Inc.
DS20005855A-page 1
HV5630
Features
• 100 mA Minimum Sink Current
• 8 MHz Shift Register Speed
• Polarity and Blanking Inputs
• CMOS-compatible Inputs
• Forward and Reverse Shifting Options
• Diode to V
PP
allows Efficient Power Recovery
Applications
• Display Driver
• Inkjet Driver
• Print Head Driver
• Microelectromechanical Systems Applications
General Description
The HV5630 is a low-voltage to high-voltage
serial-to-parallel converter with open drain outputs.
This device has been designed for use as a driver for
AC-electroluminescent displays. It can also be used in
any application requiring multiple-output high-voltage
current-sinking capabilities, such as driving inkjet and
electrostatic print heads, plasma panels, vacuum
fluorescent and large matrix LCD displays.
The device consists of a 32-bit Shift register, 32 latches
and control logic to perform the polarity select and
blanking of the outputs. Data is shifted through the Shift
register on the high-to-low transition of the clock. The
HV5630 shifts in a clockwise direction when viewed
from the top of the package. A data output buffer is
provided for cascading devices. This output reflects the
current status of the last bit of the Shift register. The
operation of the Shift register is not affected by the latch
enable (LE), blanking (BL) and polarity (POL) inputs.
The transfer of data from the Shift register to the latch
occurs when the LE input is high. The data in the latch
is stored when LE is low.
Package Type
See
Table 2-1
for pin information.
44-lead PLCC
(Top view)
1 44
6
40
32-Channel Serial-to-Parallel Converter With Open Drain Outputs
POL
BL
LE
DATA
IN
CLK
DATA
OUT
HV
OUT
1
(Outputs 3 to 30 not shown)
Latch
Latch
HV
OUT
2
HV
OUT
31
HV
OUT
32
Latch
Latch
32-Bit
Shift
Register
HV5630
DS20005855A-page 2
2017 Microchip Technology Inc.
Functional Block Diagram
2017 Microchip Technology Inc.
DS20005855A-page 3
HV5630
Typical Application Circuit
HV5630
DS20005855A-page 4
2017 Microchip Technology Inc.
1.0
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings†
Supply Voltage, V
DD
(
Note 1
)
.................................................................................................................. –0.5V to +15V
High-voltage Output Voltage, H
VOUT
(
Note 1
) ....................................................................................... –0.5V to +315V
Logic Input Levels (
Note 1
) .............................................................................................................. –0.5V to V
DD
+0.5V
Ground Current (
Note 2
) ......................................................................................................................................... 1.5A
Maximum Junction Temperature, T
J(MAX)
.......................................................................................................... +125°C
Storage Temperature, T
S
.................................................................................................................... –65°C to +150°C
Continuous Total Power Dissipation:
44-lead PLCC (
Note 3
) ......................................................................................................................... 1200 mW
† Notice: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the
device. This is a stress rating only, and functional operation of the device at those or any other conditions above those
indicated in the operational sections of this specification is not intended. Exposure to maximum rating conditions for
extended periods may affect device reliability.
Note 1: All voltages are referenced to V
SS
.
2: Duty cycle is limited by the total power dissipated in the package.
3: For operations above 25°C ambient, derate linearly to the maximum operating temperature at 20 mW/°C.
RECOMMENDED OPERATING CONDITIONS
Parameter
Sym.
Min.
Typ.
Max.
Unit
Conditions
Logic Supply Voltage
V
DD
10.8
—
13.2
V
High-voltage Output Voltage
HV
OUT
–0.3
—
+300
V
High-level Input Voltage
V
IH
V
DD
–2
—
V
DD
V
Low-level Input Voltage
V
IL
0
—
2
V
Clock Frequency
f
CLK
—
—
8
MHz
Operating Ambient Temperature
T
A
–40
—
+85
°C
DC ELECTRICAL CHARACTERISTICS
Electrical Specifications: Over recommended operating conditions unless otherwise stated
Parameter
Sym.
Min.
Typ.
Max.
Unit
Conditions
V
DD
Supply Current
I
DD
—
—
15
mA
f
CLK
= 8 MHz,
f
DATA
= 4 MHz
Quiescent V
DD
Supply Current
I
DDQ
—
—
100
µA
V
IN
= 0V
Off State Output Current
I
O(OFF)
—
—
10
µA
All outputs high, all SWS
parallel
High-level Logic Input Current
I
IH
—
—
1
µA
V
IH
= V
DD
Low-level Logic Input Current
I
IL
—
—
–1
µA
V
IL
= 0V
High-level Output Data Out
V
OH
V
DD
–1V
—
—
V
I
DOUT
= –100 µA
Low-level Output Voltage
HV
OUT
V
OL
—
—
15
V
I
HVOUT
= 100 mA
Data Out
—
—
1
V
I
DOUT
= 100 µA
HV
OUT
Clamp Voltage
V
OC
—
—
–1.5
V
I
OL
= –100 mA
AC ELECTRICAL CHARACTERISTICS
Electrical Specifications: For V
DD
= 12V and T
A
= 25°C
Parameter
Sym.
Min.
Typ.
Max.
Unit
Conditions
Clock Frequency
f
CLK
—
—
8
MHz
Clock Width High or Low
t
WL
, t
WH
62
—
—
ns
Data Set-up Time before Clock Falls
t
SU
25
—
—
ns
Data Hold Time after Clock Falls
t
H
10
—
—
ns
Turn-on Time, HV
OUT
from Enable
t
ON
—
—
500
ns
R
L
= 2 kΩ
to V
PP
maximum
Latch Enable Pulse Width
t
WLE
50
—
—
ns
Delay Time Clock to Latch Enable Low to
High
t
DLE
50
—
—
ns
Latch Enable Set-up Time before Clock
Falls
t
SLE
50
—
—
ns
Delay Time Clock to Data Low to High
t
DLH
—
—
100
ns
C
L
= 15 pF
Delay Time Clock to Data High to Low
t
DHL
—
—
100
ns
C
L
= 15 pF
TEMPERATURE SPECIFICATIONS
Parameter
Sym.
Min.
Typ.
Max.
Unit
Conditions
TEMPERATURE RANGE
Operating Ambient Temperature
T
A
–40
—
+85
°C
Maximum Junction Temperature
T
J(MAX)
—
—
+125
°C
Storage Temperature
T
S
–65
—
+150
°C
PACKAGE THERMAL RESISTANCE
44-lead PLCC
JA
—
37
—
°C/W
2017 Microchip Technology Inc.
DS20005855A-page 5
HV5630
HV5630
DS20005855A-page 6
2017 Microchip Technology Inc.
Timing Waveforms
LE
HV
OUT
w/ S/R HIGH
Data Valid
50% 50%
DATA
IN
CLK
DATA
OUT
50% 50% 50%
t
SU
t
H
t
WH
t
WL
50%
50%
t
DLH
t
DHL
50%
t
WLE
t
DLE
t
SLE
50%
50%
10%
t
ON
V
IH
V
IL
V
IH
V
IL
V
OH
V
OL
V
OH
V
OL
V
IH
V
IL
V
OH
V
OL
2017 Microchip Technology Inc.
DS20005855A-page 7
HV5630
2.0
PIN DESCRIPTION
The details on the pins of HV5630 are in
Table 2-1
.
Refer to
Package Type
for the location of pins.
TABLE 2-1:
PIN FUNCTION TABLE
Pin Number
Pin Name
Description
1
HVOUT17
High-voltage output
2
HVOUT16
High-voltage output
3
HVOUT15
High-voltage output
4
HVOUT14
High-voltage output
5
HVOUT13
High-voltage output
6
HVOUT12
High-voltage output
7
HVOUT11
High-voltage output
8
HVOUT10
High-voltage output
9
HVOUT9
High-voltage output
10
HVOUT8
High-voltage output
11
HVOUT7
High-voltage output
12
HVOUT6
High-voltage output
13
HVOUT5
High-voltage output
14
HVOUT4
High-voltage output
15
HVOUT3
High-voltage output
16
HVOUT2
High-voltage output
17
HVOUT1
High-voltage output
18
DATA OUT
Data output pin
19
NC
No connection
20
NC
No connection
21
NC
No connection
22
POL
Inverts the polarity of the HVOUT pins
23
CLK
Clock pin. Shift registers shift data on the falling edge of the input clock.
24
VSS
Reference voltage (usually ground)
25
VDD
Logic supply voltage
26
LE
Latch enable pin. Data is shifted from the Shift register to the latches on logic
input high.
27
DATA IN
Data input pin
28
BL
This blanking pin sets all HVOUT pins low or high depending upon the state of
polarity. See
Table 3-2
.
29
NC
No connection
30
HVOUT32
High-voltage output
31
HVOUT31
High-voltage output
32
HVOUT30
High-voltage output
33
HVOUT29
High-voltage output
34
HVOUT28
High-voltage output
35
HVOUT27
High-voltage output
HV5630
DS20005855A-page 8
2017 Microchip Technology Inc.
36
HVOUT26
High-voltage output
37
HVOUT25
High-voltage output
38
HVOUT24
High-voltage output
39
HVOUT23
High-voltage output
40
HVOUT22
High-voltage output
41
HVOUT21
High-voltage output
42
HVOUT20
High-voltage output
43
HVOUT19
High-voltage output
44
HVOUT18
High-voltage output
TABLE 2-1:
PIN FUNCTION TABLE (CONTINUED)
Pin Number
Pin Name
Description
2017 Microchip Technology Inc.
DS20005855A-page 9
HV5630
3.0
FUNCTIONAL DESCRIPTION
Follow the steps in
Table 3-1
to power up and power
down the HV5630.
TABLE 3-1:
POWER-UP AND POWER-DOWN SEQUENCE
Power-up
Power-down
Step
Description
Step
Description
1
Connect ground.
1
Remove all inputs.
2
Apply V
DD.
2
Remove V
DD.
3
Set all inputs to a known state.
3
Disconnect ground.
TABLE 3-2:
Function
Inputs
Outputs
Data
CLK
LE
BL
POL
Shift Register
High-voltage Output
Data Out
1
2...32
1
2...32
*
All On
X
X
X
L
L
*
*...*
On
On...On
*
All Off
X
X
X
L
H
*
*...*
Off
Off...Off
*
Invert Mode
X
X
L
H
L
*
*...*
*
*...*
*
Load S/R
H or L
↓
L
H
H
H or L
*...*
*
*...*
*
Load Latches
X
H or L
↑
H
H
*
*...*
*
*...*
*
X
H or L
↑
H
L
*
*...*
*
*...*
*
Transparent
Latch Mode
L
↓
H
H
H
L
*...*
Off
*...*
*
H
↓
H
H
H
H
*...*
On
*...*
*
Note:
H = High-logic level
L = Low-logic level
X = Irrelevant
↓ = High-to-low transition
↑ = Low-to-high transition
* = Dependent on the previous stage’s state before the last CLK ↓ or last LE high
TRUTH FUNCTION TABLE
VDD
DATA
IN
HV
OUT
Logic Inputs
DATA
OUT
Logic Data Output
High Voltage Outputs
VDD
HV
IN
VSS
VSS
VSS
FIGURE 3-1:
Input and Output Equivalent Circuits.
HV5630
DS20005855A-page 10
2017 Microchip Technology Inc.
4.0
PACKAGE MARKING INFORMATION
4.1
Packaging Information
Legend: XX...X
Product Code or Customer-specific information
Y
Year code (last digit of calendar year)
YY
Year code (last 2 digits of calendar year)
WW
Week code (week of January 1 is week ‘01’)
NNN
Alphanumeric traceability code
Pb-free JEDEC
®
designator for Matte Tin (Sn)
*
This package is Pb-free. The Pb-free JEDEC designator ( )
can be found on the outer packaging for this package.
Note:
In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for product code or customer-specific information. Package may or
not include the corporate logo.
3
e
3
e
44-lead PLCC
Example
XXXXXXXXX
YYWWNNN
e3
HV5630PJ
1723458
e3