Dual LDO with Microcontroller RESET Function

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© 2008 Microchip Technology Inc.

DS21798C-page 1

TC1301A/B

Features

• Dual Output LDO with Microcontroller Reset 

Monitor Functionality:

- V

OUT1

 = 1.5V to 3.3V @ 300 mA

- V

OUT2

 = 1.5V to 3.3V @ 150 mA

- V

RESET

 = 2.20V to 3.20V

• Output Voltage and RESET Threshold Voltage 

Options Available (See 

Table 8-1

)

• Low Dropout Voltage:

- V

OUT1

 = 104 mV @ 300 mA (typical)

- V

OUT2

 = 150 mV @ 150 mA, (typical)

• Low Supply Current: 116 µA (typical),

TC1301A/B with both output voltages available

• Reference Bypass Input for Low-Noise Operation

• Both Output Voltages Stable with a Minimum of 

1 µF Ceramic Output Capacitor

• Separate Input for RESET Detect Voltage 

(TC1301A)

• Separate V

OUT1

 and V

OUT2

 SHDN pins 

(TC1301B)

• RESET Output Duration: 300 ms (typical)

• Power-Saving Shutdown Mode of Operation

• Wake-up from SHDN: 5.3 µs (typical)

• Small 8-pin DFN and MSOP Package Options

• Operating Junction Temperature Range:

- -40°C to +125°C

• Overtemperature and Overcurrent Protection

Applications

• Cellular/GSM/PHS Phones

• Battery-Operated Systems

• Hand-Held Medical Instruments

• Portable Computers/PDAs

• Linear Post-Regulators for SMPS

• Pagers

Related Literature

• AN765, “Using Microchip’s Micropower LDOs”, 

DS00765, Microchip Technology Inc., 2002

• AN766, “Pin-Compatible CMOS Upgrades to 

BiPolar LDOs”, DS00766, Microchip Technology 
Inc., 2002

• AN792, “A Method to Determine How Much 

Power a SOT23 Can Dissipate in an Application”, 
DS00792, Microchip Technology Inc., 2001

Description

The TC1301A/B combines two Low Dropout (LDO)
regulators and a microcontroller RESET function into a
single 8-pin MSOP or DFN package. Both regulator
outputs feature low dropout voltage, 104 mV
@ 300 mA for V

OUT1

, 150 mV @ 150 mA for V

OUT2

,

low quiescent current consumption, 58 µA each and a
typical regulation accuracy of 0.5%. Several fixed-
output voltage and detector voltage combinations are
available. A reference bypass pin is available to further
reduce output noise and improve the power supply
rejection ratio of both LDOs.

The TC1301A/B is stable over all line and load
conditions with a minimum of 1 µF of ceramic output
capacitance, and utilizes a unique compensation
scheme to provide fast dynamic response to sudden
line voltage and load current changes.

For the TC1301A, the microcontroller RESET function
operates independently of both V

OUT1

 and V

OUT2

. The

input to the RESET function is connected to the V

DET

pin.The SHDN2 pin is used to control the output of
V

OUT2

 only. V

OUT1

 will power-up and down with V

IN

.

In the case of the TC1301B, the detect voltage input of
the RESET function is connected internally to V

OUT1

.

Both V

OUT1

 and V

OUT2

 have independent shutdown

capability.

Additional features include an overcurrent limit and
overtemperature protection that, when combined,
provide a robust design for all load fault conditions.

Package Types

8-Pin DFN/MSOP

RESET

SHDN2

Bypass

GND

V

DET

1

2

3

4

5

6

7

8

V

OUT2

V

IN

1

2

3

4

5

6

7

8

V

OUT1

TC1301A

RESET

SHDN2

Bypass

GND

V

DET

V

OUT2

V

IN

V

OUT1

DFN8

MSOP8

RESET

SHDN2

Bypass

GND

SHDN1

1

2

3

4

5

6

7

8

V

OUT2

V

IN

1

2

3

4

5

6

7

8

V

OUT1

TC1301B

RESET

SHDN2

Bypass

GND

SHDN1

V

OUT2

V

IN

V

OUT1

DFN8

MSOP8

Dual LDO with Microcontroller RESET Function

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TC1301A/B

DS21798C-page 2

© 2008 Microchip Technology Inc.

Functional Block Diagrams

Typical Application Circuits

LDO #2 

150 mA

LDO #1 

300 mA

LDO #2 

150 mA

V

IN

V

OUT1

V

OUT2

Bandgap

Reference

1.2V

SHDN2

Threshold 

Detector

Time Delay

300 ms, typ

RESET

V

DET

GND

Bypass

TC1301A

V

DET

 

 

TC1301B

 

V

IN

SHDN2

GND

Bypass

SHDN1

LDO #1 

300 mA

Threshold

Detector

Time Delay

300 ms typ

V

OUT1

V

OUT2

RESET

V

OU

T

1

Bandgap

Reference

1.2V

V

OUT1

8

4

1

2

3

RESET

GND

V

DET

BATTERY

C

OUT1

1 µF Ceramic
X5R

C

IN

1 µF

TC1301A

C

OUT2

1 µF Ceramic 
X5R

C

BYPASS

(Note)

 

10 nF Ceramic

Bypass

V

IN

7

V

OUT2

6

SHDN2

ON/OFF Control V

OUT2

System RESET

2.8V @ 300 mA

2.6V @ 150 mA

5

V

OUT1

8

4

1

2

3

RESET

GND

SHDN1

BATTERY

C

OUT1

1 µF Ceramic
X5R

C

IN

1 µF

TC1301B

1 µF Ceramic 
X5R

Bypass

V

IN

7

2.7V

to

4.2V

V

OUT2

6

SHDN2

ON/OFF Control V

OUT2

System RESET

2.8V @ 300 mA

2.6V @ 150 mA

5

ON/OFF Control V

OUT1

Note: C

BYPASS

 is optional

2.7V

to

4.2V

C

OUT2

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© 2008 Microchip Technology Inc.

DS21798C-page 3

TC1301A/B

1.0

ELECTRICAL 
CHARACTERISTICS

Absolute Maximum Ratings †

V

DD

...................................................................................6.5V

Maximum Voltage on Any Pin  ...... (V

SS

 – 0.3) to (V

IN

 + 0.3)V

Power Dissipation ..........................Internally Limited (Note 7)

Storage temperature .....................................-65°C to +150°C

Maximum Junction Temperature, T

J

........................... +150°C

Continuous Operating Temperature Range ..-40°C to +125°C

ESD protection on all pins, HBM, MM

..................... 4 kV, 400V

† Notice: Stresses above those listed under “Maximum
Ratings” may cause permanent damage to the device. This is
a stress rating only and functional operation of the device at
those or any other conditions above those indicated in the
operational listings of this specification is not implied.
Exposure to maximum rating conditions for extended periods
may affect device reliability.

DC CHARACTERISTICS

Electrical Specifications: Unless otherwise noted, V

IN

 = V

R

 +1V, I

OUT1

 =

 

I

OUT2 

= 100 µA, C

IN

 = 4.7 µF, C

OUT1

 = C

OUT2

 = 1 µF, 

C

BYPASS

 = 10 nF, SHDN > V

IH

, T

A

 = +25°C. 

Boldface type specifications apply for junction temperatures of -40°C to +125°C.

Parameters

Sym

Min

Typ

Max

Units

Conditions

Input Operating Voltage

V

IN

2.7

6.0

V

Note 1

Maximum Output Current

I

OUT1Max

300

mA

V

IN

 = 2.7V to 6.0V (Note 1)

Maximum Output Current

I

OUT2Max

150

mA

V

IN

 = 2.7V to 6.0V (Note 1)

Output Voltage Tolerance
(V

OUT1

 and V

OUT2

)

V

OUT

V

– 2.5

V

R

±0.5 V

+ 2.5

%

Note 2

Temperature Coefficient 
(V

OUT1

 and V

OUT2

)

TCV

OUT

25

ppm/°C

Note 3

Line Regulation
(V

OUT1

 and V

OUT2

)

ΔV

OUT

/

ΔV

IN

0.02

0.2

%/V

(V

R

+1V) 

≤ V

IN

 

≤ 6V

Load Regulation, V

OUT

 

≥ 2.5V

(V

OUT1

 and V

OUT2

ΔV

OUT

/

V

OUT

-1

0.1

+1

%

I

OUTX

 = 0.1 mA to I

OUTMax 

(Note 4)

Load Regulation, V

OUT

 < 2.5V

(V

OUT1

 and V

OUT2

)

ΔV

OUT

/

V

OUT

-1.5

0.1

+1.5

%

I

OUTX

 = 0.1 mA to I

OUTMax 

(Note 4)

Thermal Regulation

ΔV

OUT

/

ΔP

D

0.04

%/W

Note 5

Dropout Voltage (Note 6)

V

OUT1

 

≥ 2.7V

V

IN

 – V

OUT

104

180

mV

I

OUT1

 = 300 mA

V

OUT2

 

≥ 2.6V

V

IN

 – V

OUT

150

250

mV

I

OUT2

 = 150 mA

Supply Current

TC1301A

I

IN(A)

103

180

µA

SHDN2 = V

IN

, V

DET 

= OPEN,

I

OUT1

 = I

OUT2

 = 0 mA

TC1301B

I

IN(B)

114

180

µA

SHDN1 = SHDN2  = V

IN

,

I

OUT1

 = I

OUT2

 = 0 mA

Note

1:

The minimum V

IN

 has to meet two conditions: V

IN

 

≥ 2.7V and V

IN

 

≥ V

R

 + V

DROPOUT

.

2:

V

R

 is defined as the higher of the two regulator nominal output voltages (V

OUT1

 or V

OUT2

).

3:

TCV

OUT

 = ((V

OUTmax

 - V

OUTmin

) * 10

6

)/(V

OUT

 * 

ΔT).

4:

Regulation is measured at a constant junction temperature using low duty-cycle pulse testing. Load regulation is tested 
over a load range from 0.1 mA to the maximum specified output current. Changes in output voltage due to heating 
effects are covered by the thermal regulation specification.

5:

Thermal regulation is defined as the change in output voltage at a time t after a change in power dissipation is applied, 
excluding load or line regulation effects. Specifications are for a current pulse equal to I

LMAX

 at V

IN

 = 6V for 

t = 10 ms.

6:

Dropout voltage is defined as the input-to-output voltage differential at which the output voltage drops 2% below its value 
measured at a 1V differential.

7:

The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction 
temperature and the thermal resistance from junction-to-air (i.e., T

A

, T

J

θ

JA

). Exceeding the maximum allowable power 

dissipation causes the device to initiate thermal shutdown

.

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TC1301A/B

DS21798C-page 4

© 2008 Microchip Technology Inc.

Shutdown Supply Current 
TC1301A

I

IN_SHDNA

58

90

µA

SHDN2 = GND, V

DET

 = OPEN

Shutdown Supply Current 
TC1301B

I

IN_SHDNB

0.1

1

µA

SHDN1 = SHDN2 = GND

Power Supply Rejection Ratio

PSRR

58

dB

≤ 100 Hz, I

OUT1

 = I

OUT2

 = 50 mA,

C

IN

 = 0 µF

Output Noise

eN

830

nV/(Hz)

½

≤ 1 kHz, I

OUT1

 = I

OUT2

 = 50 mA,

C

IN

 = 0 µF

Output Short-Circuit Current (Average)

V

OUT1

I

OUTsc

200

mA

R

LOAD1

 

≤ 1Ω

V

OUT2

I

OUTsc

140

mA

R

LOAD2

 

≤ 1Ω

SHDN Input High Threshold

V

IH

45

%V

IN

V

IN

 = 2.7V to 6.0V

SHDN Input Low Threshold

V

IL

15

%V

IN

V

IN

 = 2.7V to 6.0V

Wake-Up Time (From SHDN 
mode), (V

OUT2

)

t

WK

5.3

20

µs

V

IN

 = 5V, I

OUT1

 = I

OUT2

 = 30 mA,

See 

Figure 5-1

Settling Time (From SHDN mode), 
(V

OUT2

)

t

S

50

µs

V

IN

 = 5V, I

OUT1

 = I

OUT2

 = 50 mA,

See 

Figure 5-2

Thermal Shutdown Die
Temperature

T

SD

150

°C

V

IN

 = 5V, I

OUT1

 = I

OUT2

 = 100 µA

Thermal Shutdown Hysteresis

T

HYS

10

°C

V

IN

 = 5V

Voltage Range

V

DET

1.0
1.2

6.0
6.0

V

T

A

 = 0°C to +70°C

T

A

 = -40°C to +125°C

RESET Threshold

V

TH

-1.4

+1.4

%

-2.8

+2.8

%

T

A

 = -40°C to +125°C

RESET Threshold Tempco

ΔV

TH

/

ΔT

30

ppm/°C

V

DET

 RESET Delay

t

RPD

180

µs

V

DET

 = V

TH

 to (V

TH

 – 100 mV),

See 

Figure 5-3

RESET Active Time-out Period

t

RPU

140

300

560

ms

V

DET 

 = V

TH

 - 100 mV to V

TH

 + 100 mV, 

I

SINK

 = 1.2 mA, See 

Figure 5-3

.

RESET Output Voltage Low

V

OL

0.2

V

V

DET 

 = V

THmin

, I

SINK

 = 1.2 mA,

I

SINK

 = 100 µA for V

DET

 < 1.8V,

See 

Figure 5-3

RESET Output Voltage High

V

OH

0.9 

V

DET

V

V

DET

 > V

THmax

, I

SOURCE

 = 500 µA,

See 

Figure 5-3

DC CHARACTERISTICS (CONTINUED)

Electrical Specifications: Unless otherwise noted, V

IN

 = V

R

 +1V, I

OUT1

 =

 

I

OUT2 

= 100 µA, C

IN

 = 4.7 µF, C

OUT1

 = C

OUT2

 = 1 µF, 

C

BYPASS

 = 10 nF, SHDN > V

IH

, T

A

 = +25°C. 

Boldface type specifications apply for junction temperatures of -40°C to +125°C.

Parameters

Sym

Min

Typ

Max

Units

Conditions

Note

1:

The minimum V

IN

 has to meet two conditions: V

IN

 

≥ 2.7V and V

IN

 

≥ V

R

 + V

DROPOUT

.

2:

V

R

 is defined as the higher of the two regulator nominal output voltages (V

OUT1

 or V

OUT2

).

3:

TCV

OUT

 = ((V

OUTmax

 - V

OUTmin

) * 10

6

)/(V

OUT

 * 

ΔT).

4:

Regulation is measured at a constant junction temperature using low duty-cycle pulse testing. Load regulation is tested 
over a load range from 0.1 mA to the maximum specified output current. Changes in output voltage due to heating 
effects are covered by the thermal regulation specification.

5:

Thermal regulation is defined as the change in output voltage at a time t after a change in power dissipation is applied, 
excluding load or line regulation effects. Specifications are for a current pulse equal to I

LMAX

 at V

IN

 = 6V for 

t = 10 ms.

6:

Dropout voltage is defined as the input-to-output voltage differential at which the output voltage drops 2% below its value 
measured at a 1V differential.

7:

The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction 
temperature and the thermal resistance from junction-to-air (i.e., T

A

, T

J

θ

JA

). Exceeding the maximum allowable power 

dissipation causes the device to initiate thermal shutdown

.

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DS21798C-page 5

TC1301A/B

TEMPERATURE SPECIFICATIONS

Electrical Specifications: 

Unless otherwise indicated, all limits are specified for: V

IN

 = +2.7V to +6.0V.

Parameters

Sym

Min

Typical

Max

Units

Conditions

Temperature Ranges

Operating Junction Temperature 
Range

T

A

-40

+125

°C

Steady State

Storage Temperature Range

T

A

-65

+150

°C

Maximum Junction Temperature 

T

J

+150

°C

Transient

Thermal Package Resistances

Thermal Resistance, 8LD MSOP

θ

JA

208

°C/W

Typical 4-Layer Board

Thermal Resistance, 8LD DFN

θ

JA

41

°C/W

Typical 4-Layer Board with Vias

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TC1301A/B

DS21798C-page 6

© 2008 Microchip Technology Inc.

2.0

TYPICAL PERFORMANCE CURVES

Note: Unless otherwise indicated, 

V

IN

 = V

R

 +1V, I

OUT1

 =

 

I

OUT2 

= 100 µA, C

IN

 = 4.7 µF, C

OUT1 = 

C

OUT2

 = 1 µF (X5R or X7R),

C

BYPASS

 = 0 pF, SHDN1 = SHDN2 > V

IH

. For the TC1301A, V

DET

 = V

OUT1

, RESET = OPEN, T

A

 = +25°C.

FIGURE 2-1:

Quiescent Current vs. Input 

Voltage.

FIGURE 2-2:

SHDN Voltage Threshold 

vs. Input Voltage.

FIGURE 2-3:

Quiescent Current vs. 

Junction Temperature.

FIGURE 2-4:

Output Voltage vs. Input 

Voltage.

FIGURE 2-5:

Output Voltage vs. Input 

Voltage.

FIGURE 2-6:

Dropout Voltage vs. Output 

Current (V

OUT1

).

Note:

The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.

0

50

100

150

200

250

300

350

2.7 3.0 3.3 3.6 3.9 4.2 4.5 4.8 5.1 5.4 5.7 6.0

Input Voltage (V)

Q

u

iescent Cur

re

nt (µA)

V

OUT2

 SHDN

V

OUT2

 Active

T

J

 = 25°C

I

OUT1

 = I

OUT2

 = 0 µA

V

OUT1

 Active

TC1301B

0.8

0.9

1.0

1.1

1.2

1.3

1.4

1.5

1.6

1.7

1.8

2.7

3

3.3 3.6 3.9 4.2 4.5 4.8 5.1 5.4 5.7

6

Input Voltage (V)

S

HDN Threshold (V

)

ON

OFF

40

50

60

70

80

90

100

110

120

130

140

-40 -25 -10

5

20 35 50

65 80 95 110 125

Junction Temperature (°C)

Q

u

iescent Cur

re

nt (µA)

V

IN

 = 4.2V

I

OUT1

 = I

OUT2

 = 0 µA

V

OUT1

 Active

V

OUT2

 SHDN

V

OUT2

 Active

TC1301B

2.60

2.70

2.80

2.90

3.00

2.7

3

3.3 3.6 3.9 4.2 4.5 4.8 5.1 5.4 5.7

6

Input Voltage (V)

O

u

tput V

o

lt

age (V

)

T

J

 = 25°C

I

OUT1

 = 100 mA

I

OUT2

 = 50 mA

V

OUT1

V

OUT2

2.50

2.55

2.60

2.65

2.70

2.75

2.80

2.85

2.90

2.7

3

3.3 3.6 3.9 4.2 4.5 4.8 5.1 5.4 5.7

6

Input Voltage (V)

O

u

tput V

o

lt

age (V

)

T

J

 = +25°C

I

OUT1

 = 300 mA

I

OUT2

 = 100 mA

V

OUT1

V

OUT2

0.0

20.0

40.0

60.0

80.0

100.0

120.0

140.0

0

50

100

150

200

250

300

I

OUT1

 (mA)

Dropout Voltage V

OUT1

 (mV

)

V

R1

 = 2.8V

V

R2

 = 2.6V

I

OUT2

 = 100 µA

T

J

 = - 40°C

T

J

 = +25°C

T

J

 = +125°C

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© 2008 Microchip Technology Inc.

DS21798C-page 7

TC1301A/B

Note: Unless otherwise indicated, 

V

IN

 = V

R

 +1V, I

OUT1

 =

 

I

OUT2 

= 100 µA, C

IN

 = 4.7 µF, C

OUT1 = 

C

OUT2

 = 1 µF (X5R or X7R),

C

BYPASS

 = 0 pF, SHDN1 = SHDN2 > V

IH

. For the TC1301A, V

DET

 = V

OUT1

, RESET = OPEN, T

A

 = +25°C.

FIGURE 2-7:

Dropout Voltage vs. 

Junction Temperature (V

OUT1

).

FIGURE 2-8:

Dropout Voltage vs. Output 

Current (V

OUT2

).

FIGURE 2-9:

Dropout Voltage vs. 

Junction Temperature (V

OUT2

).

FIGURE 2-10:

V

OUT1

 and V

OUT2

 Load 

Regulation vs. Junction Temperature.

FIGURE 2-11:

V

OUT1

 and V

OUT2

 Line 

Regulation vs. Junction Temperature.

FIGURE 2-12:

V

OUT1

 vs. Junction 

Temperature.

0

20

40

60

80

100

120

140

-40 -25 -10

5

20 35 50 65 80 95 110 125

Junction Temperature (°C)

Dropout Voltage V

OUT1

 (mV

)

V

R1

 = 2.8V

V

R2

 = 2.6V

I

OUT2

 = 100 µA

I

OUT1

 = 300 mA

I

OUT1

 = 100 mA

I

OUT1

 = 50 mA

0

20

40

60

80

100

120

140

160

180

0

30

60

90

120

150

I

OUT2

 (mA)

Dropout Voltage, V

OUT2 

(mv)

V

R1

 = 2.8V

V

R2

 = 2.6V

I

OUT1

 = 100 µA

T

J

 = +125°C

T

J

 = +25°C

T

J

 = - 40°C

0

20

40

60

80

100

120

140

160

180

-40 -25 -10

5

20 35 50 65 80 95 110 125

Junction Temperature (°C)

Dropout Voltage V

OUT2

 (mV

)

V

R1

 = 2.8V

V

R2

 = 2.6V

I

OUT1

 = 100 µA

I

OUT2

 = 150 mA

I

OUT2

 = 50 mA

I

OUT2

 = 10 mA

-0.40

-0.30

-0.20

-0.10

0.00

0.10

0.20

0.30

0.40

-40 -25 -10

5

20

35

50

65

80

95 110 125

Junction Temperature (125°C)

Load Regul

at

ion (

%

)

I

OUT2

 = 0.1 mA to 150 mA

I

OUT1

 = 0.1 mA to 300 mA

V

R1

 = 2.8V

V

R2

 = 2.6V

V

IN

 = 4.2

V

OUT2

V

OUT1

0.000

0.005

0.010

0.015

0.020

0.025

0.030

0.035

0.040

0.045

-40 -25 -10

5

20 35 50 65 80 95 110 125

Junction Temperature (°C)

Line Regulation (%/V)

V

IN

 = 3.8V to 6.0V

V

R1

 = 2.8V, I

OUT1

 = 100 µA

V

R2

 = 2.6V, I

OUT2

 = 100 µA

V

OUT1

V

OUT2

2.808

2.812

2.816

2.820

2.824

2.828

2.832

-40 -25 -10

5

20 35 50 65 80 95 110 125

Junction Temperature (°C)

Output Voltage V

OU

T1

 (V)

V

IN

 = 4.2V

V

R1

 = 2.8V

V

R2

 = 2.6V, I

OUT2

 = 100 µA

I

OUT1

 = 300 mA

I

OUT1

 = 100 µA

I

OUT1

 = 100 mA

/var/www/html/datasheet/sites/default/files/pdfhtml_dummy/21798c-html.html
background image

TC1301A/B

DS21798C-page 8

© 2008 Microchip Technology Inc.

Note: Unless otherwise indicated, 

V

IN

 = V

R

 +1V, I

OUT1

 =

 

I

OUT2 

= 100 µA, C

IN

 = 4.7 µF, C

OUT1 = 

C

OUT2

 = 1 µF (X5R or X7R),

C

BYPASS

 = 0 pF, SHDN1 = SHDN2 > V

IH

. For the TC1301A, V

DET

 = V

OUT1

, RESET = OPEN, T

A

 = +25°C.

FIGURE 2-13:

V

OUT1

 vs. Junction 

Temperature.

FIGURE 2-14:

V

OUT2

 vs. Junction 

Temperature.

FIGURE 2-15:

V

OUT2

 vs. Junction 

Temperature.

FIGURE 2-16:

I

DET

 current vs. Junction 

Temperature.

FIGURE 2-17:

RESET Active Time vs. 

Junction Temperature.

FIGURE 2-18:

V

DET

 Trip Point vs. Junction 

Temperature.

2.808

2.816

2.824

2.832

2.840

2.848

2.856

-40 -25 -10

5

20

35

50

65

80

95 110 125

Junction Temperature (°C)

Output Vol

tage V

OUT1

 (V)

V

R1

 = 2.8V, I

OUT1

 = 300 mA

V

R2

 = 2.6V, I

OUT2

 = 100 µA

V

IN

 = 6.0V

V

IN

 = 4.2V

V

IN

 = 3.0V

2.615

2.620

2.625

2.630

2.635

2.640

2.645

-40 -25 -10

5

20

35

50

65

80

95 110 125

Junction Temperature (°C)

Output Vol

tage V

OUT2

 (V)

V

IN

 = 4.2V

V

R1

 = 2.8V, I

OUT1

 = 100 µA

V

R2

 = 2.6V

I

OUT2

 = 150 mA

I

OUT2

 = 100 µA

I

OUT2

 = 50 mA

2.624

2.628

2.632

2.636

2.640

2.644

-40 -25 -10

5

20 35 50 65 80 95 110 125

Junction Temperature (°C)

O

u

tput V

o

lt

age V

OUT2

 (V

)

V

R1

 = 2.8V, I

OUT1

 = 100 µA

V

R2

 = 2.6V, I

OUT2

 = 150 mA

V

IN

 = 6.0V

V

IN

 = 3.0V

V

IN

 = 4.2V

0

5

10

15

20

25

30

-40 -25 -10

5

20

35

50

65

80

95 110 125

Junction Temperature (°C)

I

VD

ET

 (µA)

V

DET

 = 6.0V

V

DET

 = 4.2V

V

DET

 = 3.0V

V

R1

 = 2.8V

V

R2

 = 2.6V

200

225

250

275

300

325

350

375

400

-40 -25 -10

5

20

35

50

65

80

95 110 125

Junction Temperature (°C)

RESET

 Acti

v

e

 Ti

me (ms)

V

IN

 = 4.2V

V

R1

 = 2.8V

V

R2

 = 2.6V

V

DET

 = 2.63V

2.6355

2.6360

2.6365

2.6370

2.6375

2.6380

2.6385

2.6390

2.6395

-40 -25 -10

5

20

35

50

65

80

95 110 125

Junction Temperature (°C)

V

DE

T

 Trip Point

 (

V

)

V

IN

 = 4.2V

V

R1

 = 2.8V

V

R2

 = 2.6V

V

DET

 = 2.63V

/var/www/html/datasheet/sites/default/files/pdfhtml_dummy/21798c-html.html
background image

© 2008 Microchip Technology Inc.

DS21798C-page 9

TC1301A/B

Note: Unless otherwise indicated, 

V

IN

 = V

R

 +1V, I

OUT1

 =

 

I

OUT2 

= 100 µA, C

IN

 = 4.7 µF, C

OUT1 = 

C

OUT2

 = 1 µF (X5R or X7R),

C

BYPASS

 = 0 pF, SHDN1 = SHDN2 > V

IH

. For the TC1301A, V

DET

 = V

OUT1

, RESET = OPEN, T

A

 = +25°C.

FIGURE 2-19:

Power Supply Rejection 

Ratio vs. Frequency (without bypass capacitor).

FIGURE 2-20:

Power Supply Rejection 

Ratio vs. Frequency (with bypass capacitor).

FIGURE 2-21:

V

OUT1

 and V

OUT2

 Noise vs. 

Frequency (without bypass capacitor).

FIGURE 2-22:

V

OUT1

 and V

OUT2

 Noise vs. 

Frequency (with bypass capacitor).

FIGURE 2-23:

V

OUT1

 and V

OUT2

 Power-up 

from Shutdown TC1301B.

FIGURE 2-24:

V

OUT2

 Power-up from 

Shutdown Input TC1301A.

0.01

0.1

1

10

0.01

0.1

1

10

100

1000

Frequency (KHz)

NOISE (μV/

—Hz)

V

IN

 = 4.2V

V

R1

 = 2.8V

V

R2

=2.6V

I

OUT1

 = 150 mA

I

OUT2

 =  100 mA

C

BYPASS

 = 0 nF

V

OUT1

V

OUT2

0.001

0.01

0.1

1

10

0.01

0.1

1

10

100

1000

Frequency (KHz)

NOISE (μV/

—Hz)

V

IN

 = 4.2V

V

R1

 = 2.8V

V

R2

=2.6V

I

OUT1

 = 150 mA

I

OUT2

 =  100 mA

C

BYPASS

 = 10 nF

V

OUT1

V

OUT2

/var/www/html/datasheet/sites/default/files/pdfhtml_dummy/21798c-html.html
background image

TC1301A/B

DS21798C-page 10

© 2008 Microchip Technology Inc.

Note: Unless otherwise indicated, 

V

IN

 = V

R

 +1V, I

OUT1

 =

 

I

OUT2 

= 100 µA, C

IN

 = 4.7 µF, C

OUT1 = 

C

OUT2

 = 1 µF (X5R or X7R),

C

BYPASS

 = 0 pF, SHDN1 = SHDN2 > V

IH

. For the TC1301A, V

DET

 = V

OUT1

, RESET = OPEN, T

A

 = +25°C.

FIGURE 2-25:

V

OUT1

 and V

OUT2

 Power-up 

from Input Voltage TC1301B.

FIGURE 2-26:

Dynamic Line Response.

FIGURE 2-27:

300 mA Dynamic Load Step 

V

OUT1

.

FIGURE 2-28:

150 mA Dynamic Load Step 

V

OUT2

.

FIGURE 2-29:

RESET Power-Up From V

IN

 

TC1301B.

FIGURE 2-30:

TC1301A RESET Power-

Down.

Maker
Microchip Technology Inc.
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