ATA663232/55 LIN System Basis Chip Including LIN Transceiver, Voltage Regulator and Wake-Input

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DS20005878A-page 1

ATA663232/55

Features

• Supply Voltage up to 40V
• Operating Voltage V

VS

 = 5V to 28V

• Supply Current

- Sleep Mode: Typically 9 μA
- Silent Mode: Typically 47 μA
- Very Low Current Consumption at Low 

Supply Voltages (2V < V

VS

< 5.5V): Typically 

130 μA

• Linear Low Drop Voltage Regulator, 85 mA 

Current Capability:
- MLC (Multi-Layer Ceramic) Capacitor with 

0Ω ESR

- Normal, Fail-Safe and Silent Mode 

ATA663255: V

VCC

= 5.0V ± 2%

ATA663232: V

VCC

= 3.3V ± 2%

- Sleep Mode: VCC Is Switched Off

• VCC Undervoltage Detection with Internal Reset 

(NRES_int)

• Voltage Regulator Is Short Circuit and 

Overtemperature Protected

• LIN Physical Layer According to LIN 2.0, 2.1, 2.2, 

2.2A and SAEJ2602-2

• Wake-Up Capability via LIN Bus (100 μs 

Dominant) and WKin Pin (100 μs Low Level)

• Wake-Up Source Recognition
• TXD Time-Out Timer
• Bus Pin Is Overtemperature and Short Circuit 

Protected versus GND and Battery

• Advanced EMC and ESD Performance
• Fulfills the “OEM Hardware Requirements for LIN 

in Automotive Applications”, Version.1.3

• Interference and Damage Protection According to 

ISO7637

• Qualified According to AEC-Q100
• Available in 8-Pin, 3 mm x 3 mm VDFN Package 

with Wettable Flanks (Moisture Sensitivity Level 1)

Applications

• LIN Networks in Automotive
• Industrial
• Medical
• Consumer Applications

General Description

The ATA663232/55 system basis chip is a fully
integrated LIN transceiver, designed according to the
LIN specification 2.0, 2.1, 2.2, 2.2A and SAEJ2602-2,
with a low drop voltage regulator (3.3V/5V/85 mA) and
a high voltage wake-input. The combination of voltage
regulator and bus transceiver makes it possible to
develop simple but powerful slave nodes in LIN bus
systems. ATA663232/55 is designed to handle the low
speed data communication in vehicles (for example, in
convenience electronics). Improved slope control at
the LIN driver ensures secure data communication up
to 20 Kbaud. The bus output is designed to withstand
high voltage. Sleep mode and Silent mode guarantee
minimized current consumption even in the case of a
floating or a short circuited LIN bus.
The voltage regulator is a fully integrated low drop
voltage regulator, with 5V/3.3V output voltage and
85 mA current capability. It is especially designed for
the automotive environment. A key feature is that the
current consumption is always below 170 μA (without
load), even if the supply voltage is below the regulator’s
nominal output voltage.

Package Type

ATA663232/55

 3 mm x 3 mm 8-Lead VDFN* 

* Includes Exposed Thermal Pad (EP); see 

Table 1-4

.

VCC

LIN

VS

GND

RXD

WKin

EN

TXD

ATA663232
ATA663255

9DFN8

3 x 3

LIN System Basis Chip Including LIN Transceiver, Voltage 

Regulator and Wake-Input

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ATA663232/55

DS20005878A-page 2

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Functional Block Diagram

5

GND

2

EN

4

TXD

1

RXD

VCC

8

WKin

NRES_int

3

Short

circuit and

overtemperature
protection

Normal/Silent/

Fail-safe Mode

3.3V/5V

Control

unit

Normal and

Fail-safe

Mode

RF-filter

LIN

VS

7

6

TXD

Time-out

timer

Slew rate control

Undervoltage Reset

Sleep

mode

VCC

switched

off

Wake-up bus timer

Atmel ATA663232/55

Receiver

9&&

-

+

9&&

Wake-up

Timer

96

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DS20005878A-page 3

ATA663232/55

1.0

FUNCTIONAL DESCRIPTION

1.1

Physical Layer Compatibility

Because the LIN physical layer is independent of
higher LIN layers (for example LIN protocol layer), all
nodes with a LIN physical layer according to revision
2.x can be mixed with LIN physical layer nodes based
on earlier versions (LIN 1.0, LIN 1.1, LIN 1.2, LIN 1.3)
without any restrictions.

1.2

Operating Modes

FIGURE 1-1:

OPERATING MODES

1.2.1

NORMAL MODE

This is the normal transmitting and receiving mode of
the LIN Interface, in accordance with LIN specification
2.x.
The VCC voltage regulator operates with 3.3V/5V
output voltage, with a low tolerance of ±2% and a
maximum output current of 85 mA. If an undervoltage
condition occurs, the internal reset NRES_int switches
to low and the IC changes its state to Fail-Safe mode.

1.2.2

SILENT MODE

A falling edge at EN while TXD is high switches the IC
into Silent mode. The TXD signal has to be logic high
during the mode select window (

Figure 1-2

). 

The transmission path is disabled in Silent mode. The
voltage regulator is active. The overall supply current
from V

Bat

 is a combination of the I

VSsilent

= 47 μA plus

the VCC regulator output current I

VCC

.

a: V

9S

 > V

VS_th_U_F_up

 (2.4V)

b: V

9S

 < V

VS_th_U_down

 (1.9V)

c: Bus wake-up event (LIN)

EN = 1

EN = 0

“Go to sleep”

command

“Go to silent”

command

EN = 0

b

c & f,

g & f

EN = 0

TXD = 0

EN = 0

TXD = 1

EN = 1

& f

EN = 1

& f

d,
e

c & f,
g & f,
d

b

a

b

& f

Fail-safe Mode

VCC: ON

VCC monitor active

Communication: OFF

Wake-up Signaling

Undervoltage Signaling

Normal Mode

VCC: ON

VCC monitor active

Communication: ON

Sleep Mode

VCC: OFF

Communication: OFF

Unpowered Mode

All circuitry OFF

Silent Mode

VCC: ON

VCC monitor active

Communication: OFF

d: V

9CC

 < V

9CC_th_uv_down

 (2.2V/4.2V)

e: V

9S

 < V

VS_th_N_F_down

 (3.9V)

f: V

9S

 > V

VS_th_F_N_up

 (4.9V)

g: Local wake up (WKin)

TXD = 0

& f 

(1)

TXD = 1

& d & f 

(1)

TABLE 1-1:

OPERATING MODES

Operating Mode

Transceiver

VCC

LIN

TXD

RXD

Fail-Safe

OFF

3.3V/5V

Recessive

Signaling fail-safe sources (see 

Table 1-2

)

Normal

ON

3.3V/5V

TXD-dependent

Follows data transmission

Silent

OFF

3.3V/5V

Recessive

High

High

Sleep/Unpowered

OFF

0V

Recessive

Low

Low

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FIGURE 1-2:

SWITCHING TO SILENT MODE.

In Silent mode the internal slave termination between
the LIN pin and VS pin is disabled to minimize the
current consumption in case the pin LIN is
short-circuited to GND. Only a weak pull-up current
(typically 10 μA) between the LIN pin and VS pin is
present. Silent mode can be activated independently
from the current level on pin LIN.

If an undervoltage condition occurs, the internal reset
NRES_int switches to low and the System Basis Chip
(SBC) changes its state to Fail-Safe mode.

1.2.3

SLEEP MODE

A falling edge at EN while TXD is low switches the IC
into Sleep mode. The TXD signal has to be logic low
during the mode select window (

Figure 1-3

).

FIGURE 1-3:

SWITCHING TO SLEEP MODE

Delay time silent mode

t

d

_silent = maximum 20μs

Mode select window

LIN switches directly to recessive mode

t

d

 = 3.2μs

LIN

VCC

NRES_int

TXD

EN

Normal Mode

Silent Mode

Delay time sleep mode

t

d_sleep

 = maximum 20μs

LIN switches directly to recessive mode

t

d

 = 3.2μs

LIN

VCC

NRES_int

TXD

EN

Sleep Mode

Normal Mode

Mode select window

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DS20005878A-page 5

ATA663232/55

In order to avoid any influence to the LIN pin when
switching into Sleep mode it is possible to switch the
EN pin up to 3.2 μs earlier to low than the TXD pin. The
easiest and best way to do this is by having two falling
edges at TXD and EN at the same time.
In Sleep mode, the transmission path is disabled.
Supply current from V

Bat

 is typically I

VSsleep

= 9 μA.

The VCC regulator is switched off, the internal reset
NRES_int and pin RXD are low. The internal slave
termination between the LIN pin and VS pin is disabled
to minimize the current consumption in case the LIN pin
is short-circuited to GND. Only a weak pull up current
(typically 10 μA) between the LIN pin and the VS pin is
present. The Sleep mode can be activated
independently from the current level on the LIN pin.
Voltage below the LIN pre-wake detection V

LINL

 at the

LIN pin activates the internal LIN receiver and starts the
wake-up detection timer.
If the TXD pin is short circuited to GND, it is possible to
switch to Sleep mode via EN after t > t

dom

.

1.2.4

FAIL-SAFE MODE

The device automatically switches to Fail-Safe mode at
system power-up. The voltage regulator is switched on.
The internal reset NRES_int remains low for t

res

= 4 ms

and LIN communication is switched off. The IC stays in
this mode until EN is switched to high. The IC then
changes to Normal mode. A low level at the internal
reset NRES_int switches the IC into Fail-Safe mode
directly. During Fail-Safe mode the TXD pin is an output
and together with the RXD output pin, signals the fail-
safe source.
If the device enters Fail-Safe mode coming from the
Normal mode (EN = 1) due to an VS undervoltage
condition (V

VS

< V

VS_th_N_F_down

), it is possible to

switch into Sleep or Silent mode by a falling edge at the
EN input. With this feature the current consumption can
be further reduced.
A wake-up event switches the IC to Fail-Safe mode.
A wake-up event from either Silent or Sleep mode is
signaled to the microcontroller using the RXD pin and
the TXD pin. A VS undervoltage condition is also
signaled at these two pins. The coding is shown in

Table 1-2

1.3

Wake-Up Scenarios from Silent 
Mode or Sleep Mode

1.3.1

REMOTE WAKE-UP VIA LIN BUS

1.3.1.1

Remote Wake-up from Silent Mode

A remote wake-up from Silent mode is only possible if
TXD is high. A voltage less than the LIN pre-wake
detection VLINL at the LIN pin activates the internal LIN
receiver and starts the wake-up detection timer. A
falling edge at the LIN pin followed by a dominant bus
level maintained for a certain period of time (> t

bus

) and

the following rising edge at pin LIN (see 

Figure 1-4

)

result in a remote wake-up request. The device
switches from Silent mode to Fail-Safe mode, the VCC
voltage regulator remains activated and the internal
LIN slave termination resistor is switched on. The
remote wake-up request is indicated by a low level at
the RXD pin and TXD pin (strong pull-down at TXD).
EN high can be used to switch directly to Normal mode.

TABLE 1-2:

SIGNALING IN FAIL-SAFE MODE

Fail-Safe Sources

TXD

RXD

LIN wake-up (LIN pin)

Low

Low

Local wake-up (WKin pin)

Low

High

VS

th

 (battery) undervoltage detection (V

VS

< 3.9V)

High

Low

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FIGURE 1-4:

LIN WAKE-UP FROM SILENT MODE

1.3.1.2

Remote Wake-Up from Sleep Mode

A falling edge at the LIN pin followed by a dominant bus
level maintained for a certain period of time (> t

bus

) and

a following rising edge at the LIN pin result in a remote
wake-up request, causing the device to switch from
Sleep mode to Fail-Safe mode.

The VCC regulator is activated, and the internal LIN
slave termination resistor is switched on. The remote
wake-up request is indicated by a low level at RXD and
TXD (strong pull-down at TXD). See 

Figure 1-5

.

EN high can be used to switch directly from
Sleep/Silent mode to Normal mode. If EN is still high
after VCC ramp-up and undervoltage reset time, the IC
switches to Normal mode.

FIGURE 1-5:

LIN WAKE-UP FROM SLEEP MODE

Undervoltage detection active 

Silent mode 3.3V/5V

Fail-

6afe mode 3.3V/5V

Normal mode

Low

Fail-

6afe Mode

Normal Mode

EN High

High

NRES_int

EN

VCC

RXD

LIN bus

Bus wake-up filtering time

t

bus

High

TXD

High

Low (strong pull-down)

t

VCC

Off state

On state

Low

Fail-

6afe Mode

Normal Mode

EN High

Microcontroller

start-up time delay

Reset

time

Low

Low

NRES_int

EN

VCC

RXD

LIN bus

Bus wake-up filtering time

t

bus

High

TXD

Low (strong pull-down)

High

High

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ATA663232/55

1.3.2

LOCAL WAKE-UP VIA WKin PIN

A falling edge at the WKin pin followed by a low level
maintained for a given time period (> t

WKin

) results in a

local wake-up request. The device switches to
Fail-Safe mode. The internal slave termination resistor
is switched on. The local wake-up request is indicated

by a low level at the TXD pin to generate an interrupt
for the microcontroller. When the WKin pin is low, it is
possible to switch to Silent mode or Sleep mode via the
EN pin. In this case, the wake-up signal has to be
switched to high > 10 μs before the negative edge at
WKin starts a new local wake-up request.

FIGURE 1-6:

LOCAL WAKE-UP VIA WKin PIN FROM SLEEP MODE

FIGURE 1-7:

LOCAL WAKE-UP VIA WKin PIN FROM SILENT MODE

t

VCC

Off state

On state

High

Fail-

6afe Mode

Normal Mode

EN High

Microcontroller

start-up time delay

Reset

time

Low (strong pull-down)

Low

NRES_int

EN

VCC

RXD

WKin

TXD

Wake filtering time

t

WKin

State change

Fail-

6afe Mode

Normal Mode

EN High

High

NRES_int

EN

VCC

RXD

WKin

TXD

Low (strong pull-down)

Wake filtering time

t

WKin

State change

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1.3.3

WAKE-UP SOURCE RECOGNITION

The device can distinguish between different wake-up
sources. The wake-up source can be read on the TXD
and RXD pin in Fail-Safe mode. These flags are
immediately reset if the microcontroller sets the EN pin
to high and the IC is in Normal mode.

1.4

Behavior under Low Supply 
Voltage Condition

After the battery voltage has been connected to the
application circuit, the voltage at the VS pin increases
according to the block capacitor used in the application
(see 

Typical Application Circuit

). If V

VS

 is higher than

the minimum VS operation threshold V

VS_th_U_F_up

,

the IC mode changes from Unpowered mode to
Fail-Safe mode. As soon as V

VS

 exceeds the

undervoltage threshold V

VS_th_F_N_up

, the LIN

transceiver can be activated.
The VCC output voltage reaches its nominal value after
t

VCC

. This parameter depends on the externally applied

VCC capacitor and the load. The internal reset
NRES_int output is low for the reset time delay t

reset

.

No mode change is possible during this time t

reset

.

The behavior of VCC, the internal reset NRES_int and
VS is shown in 

Figure 1-8

Figure 1-9

Figure 1-10

 and

Figure 1-11

.

FIGURE 1-8:

VCC AND THE INTERNAL 
RESET NRES_INT 
VERSUS VS (RAMP-UP) 
FOR 3.3V.

FIGURE 1-9:

VCC AND THE INTERNAL 
RESET NRES_INT 
VERSUS VS 
(RAMP-DOWN) FOR 3.3V.

FIGURE 1-10:

VCC AND THE INTERNAL 
RESET NRES_INT 
VERSUS VS (RAMP-UP) 
FOR 5V

TABLE 1-3:

SIGNALING IN FAIL-SAFE MODE

Fail-Safe Sources

TXD

RXD

Bus wake-up (LIN pin)

Low

Low

Local wake-up (WKin pin)

Low

High

VS

th

 (battery) undervoltage detection (VS < 3.9V)

High

Low

V (V)

VS (V)

0.0

0.5

1.0

1.5

2.0

2.5

3.0

3.5

4.0

4.5

5.0

5.5

6.0

6.5

7.0

0.0

0.5

1.0

1.5

2.0

2.5

3.0

3.5

4.0

4.5

5.0

5.5

6.0

6.5

7.0

VS

VCC

NRES_int

V (V)

VS (V)

0.0

0.5

1.0

1.5

2.0

2.5

3.0

3.5

4.0

4.5

5.0

5.5

6.0

6.5

7.0

0.0

0.5

1.0

1.5

2.0

2.5

3.0

3.5

4.0

4.5

5.0

5.5

6.0

6.5

7.0

VS

VCC

NRES_int

V (V)

VS (V)

0.0

0.5

1.0

1.5

2.0

2.5

3.0

3.5

4.0

4.5

5.0

5.5

6.0

6.5

7.0

0.0

0.5

1.0

1.5

2.0

2.5

3.0

3.5

4.0

4.5

5.0

5.5

6.0

6.5

7.0

VS

NRES_int

VCC

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ATA663232/55

FIGURE 1-11:

VCC AND THE INTERNAL 
RESET NRES_INT 
VERSUS VS 
(RAMP-DOWN) FOR 5V.

The graphs are only valid if the VS ramp-up and
ramp-down times are much slower than the VCC
ramp-up time t

Vcc 

and the internal reset NRES_int

delay time t

reset

.

If during Sleep mode the voltage level of V

VS

 drops

below the undervoltage detection threshold
V

VS_th_N_F_down

 (typically 4.3V), the operation mode is

not changed and no wake-up is possible. Only if the
supply voltage on pin VS drops below the VS operation
threshold V

VS_th_U_down

 (typically 2.05V), does the IC

switch to Unpowered mode.
If during Silent mode the VCC voltage drops below the
VCC undervoltage threshold V

VCC_th_uv_down

 the IC

switches into Fail-Safe mode. If the supply voltage on
pin VS drops below the VS operation threshold
V

VS_th_U_down

 (typically 2.05V), does the IC switch to

Unpowered mode.
If during Normal mode the voltage level on the VS pin
drops below the VS undervoltage detection threshold
V

VS_th_N_F_down

 (typically 4.3V), the IC switches to

Fail-Safe mode. This means the LIN transceiver is
disabled in order to avoid malfunctions or false bus
messages. The voltage regulator remains active.
• For 3.3V SBC: In this undervoltage situation it is 

possible to switch the device into Sleep mode or 
Silent mode by a falling edge at the EN input. For 
this feature, switching into these two current 
saving modes is always guaranteed, allowing 
current consumption to be reduced even further. 
When the VCC voltage drops below the VCC 
undervoltage threshold V

VCC_th_uv_down 

(typically 

2.6V) the IC switches into Fail-Safe mode.

• For 5V SBC: Because of the VCC undervoltage 

condition in this situation, the IC is in Fail-Safe 
mode and can be switched into Sleep mode only. 
Only when the supply voltage V

VS 

drops below 

the operation threshold V

VS_th_U_down

 (typically 

2.05V) does the IC switch into Unpowered mode.

The current consumption of the SBC in Silent mode or
in Fail-Safe mode is always below 170 μA, even when
the supply voltage V

VS

 is lower than the regulator’s

nominal output voltage V

VCC

.

V (V)

VS (V)

0.0

0.5

1.0

1.5

2.0

2.5

3.0

3.5

4.0

4.5

5.0

5.5

6.0

6.5

7.0

0.0

0.5

1.0

1.5

2.0

2.5

3.0

3.5

4.0

4.5

5.0

5.5

6.0

6.5

7.0

VS

NRES_int

VCC

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1.5

Voltage Regulator

FIGURE 1-12:

VOLTAGE REGULATOR: SUPPLY VOLTAGE RAMP-UP AND RAMP-DOWN

The voltage regulator needs an external capacitor for
compensation and to smooth the disturbances from the
microcontroller. It is recommended to use a MLC
capacitor with a minimum capacitance of 3.5 μF
together with a 100 nF ceramic capacitor. Depending
on the application, the values of these capacitors can
be modified by the customer.
During a short circuit at VCC, the output limits the
output current to I

VCClim

. Because of undervoltage, the

internal reset NRES_int switches to low. If the chip
temperature exceeds the value T

VCCoff

, the VCC

output switches off. The chip cools down and, after a
hysteresis of T

hys

, switches the output on again.

When the ATA663232/55 is being soldered onto the
PCB it is mandatory to connect the exposed thermal
pad with a wide GND plate on the printed board to get
a good heat sink.
The main power dissipation of the IC is created from
the VCC output current I

VCC

, which is needed for the

application. See 

Figure 1-13

.

FIGURE 1-13:

POWER DISSIPATION: 
SAFE OPERATING AREA: 
REGULATOR’S OUTPUT 
CURRENT I

VCC

 VERSUS 

SUPPLY VOLTAGE VS AT 
DIFFERENT AMBIENT 
TEMPERATURES 
(R

thJA

= 50K/W 

ASSUMED).

VS

V

12V

3.3V/5.0V

V

VCC_th_uv_up

3.3V/5.0V

t

VCC

t

VCC

t

Reset

2.4V

t

res_f

NRES_int

t

V

VCC_th_uv_down

96 [V]

I_Vcc [mA]

Tamb = 125°C

Tamb = 115°C

Tamb = 105°C

Tamb = 95°C

Tamb = 85°C

0

10

2 0

3 0

4 0

50

6 0

70

8 0

9 0

5

6

7

8

9

10

11

12

13

14

15

16

17

18

Maker
Microchip Technology Inc.
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