ATA6564 High-Speed CAN Transceiver

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 2017 Microchip Technology Inc.

DS20005784B-page 1

ATA6564

Features

• Fully ISO 11898-2, ISO 11898-2: 2016 and SAE 

J2962-2 Compliant

• CAN  FD  Ready
• Communication Speed up to 5 Mbit/s
• Low Electromagnetic Emission (EME) and High 

Electromagnetic Immunity (EMI)

• Differential Receiver with Wide Common Mode 

Range

• Compatible to 3.3V and 5V Microcontrollers
• Functional Behavior Predictable under all Supply 

Conditions

• Transceiver Disengages from the Bus When Not 

Powered-up

• RXD Recessive Clamping Detection
• High Electrostatic Discharge (ESD) Handling 

Capability on the Bus Pins

• Bus Pins Protected against Transients in 

Automotive Environments

• Transmit Data (TXD) Dominant Time-out Function
• Undervoltage Detection on VCC and VIO Pins
• CANH/CANL Short-circuit and Overtemperature 

Protected

• Fulfills the OEM “Hardware Requirements for LIN, 

CAN and FlexRay Interfaces in Automotive 
Applications”, 

Rev. 1.3

• Qualified According to AEC-Q100
• Two Ambient Temperature Grades:

- ATA6564-GAQW1 and ATA6564-GBQW1 up 

to T

amb

= +125°C

- ATA6564-GAQW0 and ATA6564-GBQW0 up 

to T

amb

= +150°C 

• Packages: 8-pin SOIC, 8-pin VDFN with Wettable 

Flanks (Moisture Sensitivity Level 1)

Applications

Classical CAN and CAN FD networks in Automotive,
Industrial, Aerospace, Medical and Consumer
applications.

General Description

The ATA6564 is a high-speed CAN transceiver that
provides an interface between a controller area
network (CAN) protocol controller and the physical
two-wire CAN bus. The transceiver is designed for
high-speed (up to 5 Mbit/s) CAN applications in the
automotive industry, providing differential transmit and
receive capability to (a microcontroller with) a CAN
protocol controller.
It offers improved electromagnetic compatibility (EMC)
and electrostatic discharge (ESD) performance, as well
as features such as:
• ideal passive behavior to the CAN bus when the 

supply voltage is off

• direct interfacing to microcontrollers with supply 

voltages from 3V to 5V

Two operating modes together with the dedicated
fail-safe features make the ATA6564 an excellent
choice for all types of high-speed CAN networks
especially in nodes which do not require a Standby
mode with wake-up capability via the bus.

Package Types

ATA6564

8-pin SOIC

ATA6564

8-pin VDFN

1

2

3

4

8

5

TXD

GND

VCC

ATA6564

RXD

S

CANH

CANL

VIO

7

6

S

CANL

CANH

VIO

TXD

VCC

GND

RXD

ATA6564

High-Speed CAN Transceiver

with Silent Mode - CAN FD Ready

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ATA6564

DS20005784B-page 2

 2017 Microchip Technology Inc.

Functional Block Diagram

TABLE 0-1:

ATA6564 FAMILY MEMBERS

Device

Grade 0

Grade 1

VDFN8

SOIC8

Description

ATA6564-GAQW0

x

x

Silent mode, VIO - pin for compatibility 
with 3,3V and 5V microcontroller

ATA6564-GBQW0

x

x

Silent mode, VIO - pin for compatibility 
with 3,3V and 5V microcontroller

ATA6564-GAQW1

x

x

Silent mode, VIO - pin for compatibility 
with 3,3V and 5V microcontroller

ATA6564-GBQW1

x

x

Silent mode, VIO - pin for compatibility 
with 3,3V and 5V microcontroller

Note 1: HSC: High-speed comparator.

Temperature

Protection

Control

Unit

Slope

Control

and

Driver

TXD

Time-Out-

Timer 

VIO

VIO

VCC

V

CC

MUX

TXD

CANH

ATA6564

RXD

S

7

5

3

4

CANL

GND

6

8

VIO

HSC

(1)

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DS20005784B-page 3

ATA6564

1.0

DEVICE OVERVIEW

The ATA6564 is a stand-alone high-speed CAN
transceiver compliant with the ISO 11898-2, ISO
11898-2: 2016 and SAE J2962-2 CAN standards. It
provides very low current consumption in Silent mode.

1.1

Operating Modes

The ATA6564 supports two operating modes: Silent
and Normal. These modes can be selected via the S
pin. See 

Figure 1-1

 and 

Table 1-1

 for a description of

the operating modes.

FIGURE 1-1:

OPERATING MODES

1.1.1

NORMAL MODE

A low level on the S pin together with a high level on 
pin TXD selects the Normal mode. In this mode the 
transceiver is able to transmit and receive data via the 
CANH and CANL bus lines (see 

Section  “Functional 

Block Diagram”

). The output driver stage is active 

and drives data from the TXD input to the CAN bus. 
The high-speed comparator (HSC) converts the 
analog data on the bus lines into digital data which is 
output to pin RXD. The bus biasing is set to V

VCC

/2 

and the undervoltage monitoring of VCC is active. 

The slope of the output signals on the bus lines is 
controlled and optimized in a way that guarantees the 
lowest possible electromagnetic emission (EME).

To switch the device in normal operating mode, set the 
S pin to low and the TXD pin to high (see 

Table 1-1

 

and 

Figure 1-2

). The S pin provides a pull-down 

resistor to GND, thus ensuring a defined level if the pin 
is open.

Please note that the device cannot enter Normal mode 
as long as TXD is at ground level.

VCC > V

uvd(VCC) 

and

VIO > V

uvd(VIO) 

and

S = 0

S = 0 and
TXD = 1 and
Error = 0

S = 1 or
Error = 1

Unpowered

Mode

Silent
Mode

Normal

Mode

VCC > V

uvd(VCC) 

and

VIO > V

uvd(VIO) 

and

S = 1

VCC < V

uvd(VCC) 

or

VIO < V

uvd(VIO)

VCC < V

uvd(VCC) 

or

VIO < V

uvd(VIO)

TABLE 1-1:

OPERATING MODES

Mode

Inputs

Outputs

S

Pin TXD

CAN Driver

Pin RXD

Unpowered

x

(

2

)

x

(

2

)

Recessive

Recessive

Silent

HIGH

x

(

2

)

Recessive

Active

(

1

)

Normal

LOW

LOW

Dominant

LOW

LOW

HIGH

Recessive

HIGH

Note 1: LOW if the CAN bus is dominant, HIGH if the CAN bus is recessive.

2: Irrelevant

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ATA6564

DS20005784B-page 4

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FIGURE 1-2:

SWITCHING FROM SILENT MODE TO NORMAL MODE

1.1.2

SILENT MODE

A high level on the S pin selects Silent mode. This
receive-only mode can be used to test the connection
of the bus medium. In Silent mode the ATA6564 can
still receive data from the bus, but the transmitter is
disabled and therefore no data can be sent to the CAN
bus. The bus pins are released to recessive state. All
other IC functions, including the high-speed compara-
tor (HSC), continue to operate as they do in Normal
mode. Silent mode can be used to prevent a faulty CAN
controller from disrupting all network communications.

1.2

Fail-safe Features

1.2.1

TXD DOMINANT TIME-OUT 
FUNCTION

A TXD dominant time-out timer is started when the
TXD pin is set to LOW. If the LOW state on the TXD pin
persists for longer than t

to(dom)TXD

, the transmitter is

disabled, releasing the bus lines to recessive state.
This function prevents a hardware and/or software
application failure from driving the bus lines to a perma-
nent dominant state (blocking all network communica-
tions). The TXD dominant time-out timer is reset when
the TXD pin is set to high. If the low state on the TXD
pin was longer than t

to(dom)TXD

, then the TXD pin has

to be set to high longer 4 µs in order to reset the TXD
dominant time-out timer.

1.2.2

INTERNAL PULL-UP/PULL-DOWN 
STRUCTURE AT THE TXD AND S 
INPUT PINS

The TXD pin has an internal pull-up resistor to VIO and
the S pin an internal pull-down resistor to GND. This
ensures a safe, defined state in case one or all of these
pins are left floating.

1.2.3

UNDERVOLTAGE DETECTION ON 
PINS VCC AND VIO

If V

VCC

 or V

VIO

 drop below their respective

undervoltage detection levels (V

uvd(VCC)

 and V

uvd(VIO)

(see 

Section , Electrical Characteristics

), the

transceiver switches off and disengages from the bus
until V

VCC

 and V

VIO

 have recovered. The logic state of

the S pin is ignored until the VCC voltage or the VIO
voltage has recovered.

1.2.4

OVERTEMPERATURE 
PROTECTION

The output drivers are protected against
overtemperature conditions. If the junction temperature
exceeds the shutdown junction temperature, T

Jsd

, the

output drivers are disabled until the junction
temperature drops below T

Jsd 

and pin TXD is at high

level again. This ensures that output driver oscillations
due to temperature drift are avoided.

S

TXD

Silent Mode

t

del(sil-norm)

 =

10μs max

Normal Mode

t

t

t

Operation

Mode

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DS20005784B-page 5

ATA6564

FIGURE 1-3:

RELEASE OF TRANSMISSION AFTER OVERTEMPERATURE CONDITION

1.2.5

SHORT-CIRCUIT PROTECTION OF 
THE BUS PINS

The CANH and CANL bus outputs are short-circuit pro-
tected, either against GND or a positive supply voltage.
A current-limiting circuit protects the transceiver
against damage. If the device is heating up due to a
continuous short on CANH or CANL, the internal
overtemperature protection switches off the bus
transmitter. 

1.2.6

RXD RECESSIVE CLAMPING

This fail-safe feature prevents the controller from
sending data on the bus if its RXD line is clamped to
HIGH (e.g., recessive). That is, if the RXD pin cannot
signalize a dominant bus condition because it is e.g,
shorted to VCC, the transmitter within ATA6564 is
disabled to avoid possible data collisions on the bus. In
Normal and Silent mode, the device permanently com-
pares the state of the high-speed comparator (HSC)
with the state of the RXD pin. If the HSC indicates a
dominant bus state for more than t

RC_det

 without the

RXD pin doing the same, a recessive clamping situa-
tion is detected and the device is forced into Silent
mode. This Fail-safe mode is released by either
entering Unpowered mode or if the RXD pin is showing
a dominant (e.g., LOW) level again.

FIGURE 1-4:

RXD RECESSIVE CLAMPING DETECTION

Failure

Overtemp

GND

TXD

Overtemperature

R

D

R

t

t

t

OT

BUS V

DIFF

(CANH-CANL)

9,2

R

D

D

t

t

RXD

9,2

GND

CAN

TXD

RXD

Operation

Mode

Normal

Normal

Silent

If the clamping condition is removed and a
dominant bus is detected, the transceiver
goes back to normal mode.

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ATA6564

DS20005784B-page 6

 2017 Microchip Technology Inc.

1.3

Pin Descriptions

The descriptions of the pins are listed in 

Table 1-2

.

TABLE 1-2:

PIN FUNCTION TABLE

Pin Number

Pin Name

Description

1

TXD

Transmit data input

2

GND

Ground supply

3

VCC

Supply voltage

4

RXD

Receive data output; reads out data from the bus lines

5

VIO

Supply voltage for I/O level adapter

6

CANL

Low-level CAN bus line

7

CANH

High-level CAN bus line

8

S

Silent mode control input

9

EP

(

1

)

Exposed Thermal Pad: Heat slug, internally connected to the GND pin.

Note 1: Only for the VDFN package.

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DS20005784B-page 7

ATA6564

1.4

Typical Application

7

8

1

4

5

2

3

CANH

VDD

Microcontroller

GND

ATA6564

CANH

S

TXD

RXD

CANL

BAT

5V

12V

6

CANL

GND

GND

3.3V

12V

(1) The size of this capacitor depends on the used external voltage regulator.

VCC

100nF

100nF

VIO

22μF

(1)

+

Note 1: For VDFN package: Heat slug must always be connected to GND.

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ATA6564

DS20005784B-page 8

 2017 Microchip Technology Inc.

2.0

ELECTRICAL CHARACTERISTICS

2.1

Absolute Maximum Ratings

(†)

DC Voltage at CANH and CANL ................................................................................................................  –27V to +42V
Transient Voltage on CANH and CANL (ISO 7637 part 2) .....................................................................  –150V to +100V
Max. differential bus voltage.........................................................................................................................  –5V to +18V
DC voltage on all other pins .....................................................................................................................  –0.3V to +5.5V
ESD on CANH and CANL pins (IEC 61000-4-2)......................................................................................................±8 kV 
ESD (HBM following STM 5.1 with 1.5 k

/100 pF) (Pins CANH, CANL to GND)................................................... ±6 kV

Component Level ESD (HBM according to ANSI/ESD STM 5.1) JESD22-A114, AEC-Q 100 (002) ...................... ±4 kV
CDM ESD STM 5.3.1 ............................................................................................................................................. ±750V
ESD machine model AEC-Q100-RevF(003) .......................................................................................................... ±200V
Virtual Junction Temperature................................................................................................................. –40°C to +175°C
Storage Temperature..............................................................................................................................–55°C to +150°C

† Notice: Stresses beyond those listed below may cause permanent damage to the device. This is a stress rating only
and functional operation of the device at these or any other conditions beyond those indicated in the operational sec-
tions of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may
affect device reliability.

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DS20005784B-page 9

ATA6564

ELECTRICAL CHARACTERISTICS

Electrical Specifications: Grade 1: T

amb

=  –40°C to +125°C, Grade 0: T

amb

= –40°C to +150°C, V

VCC

= 4.5V  to 

5.5V; V

VIO

= 2.8V to 5.5V; R

L

= 60

, C

L

= 100 pF, unless otherwise specified. All voltages are defined in relation to 

ground; positive currents flow into the IC.

Parameters

Sym.

Min.

Typ.

Max.

Units

Conditions

Supply, Pin VCC
Supply Voltage

V

VCC

4.5

5.5

V

Supply Current in Silent 
Mode

I

VCC_sil

1.9

2.5

3

mA

Silent Mode, V

TXD

= V

VIO

Supply Current in Normal
Mode

I

VCC_rec

I

VCC_dom

I

VCC_short

2

30

50

5

70
85

mA

recessive, V

TXD

= V

VIO

dominant, V

TXD

= 0V

short between CANH and 
CANL

(

1

)

Undervoltage Detection
Threshold on Pin VCC

V

uvd(VCC)

2.75

4.5

V

I/O Level Adapter Supply, Pin VIO
Supply Voltage on Pin VIO

V

VIO

2.8

5.5

V

Supply Current on Pin VIO

I

VIO_rec

10

80

250

µA

Normal and Silent Mode 
recessive, V

TXD

= V

VIO

I

VIO_dom

50

350

500

µA

Normal and Silent Mode
dominant, V

TXD

= 0V

Undervoltage Detection
Threshold on Pin VIO

V

uvd(VIO)

1.3

2.7

V

Mode Control Input, Pin S
High-level Input Voltage

V

IH

0.7 



V

VIO

V

VIO

 + 

0.3

V

Low-level Input Voltage

V

IL

–0.3

0.3 



V

VIO

V

Pull-down Resistor to GND

R

pd

75

125

175

kΩ

V

S

= V

VIO

Low-level Leakage Current

I

L

–2

+2

µA

V

S

= 0V

CAN Transmit Data Input, Pin TXD
High-level Input Voltage

V

IH

0.7 

 

V

VIO

V

VIO

 + 

0.3

V

Low-level Input Voltage

V

IL

–0.3

0.3 



V

VIO

V

Pull-up Resistor to VIO

R

TXD

20

35

50

kΩ

V

TXD

= 0V

High-level Leakage Current

I

TDX

–2

+2

µA

Normal Mode, V

TXD

= V

VIO

Input Capacitance

C

TXD

5

10

pF

Note 3

CAN Receive Data Output, Pin RXD
High-level Output Current

I

OH

–8

-1

mA

V

RXD

= V

VIO

– 0.4V, 

V

VIO

= V

VCC

Low-level Output Current

I

OL

2

12

mA

V

RXD

= 0.4V, Bus Dominant

Bus Lines, Pins CANH and CANL
Single Ended Dominant
Output Voltage

V

O(dom)

2.75

0.5

3.5
1.5

4.5

2.25

V

V

TXD

= 0V,  t <  t

to(dom)TXD

R

L

= 50

 to 65

- pin CANH
- pin CANL

(

1

)

Note 1: 100% correlation tested.

2: Characterized on samples.
3: Design parameter.

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ATA6564

DS20005784B-page 10

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Transmitter Voltage
Symmetry

V

Sym

0.9

1

1.1

V

Sym

= (V

CANH

+ V

CANL

)

/V

VCC

(

3

)

Bus Differential Output
Voltage

V

Diff

1.5

3

V

V

TXD

= 0V, t < t

to(dom)TXD

R

L

= 45

 to 65

1.5

3.3

V

V

TXD

= 0V, t < t

to(dom)TXD

R

L

= 70

(

3

)

1.5

5

V

V

TXD

= 0V, t < t

to(dom)TXD

R

L

= 2240

(

3

)

–50

+50

mV

V

VCC

= 4.75V to 5.25V

V

TXD

= V

VIO

, receive, no load

Recessive Output Voltage

V

O(rec)

2

0.5 x 

V

VCC

3

V

Normal and Silent Mode, 
V

TXD

= V

VIO

, no load

Differential Receiver 
Threshold Voltage (HSC)

V

th(RX)dif

0.5

0.7

0.9

V

Normal and Silent Mode, 
V

cm(CAN)

= –27V to +27V

Differential Receiver
Hysteresis Voltage (HSC)

V

hys(RX)dif

50

120

200

mV

Normal and Silent Mode, 
V

cm(CAN)

= –27V to +27V

Dominant Output Current

I

IO(dom)

–75

35

–35

75

mA
mA

V

TXD

= 0V,  t < t

to(dom)TXD, 

V

VCC

= 5V

- pin CANH, V

CANH

=   –5V

- pin CANL, V

CANL

= +40V

Recessive Output Current

I

IO(rec)

–5

+5

mA

Normal and Silent Mode, 
V

TXD

= V

VIO

, no load, 

V

CANH

= V

CANL

=  –27V to +32V

Leakage Current

I

IO(leak)

–5

0

+5

µA

V

VCC

= V

VIO

= 0V, 

V

CANH

= V

CANL

= 5V

I

IO(leak)

–5

0

+5

µA

VCC = VIO connected to GND 
with 47k

V

CANH

= V

CANL

= 5V

(

3

)

Input Resistance

R

i

9

15

28

kΩ

V

CANH

= V

CANL

= 4V

R

i

9

15

28

kΩ

–2V ≤ V

CANH

≤ +7V,

–2V ≤ V

CANL

≤ +7V

(

3

)

Input Resistance Deviation

∆R

i

–1

0

+1

%

Between CANH and CANL
V

CANH

= V

CANL

= 4V

∆R

i

–1

0

+1

%

–2V ≤ V

CANH

≤ +7V,

–2V ≤ V

CANL

≤ +7V

(

3

)

Differential Input Resistance

R

i(dif)

18

30

56

kΩ

V

CANH

= V

CANL

= 4V

R

i(dif)

18

30

56

kΩ

–2V ≤ V

CANH

≤ +7V,

–2V ≤ V

CANL

≤ +7V

(

3

)

Common-mode Input
Capacitance

C

i(cm)

20

pF

Note 3

Differential Input 
Capacitance

C

i(dif)

10

pF

Note 3

ELECTRICAL CHARACTERISTICS (CONTINUED)

Electrical Specifications: Grade 1: T

amb

=  –40°C to +125°C, Grade 0: T

amb

= –40°C to +150°C, V

VCC

= 4.5V  to 

5.5V; V

VIO

= 2.8V to 5.5V; R

L

= 60

, C

L

= 100 pF, unless otherwise specified. All voltages are defined in relation to 

ground; positive currents flow into the IC.

Parameters

Sym.

Min.

Typ.

Max.

Units

Conditions

Note 1: 100% correlation tested.

2: Characterized on samples.
3: Design parameter.

Maker
Microchip Technology Inc.
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