2N7008 Datasheet

/var/www/html/datasheet/sites/default/files/pdfhtml_dummy/2N7008-html.html
background image

Supertex inc.

Supertex inc.

 www.supertex.com

2N7008

Doc.#  DSFP-2N7008                                                                          

C062813

Features

 

Free from secondary breakdown

 

Low power drive requirement

 

Ease of paralleling

 

Low C

ISS

 and fast switching speeds

 

Excellent thermal stability

 

Integral source-drain diode

 

High input impedance and high gain

Applications

 

Motor controls

 

Converters

 

Amplifiers

 

Switches

 

Power supply circuits

 

Drivers (relays, hammers, solenoids, lamps,  

 

    memories, displays, bipolar transistors, etc.)

General Description

The Supertex 2N7008 is an enhancement-mode (normally-

off) transistor that utilizes a vertical DMOS structure 

and Supertex’s well-proven silicon-gate manufacturing 

process. This combination produces a device with the 

power handling capabilities of bipolar transistors, and the 

high input impedance and positive temperature coefficient 

inherent in MOS devices. Characteristic of all MOS 

structures, this device is free from thermal runaway and 

thermally-induced secondary breakdown.  

Supertex’s vertical DMOS FETs are ideally suited to a 

wide range of switching and amplifying applications where 

very low threshold voltage, high breakdown voltage, high 

input impedance, low input capacitance, and fast switching 

speeds are desired.

Absolute Maximum Ratings 

Parameter

Value

Drain-to-source voltage

BV

DSS

 

Drain-to-gate voltage

BV

DGS

Gate-to-source voltage

±30V

Operating and storage temperature

-55°C to +150°C

Absolute Maximum Ratings are those values beyond which damage to the device 

may occur. Functional operation under these conditions is not implied. Continuous 

operation of the device at the absolute rating level may affect device reliability. All 

voltages are referenced to device ground.

N-Channel Enhancement-Mode

Vertical DMOS FETs

GATE

SOURCE

DRAIN

TO-92

YY = Year Sealed 

WW = Week Sealed 

             = “Green” Packaging 

Si

2N 

7 0 0 8  

Y Y W W  

TO-92

Product Marking

Pin Configuration

Package may or may not include the following marks: Si or

Ordering Information

Part Number

Package Option

Packing

2N7008-G

TO-92

1000/Bag

2N7008-G P002

TO-92

2000/Reel

2N7008-G P003

TO-92

2000/Reel

2N7008-G P005

TO-92

2000/Reel

2N7008-G P013

TO-92

2000/Reel

2N7008-G PO14

TO-92

2000/Reel

Product Summary

BV

DSX

/BV

DGS

R

DS(ON)

(max)

I

D(ON)

60V

7.5 Ω

500mA

-G denotes a lead (Pb)-free / RoHS compliant package. 

Contact factory for Wafer / Die availablity. 

Devices in Wafer / Die form are lead (Pb)-free / RoHS compliant.

Typical Thermal Characteristics

Package

θ

ja

TO-92

132

O

C/W

* Mounted on FR4 board; 25mm x 25mm x 1.57mm

/var/www/html/datasheet/sites/default/files/pdfhtml_dummy/2N7008-html.html
background image

2

2N7008

Supertex inc.

 www.supertex.com

Doc.#  DSFP-2N7008                                                                          

C062813

Electrical Characteristics 

(T

= 25°C unless otherwise specified)  

Sym

Parameter

Min

Typ

Max

Units

Conditions

BV

DSS

Drain-to-source breakdown voltage

60

-

-

V

V

GS

 = 0V, I

D

 = -10µA

V

GS(th)

Gate threshold voltage

1.0

-

2.5

V

V

GS

 = V

DS

, I

D

 = 250µA

I

GSS

Gate body leakage current

-

-

100

nA

V

GS

 = ±30V, V

DS

 = 0V

I

DSS

Zero gate voltage drain current

-

-

1.0

µA

V

GS

 = 0V, V

DS

 = 50V

-

-

500

V

GS

 = 0V, V

DS

 = 50V,

T

A

 = 125

O

C

I

D(ON)

On-state drain current

500

-

-

mA

V

GS

 = 10V, V

DS

 ≥ 2.0V

DS(ON)

R

DS(ON)

Static drain-to-source

on-state resistance

-

-

7.5

Ω

V

GS

 = 5.0V, I

D

 = 50mA

-

-

7.5

V

GS

 = 10V, I

D

 = 500mA

G

FS

Forward transconductance

80

-

-

mmho  V

DS

 = 10V, I

D

 = 200mA

C

ISS

Input capacitance

-

-

50

pF

V

GS

 = 0V, V

DS

 = 25V,

f = 1.0MHz

C

OSS

Common source output capacitance

-

-

25

C

RSS

Reverse transfer capacitance

-

-

5.0

t

(ON)

Turn-on time

-

-

20

ns

V

DD

 = 30V, I

D

 = 200mA,

R

GEN

 = 25Ω

t

(OFF)

Turn-off time

-

-

20

V

SD

Diode forward voltage drop

-

-

1.5

V

V

GS

 = 0V, I

SD

 = 150mA

Notes:

1.  All D.C. parameters 100% tested at 25

O

C unless otherwise stated. (Pulse test: 300µs pulse, 2% duty cycle.)

2.  All A.C. parameters sample tested.

Switching Waveforms and Test Circuit

Thermal Characteristics

Package

I

D

(continuous)

I

D

(pulsed)

Power Dissipation

@T

C

 = 25

O

C

I

DR

I

DRM

TO-92

230mA

1.3A

1.0W

230mA

1.3A

Note:

†   I

D

 (continuous) is limited by max rated T

j

.

90% 

10%

90% 

90% 

10%

10% 

Pulse

Generator

VDD

R

L

OUTPUT

D.U.T.

t

(ON) 

t

d(ON) 

t

(OFF) 

t

d(OFF)

t

INPUT

INPUT

OUTPUT

10V

VDD

R

GEN

0V

0V

t

f

/var/www/html/datasheet/sites/default/files/pdfhtml_dummy/2N7008-html.html
background image

Supertex inc.

 does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such applications unless it receives

an adequate “product liability indemnification insurance agreement.” 

Supertex inc.

 does not assume responsibility for use of devices described, and limits its liability

to the replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and

specifications are subject to change without notice. For the latest product specifications refer to the 

Supertex inc.

 (website: http//www.supertex.com)

©2013 

Supertex inc.

 

All rights reserved. Unauthorized use or reproduction is prohibited.

Supertex inc.

1235 Bordeaux Drive, Sunnyvale, CA 94089

Tel: 408-222-8888

www.supertex.com

3

2N7008

(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline 

information go to 

http://www.supertex.com/packaging.html

.)

Doc.#  DSFP-2N7008                                                                          

C062813

3-Lead TO-92 Package Outline (N3)

Symbol

A

b

c

D

E

E1

e

e1

L

Dimensions

(inches)

MIN

.170

.014

.014

.175

.125

.080

.095

.045

.500

NOM

-

-

-

-

-

-

-

-

-

MAX

.210

.022

.022

.205

.165

.105

.105

.055

.610*

JEDEC Registration TO-92.

* This dimension is not specified in the JEDEC drawing.

† This dimension differs from the JEDEC drawing.

Drawings not to scale.

Supertex Doc.#: DSPD-3TO92N3, Version E041009.

Seating

Plane

1

2

3

Front View 

Side View

Bottom View

E1

E

D

e1

L

e

c

1     2     3

b

A

/var/www/html/datasheet/sites/default/files/pdfhtml_dummy/2N7008-html.html
background image

Supertex inc.

Supertex inc.

 www.supertex.com

2N7008

Doc.#  DSFP-2N7008                                                                          

C062813

Features

 

Free from secondary breakdown

 

Low power drive requirement

 

Ease of paralleling

 

Low C

ISS

 and fast switching speeds

 

Excellent thermal stability

 

Integral source-drain diode

 

High input impedance and high gain

Applications

 

Motor controls

 

Converters

 

Amplifiers

 

Switches

 

Power supply circuits

 

Drivers (relays, hammers, solenoids, lamps,  

 

    memories, displays, bipolar transistors, etc.)

General Description

The Supertex 2N7008 is an enhancement-mode (normally-

off) transistor that utilizes a vertical DMOS structure 

and Supertex’s well-proven silicon-gate manufacturing 

process. This combination produces a device with the 

power handling capabilities of bipolar transistors, and the 

high input impedance and positive temperature coefficient 

inherent in MOS devices. Characteristic of all MOS 

structures, this device is free from thermal runaway and 

thermally-induced secondary breakdown.  

Supertex’s vertical DMOS FETs are ideally suited to a 

wide range of switching and amplifying applications where 

very low threshold voltage, high breakdown voltage, high 

input impedance, low input capacitance, and fast switching 

speeds are desired.

Absolute Maximum Ratings 

Parameter

Value

Drain-to-source voltage

BV

DSS

 

Drain-to-gate voltage

BV

DGS

Gate-to-source voltage

±30V

Operating and storage temperature

-55°C to +150°C

Absolute Maximum Ratings are those values beyond which damage to the device 

may occur. Functional operation under these conditions is not implied. Continuous 

operation of the device at the absolute rating level may affect device reliability. All 

voltages are referenced to device ground.

N-Channel Enhancement-Mode

Vertical DMOS FETs

GATE

SOURCE

DRAIN

TO-92

YY = Year Sealed 

WW = Week Sealed 

             = “Green” Packaging 

Si

2N 

7 0 0 8  

Y Y W W  

TO-92

Product Marking

Pin Configuration

Package may or may not include the following marks: Si or

Ordering Information

Part Number

Package Option

Packing

2N7008-G

TO-92

1000/Bag

2N7008-G P002

TO-92

2000/Reel

2N7008-G P003

TO-92

2000/Reel

2N7008-G P005

TO-92

2000/Reel

2N7008-G P013

TO-92

2000/Reel

2N7008-G PO14

TO-92

2000/Reel

Product Summary

BV

DSX

/BV

DGS

R

DS(ON)

(max)

I

D(ON)

60V

7.5 Ω

500mA

-G denotes a lead (Pb)-free / RoHS compliant package. 

Contact factory for Wafer / Die availablity. 

Devices in Wafer / Die form are lead (Pb)-free / RoHS compliant.

Typical Thermal Characteristics

Package

θ

ja

TO-92

132

O

C/W

* Mounted on FR4 board; 25mm x 25mm x 1.57mm

/var/www/html/datasheet/sites/default/files/pdfhtml_dummy/2N7008-html.html
background image

2

2N7008

Supertex inc.

 www.supertex.com

Doc.#  DSFP-2N7008                                                                          

C062813

Electrical Characteristics 

(T

= 25°C unless otherwise specified)  

Sym

Parameter

Min

Typ

Max

Units

Conditions

BV

DSS

Drain-to-source breakdown voltage

60

-

-

V

V

GS

 = 0V, I

D

 = -10µA

V

GS(th)

Gate threshold voltage

1.0

-

2.5

V

V

GS

 = V

DS

, I

D

 = 250µA

I

GSS

Gate body leakage current

-

-

100

nA

V

GS

 = ±30V, V

DS

 = 0V

I

DSS

Zero gate voltage drain current

-

-

1.0

µA

V

GS

 = 0V, V

DS

 = 50V

-

-

500

V

GS

 = 0V, V

DS

 = 50V,

T

A

 = 125

O

C

I

D(ON)

On-state drain current

500

-

-

mA

V

GS

 = 10V, V

DS

 ≥ 2.0V

DS(ON)

R

DS(ON)

Static drain-to-source

on-state resistance

-

-

7.5

Ω

V

GS

 = 5.0V, I

D

 = 50mA

-

-

7.5

V

GS

 = 10V, I

D

 = 500mA

G

FS

Forward transconductance

80

-

-

mmho  V

DS

 = 10V, I

D

 = 200mA

C

ISS

Input capacitance

-

-

50

pF

V

GS

 = 0V, V

DS

 = 25V,

f = 1.0MHz

C

OSS

Common source output capacitance

-

-

25

C

RSS

Reverse transfer capacitance

-

-

5.0

t

(ON)

Turn-on time

-

-

20

ns

V

DD

 = 30V, I

D

 = 200mA,

R

GEN

 = 25Ω

t

(OFF)

Turn-off time

-

-

20

V

SD

Diode forward voltage drop

-

-

1.5

V

V

GS

 = 0V, I

SD

 = 150mA

Notes:

1.  All D.C. parameters 100% tested at 25

O

C unless otherwise stated. (Pulse test: 300µs pulse, 2% duty cycle.)

2.  All A.C. parameters sample tested.

Switching Waveforms and Test Circuit

Thermal Characteristics

Package

I

D

(continuous)

I

D

(pulsed)

Power Dissipation

@T

C

 = 25

O

C

I

DR

I

DRM

TO-92

230mA

1.3A

1.0W

230mA

1.3A

Note:

†   I

D

 (continuous) is limited by max rated T

j

.

90% 

10%

90% 

90% 

10%

10% 

Pulse

Generator

VDD

R

L

OUTPUT

D.U.T.

t

(ON) 

t

d(ON) 

t

(OFF) 

t

d(OFF)

t

INPUT

INPUT

OUTPUT

10V

VDD

R

GEN

0V

0V

t

f

/var/www/html/datasheet/sites/default/files/pdfhtml_dummy/2N7008-html.html
background image

Supertex inc.

 does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such applications unless it receives

an adequate “product liability indemnification insurance agreement.” 

Supertex inc.

 does not assume responsibility for use of devices described, and limits its liability

to the replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and

specifications are subject to change without notice. For the latest product specifications refer to the 

Supertex inc.

 (website: http//www.supertex.com)

©2013 

Supertex inc.

 

All rights reserved. Unauthorized use or reproduction is prohibited.

Supertex inc.

1235 Bordeaux Drive, Sunnyvale, CA 94089

Tel: 408-222-8888

www.supertex.com

3

2N7008

(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline 

information go to 

http://www.supertex.com/packaging.html

.)

Doc.#  DSFP-2N7008                                                                          

C062813

3-Lead TO-92 Package Outline (N3)

Symbol

A

b

c

D

E

E1

e

e1

L

Dimensions

(inches)

MIN

.170

.014

.014

.175

.125

.080

.095

.045

.500

NOM

-

-

-

-

-

-

-

-

-

MAX

.210

.022

.022

.205

.165

.105

.105

.055

.610*

JEDEC Registration TO-92.

* This dimension is not specified in the JEDEC drawing.

† This dimension differs from the JEDEC drawing.

Drawings not to scale.

Supertex Doc.#: DSPD-3TO92N3, Version E041009.

Seating

Plane

1

2

3

Front View 

Side View

Bottom View

E1

E

D

e1

L

e

c

1     2     3

b

A

Maker
Microchip Technology Inc.
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