2003-2012 Microchip Technology Inc.
Preliminary
DS21790B-page 1
MCP2140
Features
• Implements the IrDA
®
standard, including:
- IrLAP
- IrLMP
- IAS
- TinyTP
- IrCOMM (9-wire “cooked” service class)
• Provides IrDA standard physical signal layer
support including:
- Bidirectional communication
- CRC implementation
- Fixed Data communication rate of 9600 baud
• Includes UART-to-IrDA standard encoder/decoder
functionality:
- Easily interfaces with industry standard
UARTs and infrared transceivers
• UART interface for connecting to Data
Communications Equipment (DCE) or Data
Terminal Equipment (DTE) systems
• Transmit/Receive formats (bit width) supported:
- 1.63 µs
• Hardware UART Support:
- 9.6 kbaud baud rate
- 29 Byte Data Buffer Size
• Infrared Supported:
- 9.6 kbaud baud rate
- 64 Byte Data Packet Size
• Operates as Secondary Device
• Automatic Low Power mode
- < 60 µA when no IR activity present
(PHACT = L)
CMOS Technology
• Low power, high-speed CMOS technology
• Fully static design
• Low voltage operation
• Industrial temperature range
• Low power consumption
- < 1 mA @ 3.0V, 7.3728 MHz (typical)
Package Types
Block Diagram
2
3
4
5
6
7
8
9
10
1
2
3
4
5
6
7
8
9
1
19
18
16
15
14
13
12
11
17
18
17
15
14
13
12
11
10
16
20
OSC2
OSC1/CLKI
V
SS
V
SS
V
DD
V
DD
RXPD
CD
CTS
RTS
TX
RX
RI
DSR
DTR
TXIR
PHACT
RESET
NC
RXPDREF
V
SS
TX
RX
RI
TXIR
PHACT
RESET
NC
RXPDREF
OSC2
OSC1/CLKI
V
DD
RXPD
CD
CTS
RTS
DSR
DTR
M
C
P
2140
MCP
214
0
PDIP, SOIC
SSOP
Encode and
Protocol
TX
TXIR
RX
RXPD
MCP2140
Baud
RTS
Generator
CD
CTS
DSR
DTR
RI
OSC1
OSC2
Protocol Handler
and Decode
RXPDREF
Handler
+
-
PHACT
Logic
Rate
UART
Control
IrDA
®
Standard Protocol Stack Controller
With Fixed 9600 Baud Communication Rate
MCP2140
DS21790B-page 2
Preliminary
2003-2012 Microchip Technology Inc.
MCP2140 System Block Diagram
Decode
Encode
TX
TXIR
RX
I/O
MCP2140
PIC
®
SO
SI
UAR
T
Baud Rate
Generator
UART
Control
Logic
RXPD
RXPDREF
+
-
IR LED
IR Receive
Detect
Circuitry
IR Photo
diode
RTS
CTS
DSR
DTR
CD
RI
PHACT
UAR
T
F
lo
w
I/O
I/O
I/O
I/O
I/O
I/O
Co
n
tro
l
(1
)
MC
P2
140
S
tatus
(1
)
Note 1: Not all microcontroller I/O pins are required to be connected to the MCP2140.
Microcontroller
2003-2012 Microchip Technology Inc.
Preliminary
DS21790B-page 3
MCP2140
1.0
DEVICE OVERVIEW
The MCP2140 is a cost-effective, low pin count (18-pin),
easy-to-use device for implementing IrDA standard
wireless connectivity. The MCP2140 provides support
for the IrDA standard protocol “stack”, bit encoding/
decoding and low cost, discrete IR receiver circuitry.
The serial and IR interface baud rates are fixed at
9600 baud. The serial interface and IR interface baud
rates are dependent on the device frequency, but IrDA
standard operation requires a device frequency of
7.3728 MHz.
The MCP2140 will specify to the Primary Device the IR
baud rate during the Discover phase.
The MCP2140 can operate in Data Communication
Equipment (DCE) and Data Terminal Equipment (DTE)
applications, and sits between a UART and an infrared
optical transceiver.
The MCP2140 encodes an asynchronous serial data
stream, converting each data bit to the corresponding
infrared (IR) formatted pulse. IR pulses received are
decoded and then handled by the protocol handler
state machine. The protocol handler sends the appro-
priate data bytes to the Host Controller in UART-
formatted serial data.
The MCP2140 supports “point-to-point” applications,
that is, one Primary device and one Secondary device.
The MCP2140 operates as a Secondary device and
does not support “multi-point” applications.
Sending data using IR light requires some hardware
and the use of specialized communication protocols.
These protocol and hardware requirements are
described, in detail, by the IrDA standard specifications.
The encoding/decoding functionality of the MCP2140 is
designed to be compatible with the physical layer com-
ponent of the IrDA standard. This part of the standard is
often referred to as “IrPHY”.
The complete IrDA standard specification is available
for download from the IrDA website at www.IrDA.org.
1.1
Applications
The MCP2140 Infrared Communications Controller,
supporting the IrDA standard, provides embedded sys-
tem designers the easiest way to implement IrDA stan-
dard wireless connectivity.
Figure 1-1
shows a typical
application block diagram, while
Table 1-2
shows the
pin definitions.
TABLE 1-1:
OVERVIEW OF FEATURES
Infrared communication is a wireless, two-way data
connection using infrared light generated by low-cost
transceiver signaling technology. This provides reliable
communication between two devices.
Infrared technology offers:
• Universal standard for connecting portable
computing devices
• Easy, effortless implementation
• Economical alternative to other connectivity
solutions
• Reliable, high-speed connections
• Safe to use in any environment (can even be
used during air travel)
• Eliminates the hassle of cables
• Allows PCs and other electronic devices (such as
PDAs, cell phones, etc.) to communicate with
each other
• Enhances mobility by allowing users to easily
connect
The MCP2140 allows the easy addition of IrDA stan-
dard wireless connectivity to any embedded applica-
tion that uses serial data.
Figure 1-1
shows typical
implementation of the MCP2140 in an embedded
system.
The IrDA protocol for printer support is not included in
the IrCOMM 9-wire “cooked” service class.
Features
MCP2140
Serial Communications
UART, IR
Baud Rate Selection
Fixed
Low Power Mode
Yes
Resets (and Delays)
RESET, POR
(PWRT and OST)
Packages
18-pin DIP, SOIC,
20-pin SSOP
MCP2140
DS21790B-page 4
Preliminary
2003-2012 Microchip Technology Inc.
FIGURE 1-1:
SYSTEM BLOCK DIAGRAM
Decode
Encode
TX
TXIR
RX
I/O
MCP2140
PIC
®
SO
SI
UAR
T
Baud Rate
Generator
UART
Control
Logic
RXPD
RXPDREF
+
-
IR LED
IR Receive
Detect
Circuitry
IR Photo
diode
RTS
CTS
DSR
DTR
CD
RI
PHACT
UAR
T
Fl
o
w
I/O
I/O
I/O
I/O
I/O
I/O
Co
n
tro
l
(1
)
MCP
2
14
0
St
a
tu
s
(1
)
Note 1: Not all microcontroller I/O pins are required to be connected to the MCP2140.
Microcontroller
2003-2012 Microchip Technology Inc.
Preliminary
DS21790B-page 5
MCP2140
TABLE 1-2:
MCP2140 PIN DESCRIPTION NORMAL OPERATION (DCE)
Pin Name
Pin Number
Pin
Type
Buffer
Type
PDIP
SOIC
SSOP
Description
RXPDREF
1
1
1
I
A
IR Receive Photo Detect Diode reference voltage. This
voltage will typically be in the range of V
DD
/2.
TXIR
2
2
2
O
—
Asynchronous transmit to IrDA transceiver.
PHACT
3
3
3
OC
—
Protocol Handler Active. Indicates the state of the MCP2140
Protocol Handler. This output is an open collector, so an
external pull-up resistor may be required.
1
= Protocol Handler is in the Discovery or NRM state
0
= Protocol Handler is in NDM state or the MCP2140 is
in Low Power mode
RESET
4
4
4
I
ST
Resets the Device
V
SS
5
5
5, 6
—
P
Ground reference for logic and I/O pins
NC
6
6
7
I
—
No connect
TX
7
7
8
I
TTL
Asynchronous receive; from Host Controller UART
RX
8
8
9
O
—
Asynchronous transmit; to Host Controller UART
RI
9
9
10
I
TTL
Ring Indicator. The state of this bit is communicated to the
IrDA Primary Device.
1
= No Ring Indicate Present
0
= Ring Indicate Present
DSR
10
10
11
O
—
Data Set Ready. Indicates that the MCP2140 has estab-
lished a valid IrDA link with a Primary Device
(1)
. This signal
is locally emulated and not related to the DTR bit of the IrDA
Primary Device.
1
= An IR link has not been established
(No IR Link)
0
= An IR link has been established (IR Link)
DTR
11
11
12
I
TTL
Data Terminal Ready. Indicates that the Embedded device
connected to the MCP2140 is ready for IR data. The state of
this bit is communicated to the IrDA Primary Device via the
IrDA DSR bit carried by IrCOMM.
1
= Embedded device not ready
0
= Embedded device ready
CTS
12
12
13
O
—
Clear to Send. Indicates that the MCP2140 is ready to
receive data from the Host Controller. This signal is locally
emulated and not related to the CTS/RTS bit of the IrDA
Primary Device.
1
= Host Controller should not send data
0
= Host Controller may send data
Legend:
TTL = TTL compatible input
ST = Schmitt Trigger input with CMOS levels
A = Analog
P = Power
CMOS = CMOS compatible input OC = Open collector output
I = Input
O = Output
1: The state of the DTR output pin does not reflect the state of the DTR bit of the IrDA Primary Device.
MCP2140
DS21790B-page 6
Preliminary
2003-2012 Microchip Technology Inc.
RTS
13
13
14
I
TTL
Request to Send. Indicates that a Host Controller is ready to
receive data from the MCP2140. This signal is locally emu-
lated and not related to the CTS/RTS bit of the IrDA Primary
device.
1
= Host Controller not ready to receive data
0
= Host Controller ready to receive data
V
DD
14
14
15, 16
—
P
Positive supply for logic and I/O pins.
OSC2
15
15
17
O
—
Oscillator crystal output.
OSC1/CLKIN
16
16
18
I
CMOS Oscillator crystal input/external clock source input.
CD
17
17
19
I
ST
Carrier Detect. The state of this bit is communicated to the
IrDA Primary device via the IrDA CD bit.
1
= No Carrier Present
0
= Carrier Present
RXPD
18
18
20
I
A
IR RX Photo Detect Diode input. This input signal is required
to be a pulse to indicate an IR bit. When the amplitude of the
signal crosses the amplitude threshold set by the RXPDREF
pin, the IR bit is detected. The pulse has minimum and max-
imum requirements as specified in
Parameter IR131A
.
TABLE 1-2:
MCP2140 PIN DESCRIPTION NORMAL OPERATION (DCE) (CONTINUED)
Pin Name
Pin Number
Pin
Type
Buffer
Type
PDIP
SOIC
SSOP
Description
Legend:
TTL = TTL compatible input
ST = Schmitt Trigger input with CMOS levels
A = Analog
P = Power
CMOS = CMOS compatible input OC = Open collector output
I = Input
O = Output
1: The state of the DTR output pin does not reflect the state of the DTR bit of the IrDA Primary Device.
2003-2012 Microchip Technology Inc.
Preliminary
DS21790B-page 7
MCP2140
2.0
DEVICE OPERATION
The MCP2140 serial interface and IR baud rates are
fixed at 9600 baud, given a 7.3728 MHz device clock.
2.1
Power-Up
Any time the device is powered up (
Parameter D003
),
the Power-Up Timer delay (
Parameter 33
) occurs, fol-
lowed by an Oscillator Start-up Timer (OST) delay
(
Parameter 32
). Once these delays complete, commu-
nication with the device may be initiated. This commu-
nication is from both the infrared transceiver’s side and
the controller’s UART interface.
2.2
Device Reset
The MCP2140 is forced into the reset state when the
RESET pin is in the low state. Once the RESET pin is
brought to a high state, the Device Reset sequence
occurs. Once the sequence completes, functional
operation begins.
2.3
Device Clocks
The MCP2140 requires a clock source to operate. This
clock source is used to establish the device timing,
including the device “Bit Clock”.
2.3.1
CLOCK SOURCE
The clock source can be supplied by one of the
following:
• Crystal
• Resonator
• External clock
The frequency of this clock source must be
7.3728 MHz (electrical specification
Parameter 1A
) for
device communication at 9600 baud.
2.3.1.1
Crystal Oscillator / Ceramic
Resonators
A crystal or ceramic resonator can be connected to the
OSC1 and OSC2 pins to establish oscillation
(
Figure 2-1
). The MCP2140 oscillator design requires
the use of a parallel-cut crystal. Use of a series of cut
crystals may give a frequency outside of the crystal
manufacturers specifications.
FIGURE 2-1:
CRYSTAL OPERATION
(CERAMIC RESONATOR)
TABLE 2-1:
CAPACITOR SELECTION FOR
CERAMIC RESONATORS
TABLE 2-2:
CAPACITOR SELECTION FOR
CRYSTAL OSCILLATOR
Freq
OSC1 (C1)
OSC2 (C2)
7.3728 MHz
10 - 22 pF
10 - 22 pF
Note:
Higher capacitance increases the stability
of the oscillator, but also increases the start-
up time. These values are for design guid-
ance only. Since each resonator has its own
characteristics, the user should consult the
resonator manufacturer for appropriate val-
ues of external components.
Freq
OSC1 (C1)
OSC2 (C2)
7.3728 MHz
15 - 30 pF
15 - 30 pF
Note:
Higher capacitance increases the stability
of the oscillator but also increases the start-
up time. These values are for design guid-
ance only. R
S
may be required to avoid
overdriving crystals with low drive level
specification. Since each crystal has its
own characteristics, the user should con-
sult the crystal manufacturer for appropriate
values of external components.
See
Table 2-1
and
Table 2-2
for recommended
values of C1 and C2.
Note:
A series resistor may be required for
AT strip cut crystals.
C1
C2
XTAL
OSC2
RS
OSC1
RF
To internal
MCP2140
(Note)
logic
MCP2140
DS21790B-page 8
Preliminary
2003-2012 Microchip Technology Inc.
2.3.1.2
External Clock
For applications where a clock is already available
elsewhere, users may directly drive the MCP2140 pro-
vided that this external clock source meets the AC/DC
timing requirements listed in
Section 4.3, “Timing Dia-
grams and Specifications”
.
Figure 2-2
shows how an
external clock circuit should be configured.
FIGURE 2-2:
EXTERNAL CLOCK
2.3.2
BIT CLOCK
The device crystal is used to derive the communication
bit clock (BITCLK). There are 16 BITCLKs for each bit
time. The BITCLKs are used for the generation of the
start bit and the eight data bits. The stop bit uses the
BITCLK when the data is transmitted (not for
reception).
This clock is a fixed-frequency and has minimal
variation in frequency (specified by the crystal
manufacturer).
Clock From
external
MCP2140
OSC1
OSC2
Open
system
2003-2012 Microchip Technology Inc.
Preliminary
DS21790B-page 9
MCP2140
2.4
Host UART Interface
The Host UART interface communicates with the Host
Controller. This interface has eight signals associated
with it: TX, RX, RTS, CTS, DSR, DTR, CD and RI. Sev-
eral of these signals are locally generated (not passed
over the IR interface). The Host UART is a half-duplex
interface, meaning that the system is either transmitting
or receiving, but not both simultaneously.
2.4.1
BAUD RATE
The baud rate for the MCP2140 serial port (the TX and
RX pins) is fixed at 9600 baud when the device
frequency is 7.3728 MHz.
2.4.2
TRANSMITTING
When the controller sends serial data to the MCP2140,
the controller’s baud rate is required to match the baud
rate of the MCP2140’s serial port.
2.4.3
RECEIVING
When the controller receives serial data from the
MCP2140, the controller’s baud rate is required to
match the baud rate of the MCP2140’s serial port.
2.4.4
HARDWARE HANDSHAKING
There are three Host UART signals used to control the
handshaking operation between the Host Controller
and the MCP2140. They are:
• DSR
• RTS
• CTS
2.4.4.1
DSR
The DSR signal is used to indicate that a link has been
established between the MCP2140 and the Primary
Device. Please refer to Section 2.14, “How Devices
Connect”, for information on how devices connect.
2.4.4.2
RTS
The RTS signal indicates to the MCP2140 that the Host
Controller is ready to receive serial data. Once an IR
data packet has been received, the RTS signal will be
low for the received data to be transferred to the Host
Controller. If the RTS signal remains high, an IR link
timeout will occur and the MCP2140 will disconnect
from the Primary Device.
2.4.4.3
CTS
The MCP2140 generates the CTS signal locally due to
buffer limitations.
The MCP2140 uses a 64-byte buffer for incoming data
from the IR Host. Another 29-byte buffer is provided to
buffer data from the UART serial port. The MCP2140
can handle IR data and Host UART serial port data
simultaneously. A hardware handshaking pin (CTS) is
provided to inhibit the Host Controller from sending
serial data when the Host UART buffer is not available
(Figure 2-3). Figure 2-4 shows a flow chart for Host
UART flow control using the CTS signal.
FIGURE 2-3:
HOST UART CTS SIGNAL AND THE RECEIVE BUFFER
Note 1: The MCP2140 generates several non-
data signals locally.
2: The MCP2140 emulates a 3-wire serial
connection (TXD, RXD and GND). The
transceiver’s Transmit Data (TXD),
Receive Data (RXD) signals, and the
state of the CD. RI and DTR input pins are
carried back and forth to the Primary
device.
3: The RTS and CTS signals are local
emulations.
Note:
When the CTS output signal goes high, the
UART FIFO will store up to 6 bytes. This is
to allow devices that have a slow response
time to a change on the CTS signal time to
stop sending additional data (such as a
modem).
CTS
Receive Buffer Empty
MCP2140 Can Receive Data Receive Buffer Has 22 Bytes,
Receive Buffer
Receive Buffer Empty
MCP2140 Can Receive Data
IR Data Packet Transmitted
Full (29 Bytes)
CTS Pin Driven High
IR Data Packet Starts Transmission
MCP2140
DS21790B-page 10
Preliminary
2003-2012 Microchip Technology Inc.
FIGURE 2-4:
HOST UART CTS FLOW CONTROL FLOWCHART
Transmit Byte
CTS Low?
Y
N
CNTR = 6
CTS Low?
Y
N
DTR Low?
Y
N
Transmit Byte
CTS Low?
Y
N
CNTR = CNTR - 1
CNTR = 0?
Y
N
IR Flow Start
Lost IR Link