HEXFET
®
Power MOSFET
S
D
G
V
DSS
= 100V
R
DS(on)
= 0.185
Ω
I
D
= 10A
Description
l
Surface Mount (IRLR120N)
l
Straight Lead (IRLU120N)
l
Advanced Process Technology
l
Fast Switching
l
Fully Avalanche Rated
l
Lead-Free
Fifth Generation HEXFETs from International Rectifier utilize
advanced processing techniques to achieve the lowest possible
on-resistance per silicon area. This benefit, combined with the
fast switching speed and ruggedized device design that HEXFET
Power MOSFETs are well known for, provides the designer with
an extremely efficient device for use in a wide variety of
applications.
The D-PAK is designed for surface mounting using vapor
phase, infrared, or wave soldering techniques. The straight lead
version (IRFU series) is for through-hole mounting applications.
Power dissipation levels up to 1.5 watts are possible in typical
surface mount applications.
IRLR120NPbF
IRLU120NPbF
Parameter
Max.
Units
I
D
@ T
C
= 25°C
Continuous Drain Current, V
GS
@ 10V
10
I
D
@ T
C
= 100°C
Continuous Drain Current, V
GS
@ 10V
7.0
A
I
DM
Pulsed Drain Current
35
P
D
@T
C
= 25°C
Power Dissipation
48
W
Linear Derating Factor
0.32
W/°C
V
GS
Gate-to-Source Voltage
± 16
V
E
AS
Single Pulse Avalanche Energy
85
mJ
I
AR
Avalanche Current
6.0
A
E
AR
Repetitive Avalanche Energy
4.8
mJ
dv/dt
Peak Diode Recovery dv/dt
5.0
V/ns
T
J
Operating Junction and
-55 to + 175
T
STG
Storage Temperature Range
Soldering Temperature, for 10 seconds
300 (1.6mm from case )
°C
Absolute Maximum Ratings
1
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Parameter
Typ.
Max.
Units
R
θJC
Junction-to-Case
–––
3.1
R
θJA
Junction-to-Ambient (PCB mount) **
–––
50
°C/W
R
θJA
Junction-to-Ambient
–––
110
Thermal Resistance
D-Pak
IRLR120NPbF
G
S
D
D
S
G
I-Pak
IRLU120NPbF
Form
Quantity
Tube
75
IRLR120NPbF
Tape and Reel
2000
IRLR120NTRPbF
Tape and Reel Left
3000
IRLR120NTRLPbF
Tape and Reel Right
3000
IRLR120NTRRPbF
EOL notice # 289
IRLU120NPbF
IPak
Tube
75
IRLU120NPbF
Note
Package Type
Standard Pack
Orderable Part Number
Base Part Number
IRLR120NPbF
D-Pak
2
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IRLR/U120NPbF
Parameter
Min. Typ. Max. Units
Conditions
V
(BR)DSS
Drain-to-Source Breakdown Voltage
100
––– –––
V
V
GS
= 0V, I
D
= 250μA
ΔV
(BR)DSS
/
ΔT
J
Breakdown Voltage Temp. Coefficient
–––
0.12 –––
V/°C Reference to 25°C, I
D
= 1mA
–––
––– 0.185
V
GS
= 10V, I
D
= 6.0A
–––
––– 0.225
Ω
V
GS
= 5.0V, I
D
= 6.0A
–––
––– 0.265
V
GS
= 4.0V, I
D
= 5.0A
V
GS(th)
Gate Threshold Voltage
1.0
–––
2.0
V
V
DS
= V
GS
, I
D
= 250μA
g
fs
Forward Transconductance
3.1
––– –––
S
V
DS
= 25V, I
D
= 6.0A
–––
–––
25
μA
V
DS
= 100V, V
GS
= 0V
–––
––– 250
V
DS
= 80V, V
GS
= 0V, T
J
= 150°C
Gate-to-Source Forward Leakage
–––
––– 100
nA
V
GS
= 16V
Gate-to-Source Reverse Leakage
–––
––– -100
V
GS
= -16V
Q
g
Total Gate Charge
–––
–––
20
I
D
= 6.0A
Q
gs
Gate-to-Source Charge
–––
–––
4.6
nC
V
DS
= 80V
Q
gd
Gate-to-Drain ("Miller") Charge
–––
–––
10
V
GS
= 5.0V, See Fig. 6 and 13
t
d(on)
Turn-On Delay Time
–––
4.0
–––
V
DD
= 50V
t
r
Rise Time
–––
35
–––
ns
I
D
= 6.0A
t
d(off)
Turn-Off Delay Time
–––
23
–––
R
G
= 11
Ω, V
GS
= 5.0V
t
f
Fall Time
–––
22
–––
R
D
= 8.2
Ω, See Fig. 10
Between lead,
6mm (0.25in.)
from package
and center of die contact
C
iss
Input Capacitance
–––
440 –––
V
GS
= 0V
C
oss
Output Capacitance
–––
97
–––
pF
V
DS
= 25V
C
rss
Reverse Transfer Capacitance
–––
50
–––
ƒ = 1.0MHz, See Fig. 5
Electrical Characteristics @ T
J
= 25°C (unless otherwise specified)
nH
I
GSS
S
D
G
L
S
Internal Source Inductance
––– 7.5
–––
R
DS(on)
Static Drain-to-Source On-Resistance
L
D
Internal Drain Inductance
4.5
I
DSS
Drain-to-Source Leakage Current
S
D
G
Parameter
Min. Typ. Max. Units
Conditions
I
S
Continuous Source Current
MOSFET symbol
(Body Diode)
––– –––
showing the
I
SM
Pulsed Source Current
integral reverse
(Body Diode)
––– –––
p-n junction diode.
V
SD
Diode Forward Voltage
––– –––
1.3
V
T
J
= 25°C, I
S
= 6.0A, V
GS
= 0V
t
rr
Reverse Recovery Time
––– 110 160
ns
T
J
= 25°C, I
F
=6.0A
Q
rr
Reverse RecoveryCharge
––– 410 620
nC
di/dt = 100A/μs
t
on
Forward Turn-On Time
Intrinsic turn-on time is negligible (turn-on is dominated by L
S
+L
D
)
Source-Drain Ratings and Characteristics
A
10
35
Notes:
V
DD
= 25V, starting T
J
= 25°C, L = 4.7mH
R
G
= 25
Ω, I
AS
= 6.0A. (See Figure 12)
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
** When mounted on 1" square PCB (FR-4 or G-10 Material ) .
For recommended footprint and soldering techniques refer to application note #AN-994
I
SD
≤ 6.0A, di/dt ≤ 340A/μs, V
DD
≤ V
(BR)DSS
,
T
J
≤ 175°C
Uses IRL520N data and test conditions.
This is applied for I-PAK, L
S
of D-PAK is measured between lead and
center of die contact
Pulse width ≤ 300μs; duty cycle ≤ 2%.
3
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IRLR/U120NPbF
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance
Vs. Temperature
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
0.1
1
10
100
0.1
1
10
100
I , D
ra
in
-to
-S
ou
rc
e C
urre
nt
(A
)
D
V , Drain-to-Source Voltage (V)
DS
A
20μs PULSE WIDTH
T = 25°C
J
VGS
TOP 15V
12V
10V
8.0V
6.0V
4.0V
3.0V
BOTTOM 2.5V
2.5V
0.1
1
10
100
0.1
1
10
100
I , D
ra
in
-to
-S
ou
rc
e C
urre
nt
(A
)
D
V , Drain-to-Source Voltage (V)
DS
A
20μs PULSE WIDTH
T = 175°C
VGS
TOP 15V
12V
10V
8.0V
6.0V
4.0V
3.0V
BOTTOM 2.5V
2.5V
J
0.1
1
10
100
2
4
6
8
10
T = 25°C
J
GS
V , Gate-to-Source Voltage (V)
D
I
, Dra
in
-to
-S
o
urc
e
C
urre
n
t (A)
T = 175°C
J
A
V = 50V
20μs PULSE WIDTH
DS
0.0
0.5
1.0
1.5
2.0
2.5
3.0
-60 -40 -20
0
20
40
60
80 100 120 140 160 180
J
T , Junction Temperature (°C)
R
, D
ra
in
-to
-S
ou
rc
e O
n R
es
is
ta
nc
e
DS
(o
n)
(N
or
m
al
iz
ed)
V = 10V
GS
A
I = 10A
D
4
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IRLR/U120NPbF
Fig 8. Maximum Safe Operating Area
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 7. Typical Source-Drain Diode
Forward Voltage
0
200
400
600
800
1
10
100
C
, Ca
pa
ci
ta
nc
e (
pF)
DS
V , Drain-to-Source Voltage (V)
A
V = 0V, f = 1MHz
C = C + C , C SHORTED
C = C
C = C + C
GS
iss gs gd ds
rss gd
oss ds gd
C
iss
C
oss
C
rss
0
3
6
9
12
15
0
5
10
15
20
25
Q , Total Gate Charge (nC)
G
V
, G
ate
-to
-S
ou
rc
e V
ol
ta
ge
(V
)
GS
V = 80V
V = 50V
V = 20V
A
FOR TEST CIRCUIT
SEE FIGURE 13
I = 6.0A
D
DS
DS
DS
0.1
1
10
100
0.4
0.6
0.8
1.0
1.2
1.4
T = 25°C
J
V = 0V
GS
V , Source-to-Drain Voltage (V)
I , R
ev
ers
e D
ra
in
C
urre
nt
(A
)
SD
SD
A
T = 175°C
J
0.1
1
10
100
1
10
100
1000
V , Drain-to-Source Voltage (V)
DS
I
, D
ra
in
C
urre
nt
(A
)
OPERATION IN THIS AREA LIMITED
BY R
D
DS(on)
10μs
100μs
1ms
10ms
A
T = 25°C
T = 175°C
Single Pulse
C
J
5
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IRLR/U120NPbF
Fig 9. Maximum Drain Current Vs.
Case Temperature
Fig 10a. Switching Time Test Circuit
V
DS
90%
10%
V
GS
t
d(on)
t
r
t
d(off)
t
f
Fig 10b. Switching Time Waveforms
V
DS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
R
D
V
GS
R
G
D.U.T.
5.0V
+
-
V
DD
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
0
2
4
6
8
10
25
50
75
100
125
150
175
C
I , D
ra
in
C
urre
nt
(
A
m
ps
)
D
T , Case Temperature (°C)
A
0.01
0.1
1
10
0.00001
0.0001
0.001
0.01
0.1
Notes:
1. Duty factor D = t / t
2. Peak T = P
x Z
+ T
1
2
J
DM
thJC
C
P
t
t
DM
1
2
t , Rectangular Pulse Duration (sec)
Ther
m
al
R
esponse
(Z
)
1
thJC
0.01
0.02
0.05
0.10
0.20
D = 0.50
SINGLE PULSE
(THERMAL RESPONSE)
6
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IRLR/U120NPbF
Q
G
Q
GS
Q
GD
V
G
Charge
5.0 V
Fig 13b. Gate Charge Test Circuit
Fig 13a. Basic Gate Charge Waveform
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
D.U.T.
V
DS
I
D
I
G
3mA
V
GS
.3
μF
50K
Ω
.2
μF
12V
Current Regulator
Same Type as D.U.T.
Current Sampling Resistors
+
-
Fig 12b. Unclamped Inductive Waveforms
Fig 12a. Unclamped Inductive Test Circuit
tp
V
(BR)DSS
I
AS
RG
IAS
0.01
Ω
tp
D.U.T
L
VDS
+
- VDD
DRIVER
A
15V
10V
0
40
80
120
160
200
25
50
75
100
125
150
175
J
E
, S
in
gle
P
ul
se
A
va
la
nc
he
E
ne
rg
y (m
J)
AS
A
Starting T , Junction Temperature (°C)
I
TOP 2.4A
4.2A
BOTTOM 6.0A
D
7
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IRLR/U120NPbF
P.W.
Period
di/dt
Diode Recovery
dv/dt
Ripple
≤ 5%
Body Diode Forward Drop
Re-Applied
Voltage
Reverse
Recovery
Current
Body Diode Forward
Current
V
GS
=10V
V
DD
I
SD
Driver Gate Drive
D.U.T. I
SD
Waveform
D.U.T. V
DS
Waveform
Inductor Curent
D =
P.W.
Period
+
-
+
+
+
-
-
-
Fig 14. For N-Channel HEXFETS
*
V
GS
= 5V for Logic Level Devices
Peak Diode Recovery dv/dt Test Circuit
R
G
V
DD
• dv/dt controlled by R
G
• Driver same type as D.U.T.
• I
SD
controlled by Duty Factor "D"
• D.U.T. - Device Under Test
D.U.T
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
*
8
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IRLR/U120NPbF
D-Pak (TO-252AA) Part Marking Information
D-Pak (TO-252AA) Package Outline
Dimensions are shown in millimeters (inches)
Note: For the most current drawing please refer to IR website at
http://www.irf.com/package/
INTERNATIONAL
AS SEMBLED ON WW 16, 2001
IN T HE AS SEMBLY LINE "A"
OR
Note: "P" in ass embly line pos ition
EXAMPLE:
LOT CODE 1234
T HIS IS AN IRFR120
WIT H AS SEMBLY
indicates "Lead-Free"
PRODUCT (OPTIONAL)
P = DES IGNAT ES LEAD-FREE
A = AS SEMBLY SIT E CODE
PART NUMBER
WEEK 16
DATE CODE
YEAR 1 = 2001
RECT IFIER
INTERNAT IONAL
LOGO
LOT CODE
ASS EMBLY
34
12
IRFR120
116A
LINE A
34
RECT IFIER
LOGO
IRFR120
12
AS SEMBLY
LOT CODE
YEAR 1 = 2001
DAT E CODE
PART NUMBER
WEEK 16
"P" in as sembly line pos ition indicates
"Lead-Free" qualification to the cons umer-level
P = DES IGNAT ES LEAD-FREE
PRODUCT QUALIFIED T O T HE
CONS UMER LEVEL (OPT IONAL)
9
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IRLR/U120NPbF
I-Pak (TO-251AA) Package Outline
Dimensions are shown in millimeters (inches)
I-Pak (TO-251AA) Part Marking Information
78
LINE A
L OGO
INT E R NAT IONAL
R E CT IF IE R
OR
PR ODU CT (OPT IONAL )
P = DE S IGNAT E S LE AD-F R E E
A = AS S E MB L Y S IT E CODE
IR F U 120
PAR T NU MB E R
WE E K 19
DAT E CODE
YE AR 1 = 2001
R E CT IF IE R
INT E R NAT IONAL
L OGO
AS S E MB LY
L OT CODE
IR F U 120
56
DAT E CODE
PAR T NU MB E R
L OT CODE
AS S E MB L Y
56
78
YE AR 1 = 2001
WE E K 19
119A
indicates L ead-F ree"
AS S E MB L E D ON WW 19, 2001
IN T H E AS S E MB LY L INE "A"
Note: "P" in as s embly line pos ition
E XAMPL E :
WIT H AS S E MB L Y
T HIS IS AN IR F U 120
L OT CODE 5678
Note: For the most current drawing please refer to IR website at
http://www.irf.com/package/
10
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July 9, 2014
IRLR/U120NPbF
D-Pak (TO-252AA) Tape & Reel Information
Dimensions are shown in millimeters (inches)
TR
16.3 ( .641 )
15.7 ( .619 )
8.1 ( .318 )
7.9 ( .312 )
12.1 ( .476 )
11.9 ( .469 )
FEED DIRECTION
FEED DIRECTION
16.3 ( .641 )
15.7 ( .619 )
TRR
TRL
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
NOTES :
1. OUTLINE CONFORMS TO EIA-481.
16 mm
13 INCH
Note: For the most current drawing please refer to IR website at
http://www.irf.com/package/