HEXFET
®
Power MOSFET
PQFN 3.3 x 3.3 mm
Features
Benefits
Low R
DSon
(< 3.5m
)
Lower Conduction Losses
Low Thermal Resistance to PCB (<3.4°C/W)
Enable better thermal dissipation
Low Profile (< 1.0 mm)
results in Increased Power Density
Industry-Standard Pinout
Multi-Vendor Compatibility
Compatible with Existing Surface Mount Techniques
Easier Manufacturing
RoHS Compliant Containing no Lead, no Bromide and no Halogen
Environmentally Friendlier
MSL1, Industrial Qualification
Increased Reliability
Notes through are on page 9
Absolute Maximum Ratings
Parameter Max.
Units
V
DS
Drain-to-Source Voltage
30
V
GS
Gate-to-Source Voltage
± 12
I
D
@ T
A
= 25°C
Continuous Drain Current, V
GS
@ 4.5V
21
A
I
D
@ T
C(Bottom)
= 25°C
Continuous Drain Current, V
GS
@ 4.5V
40
I
D
@ T
C(Bottom)
= 100°C Continuous Drain Current, V
GS
@ 4.5V
40
I
DM
Pulsed Drain Current 160
P
D
@T
A
= 25°C
Power Dissipation 2.7
W
P
D
@T
C(Bottom)
= 25°C
Power Dissipation 37
Linear Derating Factor 0.022
W/°C
T
J
Operating Junction and
-55 to + 150
°C
T
STG
Storage Temperature Range
V
I
D
@ T
A
= 70°C
Continuous Drain Current, V
GS
@ 4.5V
17
Applications
Battery Operated DC Motor Inverter MOSFET
Secondary Side Synchronous Rectification MOSFET
IRLHM630PbF
1
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© 2015 International Rectifier
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September 25, 2015
Orderable part number
Package Type
Standard Pack
Note
Form Quantity
IRLHM630TRPbF
PQFN 3.3mm x 3.3mm
Tape and Reel
4000
IRLHM630TR2PBF
PQFN 3.3mm x 3.3mm
Tape and Reel
400
EOL notice # 259
V
DSS
30
V
R
DS(on)
max
(@ V
GS
= 4.5V)
3.5
(@ V
GS
= 2.5V)
4.5
Qg
(typical)
41
nC
I
D
(@T
C (Bottom)
= 25°C)
40 A
m
V
GS
±12
V
IRLHM630PbF
2
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© 2015 International Rectifier
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September 25, 2015
D
S
G
Static @ T
J
= 25°C (unless otherwise specified)
Parameter Min.
Typ.
Max.
Units
Conditions
BV
DSS
Drain-to-Source Breakdown Voltage
30
–––
–––
V
V
GS
= 0V, I
D
= 250µA
BV
DSS
/
T
J
Breakdown Voltage Temp. Coefficient
–––
2.1
––– mV/°C Reference to 25°C, I
D
= 1mA
R
DS(on)
––– 2.2 3.2
m
V
GS
= 10V, I
D
= 20A
––– 2.5 3.5
V
GS
= 4.5V, I
D
= 20A
––– 3.5 4.5
V
GS
= 2.5V, I
D
= 20A
V
GS(th)
Gate Threshold Voltage
0.5
0.8
1.1
V
V
DS
= V
GS
, I
D
= 50µA
V
GS(th)
Gate Threshold Voltage Coefficient
–––
-3.8
––– mV/°C
I
DSS
Drain-to-Source Leakage Current
–––
–––
1
µA
V
DS
= 24V, V
GS
= 0V
––– ––– 150
V
DS
= 24V,V
GS
= 0V,T
J
= 125°C
I
GSS
Gate-to-Source Forward Leakage
–––
–––
100
nA
V
GS
= 12V
Gate-to-Source Reverse Leakage
–––
–––
-100
V
GS
= - 12V
gfs Forward
Transconductance
140
–––
–––
S
V
DS
= 10V, I
D
= 20A
Q
g
Total Gate Charge
–––
41
62
nC
V
DS
= 15V
Q
gs
Gate-to-Source Charge
–––
4.6
–––
V
GS
= 4.5V
Q
gd
Gate-to-Drain Charge
–––
14
–––
I
D
= 20A (See Fig.17 & 18)
R
G
Gate Resistance
–––
2.6
–––
t
d(on)
Turn-On Delay Time
–––
9.1
–––
ns
V
DD
= 10V, V
GS
= 4.5V
t
r
Rise Time
–––
32
–––
I
D
= 20A
t
d(off)
Turn-Off Delay Time
–––
65
–––
R
G
= 1.0
t
f
Fall Time
–––
43
–––
See Fig.15
C
iss
Input Capacitance
–––
3170
–––
pF
V
GS
= 0V
C
oss
Output Capacitance
–––
330
–––
V
DS
= 25V
C
rss
Reverse Transfer Capacitance
–––
250
–––
ƒ = 1.0MHz
Static Drain-to-Source On-Resistance
Thermal Resistance
Parameter Typ.
Max.
Units
R
JC
(Bottom)
Junction-to-Case –––
3.4
R
JC
(Top)
Junction-to-Case –––
37
R
JA
Junction-to-Ambient –––
46
R
JA
(<10s)
Junction-to-Ambient –––
31
°C/W
Avalanche Characteristics
Parameter Typ.
Max.
Units
E
AS (Thermally limited)
Single Pulse Avalanche Energy –––
80
mJ
I
AR
Avalanche Current –––
20
A
Diode Characteristics
Parameter
Min.
Typ.
Max. Units
Conditions
I
S
Continuous Source Current
––– ––– 40
A
MOSFET symbol
(Body Diode)
showing the
I
SM
Pulsed Source Current
––– ––– 160
integral reverse
(Body Diode)
p-n junction diode.
V
SD
Diode Forward Voltage
–––
–––
1.2
V
T
J
= 25°C, I
S
= 20A, V
GS
= 0V
t
rr
Reverse Recovery Time
–––
20
30
ns
T
J
= 25°C, I
F
= 20A, V
DD
= 15V
Q
rr
Reverse Recovery Charge
–––
30
45
nC di/dt = 400A/µs
IRLHM630PbF
3
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Fig 1. Typical Output Characteristics
Fig 4. Normalized On-Resistance vs. Temperature
Fig 5. Typical Capacitance vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage
Fig 3. Typical Transfer Characteristics
Fig 2. Typical Output Characteristics
0.1
1
10
100
VDS, Drain-to-Source Voltage (V)
0.1
1
10
100
1000
I D
, D
ra
in
-t
o-
S
o
ur
ce
C
ur
re
nt
(
A
)
VGS
TOP
10V
4.5V
3.5V
2.5V
2.0V
1.6V
1.5V
BOTTOM
1.3V
60µs PULSE WIDTH
Tj = 25°C
1.3V
0.1
1
10
100
VDS, Drain-to-Source Voltage (V)
1
10
100
1000
I D
, D
ra
in
-t
o-
S
o
ur
ce
C
ur
re
nt
(
A
)
VGS
TOP
10V
4.5V
3.5V
2.5V
2.0V
1.6V
1.5V
BOTTOM
1.3V
60µs PULSE WIDTH
Tj = 150°C
1.3V
1.0
1.5
2.0
2.5
VGS, Gate-to-Source Voltage (V)
1.0
10
100
1000
I D
, D
ra
in
-t
o-
S
ou
rc
e
C
ur
re
nt
(A
)
TJ = 25°C
TJ = 150°C
VDS = 15V
60µs PULSE WIDTH
-60 -40 -20 0 20 40 60 80 100 120 140 160
TJ , Junction Temperature (°C)
0.6
0.8
1.0
1.2
1.4
1.6
1.8
R
D
S
(o
n)
,
D
ra
in
-t
o-
S
ou
rc
e
O
n
R
es
is
ta
nc
e
(
N
or
m
al
iz
ed
)
ID = 20A
VGS = 4.5V
1
10
100
VDS, Drain-to-Source Voltage (V)
100
1000
10000
100000
C
, C
ap
ac
ita
nc
e
(p
F
)
VGS = 0V, f = 1 MHZ
Ciss = Cgs + Cgd, Cds SHORTED
Crss = Cgd
Coss = Cds + Cgd
Coss
Crss
Ciss
0
20
40
60
80
100
120
QG Total Gate Charge (nC)
0
2
4
6
8
10
12
14
V
G
S
, G
at
e-
to
-S
ou
rc
e
V
ol
ta
ge
(
V
)
VDS= 24V
VDS= 15V
VDS= 6.0V
ID= 20A
IRLHM630PbF
4
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Fig 8. Maximum Safe Operating Area
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 10. Threshold Voltage Vs. Temperature
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
0.0
0.2
0.4
0.6
0.8
1.0
1.2
VSD, Source-to-Drain Voltage (V)
1.0
10
100
1000
I S
D
, R
ev
er
se
D
ra
in
C
ur
re
nt
(
A
)
TJ = 25°C
TJ = 150°C
VGS = 0V
0.1
1
10
100
VDS, Drain-to-Source Voltage (V)
0.1
1
10
100
1000
I D
,
D
ra
in
-t
o-
S
ou
rc
e
C
ur
re
nt
(
A
)
Tc = 25°C
Tj = 150°C
Single Pulse
1msec
10msec
OPERATION IN THIS AREA
LIMITED BY RDS(on)
100µsec
DC
25
50
75
100
125
150
TC, Case Temperature (°C)
0
20
40
60
80
I D
,
D
ra
in
C
ur
re
nt
(
A
)
LIMITED BY PACKAGE
Fig 9. Maximum Drain Current vs. Case Temperature
-75 -50 -25
0
25
50
75 100 125 150
TJ , Temperature ( °C )
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
V
G
S
(t
h)
, G
at
e
th
re
sh
ol
d
V
ol
ta
ge
(
V
)
ID = 50µA
ID = 250µA
ID = 1.0mA
ID = 10mA
1E-006
1E-005
0.0001
0.001
0.01
0.1
1
t1 , Rectangular Pulse Duration (sec)
0.001
0.01
0.1
1
10
T
he
rm
al
R
es
po
ns
e
(
Z
th
JC
)
°
C
/W
0.20
0.10
D = 0.50
0.02
0.01
0.05
SINGLE PULSE
( THERMAL RESPONSE )
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
IRLHM630PbF
5
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Fig 13. Maximum Avalanche Energy vs. Drain Current
Fig 15a. Switching Time Test Circuit
Fig 15b. Switching Time Waveforms
Fig 14a. Unclamped Inductive Test Circuit
R G
IAS
0.01
tp
D.U.T
L
VDS
+
- VDD
DRIVER
A
15V
20V
tp
V
(BR)DSS
I
AS
Fig 14b. Unclamped Inductive Waveforms
0
2
4
6
8
10
12
VGS, Gate -to -Source Voltage (V)
2
3
4
5
6
7
8
9
10
11
12
R
D
S
(o
n
),
D
ra
in
-t
o
-
S
ou
rc
e
O
n
R
es
is
ta
nc
e
(m
)
ID = 20A
TJ = 25°C
TJ = 125°C
Fig 12. On– Resistance vs. Gate Voltage
25
50
75
100
125
150
Starting TJ , Junction Temperature (°C)
0
50
100
150
200
250
300
350
E
A
S
,
S
in
gl
e
P
ul
se
A
va
la
nc
he
E
ne
rg
y
(m
J)
ID
TOP 5.8A
11A
BOTTOM 20A
IRLHM630PbF
6
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Fig 16. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET
®
Power MOSFETs
Fig 17. Gate Charge Test Circuit
Vds
Vgs
Id
Vgs(th)
Qgs1 Qgs2
Qgd
Qgodr
Fig 18. Gate Charge Waveform
IRLHM630PbF
7
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For more information on board mounting, including footprint and stencil recommendation, please refer to application note
AN-1136:
http://www.irf.com/technical-info/appnotes/an-1136.pdf
For more information on package inspection techniques, please refer to application note AN-1154:
http://www.irf.com/technical-info/appnotes/an-1154.pdf
PQFN 3.3 x 3.3 Outline “G” Package Details
PQFN 3.3 x 3.3 Outline “B” Package Details
5
8
7
6
#1
3
2
4
#1
2
3
4
8
7
6
5
IRLHM630PbF
8
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PQFN 3.3 x 3.3 Tape and Reel
Note: For the most current drawing please refer to IR website at
http://www.irf.com/package/
Bo
W
P1
Ao
Ko
CODE
TAPE DIMENSIONS
REEL DIMENSIONS
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
Dimension design to accommodate the component width
Dimension design to accommodate the component lenght
Dimension design to accommodate the component thickness
Pitch between successive cavity centers
Overall width of the carrier tape
Bo
W
P1
Ao
Ko
DIMENSION (MM)
CODE
MIN
MAX
DIMENSION (INCH)
MIN
MAX
3.50
3.70
.138
.146
1.10
1.30
7.90
8.10
.043
.051
11.80
12.20
.311
.319
12.30
12.50
.465
.480
.484
.492
3.50
3.70
.138
.146
DESCRIPTION
W1
Qty
4000
Reel Diameter
13 Inches
PQFN 3.3 x 3.3 Part Marking
Note: For the most current drawing please refer to IR website at
http://www.irf.com/package/
XXXX
?YWW?
XXXXX
INTERNATIONAL
RECTIFIER LOGO
PART NUMBER
MARKING CODE
(Per Marking Spec)
ASSEMBLY
SITE CODE
(Per SCOP 200-002)
DATE CODE
LOT CODE
(Eng Mode - Min last 4 digits of EATI#)
(Prod Mode - 4 digits of SPN code)
PIN 1
IDENTIFIER
IRLHM630PbF
9
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Qualification Information
†
Qualification Level
Moisture Sensitivity Level
PQFN 3.3mm x 3.3mm
MSL1
(per JEDEC J-STD-020D
††)
RoHS Compliant
Yes
Industrial
(per JEDEC JESD47F
††
guidelines)
IR WORLD HEADQUARTERS: 101 N. Sepulveda Blvd., El Segundo, California 90245, USA
To contact International Rectifier, please visit
http://www.irf.com/whoto-call/
† Qualification standards can be found at International Rectifier’s web site:
http://www.irf.com/product-info/reliability
†† Applicable version of JEDEC standard at the time of product release.
Notes:
Repetitive rating; pulse width limited by max. junction temperature.
Starting T
J
= 25°C, L = 0.59mH, R
G
= 50
, I
AS
= 12A.
Pulse width
400µs; duty cycle 2%.
R
is measured at TJ of approximately 90°C.
When mounted on 1 inch square PCB (FR-4). Please refer to AN-994 for more details:
http://www.irf.com/technical-info/appnotes/an-994.pdf
Calculated continuous current based on maximum allowable junction temperature. Package is limited to 40A by production
test capability.
Revision History
Date Comments
1/14/2014
Updated ordering information to reflect the End-Of-life (EOL) of the mini-reel option (EOL notice #259)
Updated data sheet with new IR corporate template
5/29/2015
Added Rdson typical ="1.5m", Max = "2.2m" @ V
GS
=10V,I
D
=20A on page 2.
Updated Rdson typical from "2m" to "1.8m" @ V
GS
=4.5V,I
D
=20A on page 2.
Updated package outline and tape and Reel on page 7 & 8.
9/25/2015
Updated package outline to reflect the PCN # (67-PCN90-Public-R2) for “option B” and added
package outline for “option G” on page 7
Updated "IFX" logo on all pages.
Corrected typo for “Gate Charge, Switch time & trr” test condition on page 2.