IRFS_SL7434PbF Product Datasheet

/var/www/html/datasheet/sites/default/files/pdfhtml_dummy/irfs7434pbf-html.html
background image

HEXFET

®

 Power MOSFET

Benefits

l

Improved  Gate, Avalanche and Dynamic dV/dt
Ruggedness

l

Fully Characterized Capacitance and Avalanche

     SOA

l

Enhanced body diode dV/dt and dI/dt Capability

Lead-Free

G

D

S

Gate

Drain

Source

Fig 1.   Typical On-Resistance vs. Gate Voltage

Fig 2.  Maximum Drain Current vs. Case Temperature

Applications

Brushed Motor drive applications

BLDC Motor drive applications

Battery powered circuits

Half-bridge and full-bridge topologies

Synchronous rectifier applications

Resonant mode power supplies

OR-ing and redundant power switches

DC/DC and AC/DC converters

DC/AC Inverters

2

4

6

8

10

12

14

16

18

20

VGS, Gate -to -Source Voltage  (V)

0

1

2

3

4

5

R

D

S

(o

n)

,  

D

ra

in

-t

-S

ou

rc

O

R

es

is

ta

nc

(m

Ω

)

ID = 100A

TJ = 25°C

TJ = 125°C

D

S

G

IRFS7434PbF

IRFSL7434PbF

Strong

IR

FET™

D

S

G

D

2

Pak

IRFS7434PbF

S

D

G

D

TO-262

IRFSL7434PbF

25

50

75

100

125

150

175

 TC , Case Temperature (°C)

0

50

100

150

200

250

300

350

I D

,   

D

ra

in

 C

ur

re

nt

 (

A

)

Limited By  Package

Ordering Information

Form

Quantity

IRFSL7434PbF

TO-262

Tube

50

IRFSL7434PbF

Tube

50

IRFS7434PbF

Tape and Reel Left

800

IRFS7434TRLPbF

Base part number

Package Type

Standard Pack

Complete Part Number

D2Pak

IRFS7434PbF

1

www.irf.com 

  © 2014 International Rectifier          

Submit Datasheet Feedback

                 November 19, 2014

V

DSS

40V

R

DS(on)

   typ.

1.25mΩ

              max.

1.6mΩ

I

(Silicon Limited)

320A

c

I

(Package Limited)

195A 

/var/www/html/datasheet/sites/default/files/pdfhtml_dummy/irfs7434pbf-html.html
background image

IRFS/SL7434PbF

www.irf.com 

  © 2014 International Rectifier          

Submit Datasheet Feedback

                November 19, 2014

2

Notes:



 Calculated continuous current based on maximum allowable junction

temperature. Bond wire current limit is 195A 

by source

     bonding technology . Note that current limitations arising from
     heating of the device leads may occur with some lead mounting
     arrangements. 

(Refer to AN-1140)

‚

 Repetitive rating;  pulse width limited by max. junction

temperature.

ƒ

 Limited by T

Jmax

, starting T

= 25°C, L = 0.099mH

     R

= 50

Ω, I

AS 

= 100A, V

GS

 =10V.

„

I

SD 

≤ 100A, di/dt ≤ 1307A/μs, V

DD 

≤ V

(BR)DSS

, T

≤ 175°C.

…

 Pulse width ≤ 400μs; duty cycle ≤ 2%.

†

 C

oss

 eff. (TR) is a fixed capacitance that gives the same charging time

     as C

oss 

while V

DS 

is rising from 0 to 80% V

DSS

.

‡ 

C

oss

 eff. (ER) is a fixed capacitance that gives the same energy as

     C

oss 

while V

DS 

is rising from 0 to 80% V

DSS

.

ˆ

 

R

θ 

is measured at T

J

 approximately 90°C.

‰

  Limited by T

Jmax 

starting

 

T

= 25°C, L= 1mH, R

= 50

Ω, I

AS 

= 47A, V

GS

 =10V.

Š

 When mounted on 1" square PCB (FR-4 or G-10 Material).

    

Please refer to AN-994 for more details:

    

http://www.irf.com/technical-info/appnotes/an-994.pdf

∗ 

 

Pulse drain current is limited at 780A by source bonding technology.

Absolute Maximum Ratings

Symbol

Parameter

Units

I

D

 @ T

C

 = 25°C

Continuous Drain Current, V

GS

 @ 10V (Silicon Limited)

I

D

 @ T

C

 = 100°C

Continuous Drain Current, V

GS

 @ 10V (Silicon Limited)

I

D

 @ T

C

 = 25°C

Continuous Drain Current, V

GS

 @ 10V (Wire Bond Limited)

I

DM

Pulsed Drain Current 

d

P

D

 @T

C

 = 25°C

Maximum Power Dissipation  

W

Linear Derating Factor

W/°C

V

GS

Gate-to-Source Voltage

V

dv/dt

Peak Diode Recovery

f

V/ns

T

Operating Junction and

T

STG

Storage Temperature Range
Soldering Temperature, for 10 seconds (1.6mm from case)

Avalanche Characteristics

E

AS (Thermally limited) 

Single Pulse Avalanche Energy e

mJ

E

AS (Thermally limited) 

Single Pulse Avalanche Energy  k

I

AR

Avalanche Currentd

A

E

AR

Repetitive Avalanche Energy d

mJ

Thermal Resistance

Symbol

Parameter

Typ.

Max.

Units

R

θJC 

Junction-to-Case j

–––

0.5

R

θJA 

Junction-to-Ambient (PCB Mount) , D

2

Pak l

–––

40

°C/W

Max.

320

c

226

c

1270 *

195

1098

-55  to + 175

 ± 20

1.96

See Fig. 14, 15 , 22a, 22b

A

°C

300

490

294

5.0

Static @ T

J

 = 25°C (unless otherwise specified)

Symbol

Parameter

Min.

Typ.

Max.

Units

V

(BR)DSS

Drain-to-Source Breakdown Voltage

40

–––

–––

V

ΔV

(BR)DSS

/

ΔT

Breakdown Voltage Temp. Coefficient

–––

32

–––

mV/°C

R

DS(on)

Static Drain-to-Source On-Resistance

–––

1.25

1.6

m

Ω

1.8

–––

m

Ω

V

GS(th)

Gate Threshold Voltage

2.2

3.0

3.9

V

I

DSS

Drain-to-Source Leakage Current

–––

–––

1.0

–––

–––

150

I

GSS

Gate-to-Source Forward Leakage

–––

–––

100

Gate-to-Source Reverse Leakage

–––

–––

-100

R

G

Internal Gate Resistance

–––

2.1

–––

Ω

Conditions

V

GS

 = 0V, I

D

 = 250μA

Reference to 25°C, I

D

 = 5mA

d

V

GS

 = 10V, I

D

 = 100A 

g

V

GS

 = 6.0V, I

D

 = 50A 

g

V

DS

 = V

GS

, I

D

 = 250μA

μA

nA

V

DS

 = 40V, V

GS

 = 0V

V

DS

 = 40V, V

GS

 = 0V, T

J

 = 125°C

V

GS

 = 20V

V

GS

 = -20V

/var/www/html/datasheet/sites/default/files/pdfhtml_dummy/irfs7434pbf-html.html
background image

IRFS/SL7434PbF

3

www.irf.com 

  © 2014 International Rectifier          

Submit Datasheet Feedback

                 November 19, 2014

S

D

G

Dynamic @ T

J

 = 25°C (unless otherwise specified)

Symbol

Parameter

Min.

Typ.

Max.

Units

gfs

Forward Transconductance

211

–––

–––

S

Q

g

Total Gate Charge

–––

216

324

Q

gs

Gate-to-Source Charge

–––

51

–––

Q

gd

Gate-to-Drain ("Miller") Charge

–––

77

–––

Q

sync

Total Gate Charge Sync. (Q

g

 - Q

gd

)

–––

139

–––

t

d(on)

Turn-On Delay Time

–––

24

–––

t

r

Rise Time

–––

68

–––

t

d(off)

Turn-Off Delay Time

–––

115

–––

t

f

Fall Time

–––

68

–––

C

iss

Input Capacitance

–––

10820

–––

C

oss

Output Capacitance

–––

1540

–––

C

rss

Reverse Transfer Capacitance

–––

1140

–––

C

oss

 eff. (ER)

Effective Output Capacitance (Energy Related) 

–––

1880

–––

C

oss

 eff. (TR)

Effective Output Capacitance (Time Related)

–––

2208

–––

Diode Characteristics

Symbol

        Parameter

Min.

Typ.

Max.

Units

I

S

Continuous Source Current 

(Body Diode)

I

SM

Pulsed Source Current

(Body Diode)d

V

SD

Diode Forward Voltage

–––

0.9

1.3

V

dv/dt

Peak Diode Recoveryf

–––

5.0

–––

V/ns

t

rr

Reverse Recovery Time

–––

38

–––

T

J

 = 25°C

V

R

 = 34V,

–––

37

–––

T

J

 = 125°C

I

F

 = 100A

Q

rr

Reverse Recovery Charge

–––

50

–––

T

J

 = 25°C

di/dt = 100A/μs g

–––

50

–––

T

J

 = 125°C

I

RRM

Reverse Recovery Current

–––

1.9

–––

A

T

J

 = 25°C

T

J

 = 175°C, I

S

 = 100A, V

DS

 = 40V 

Conditions

V

DS

 = 10V, I

D

 = 100A

I

D

 = 100A

V

DS

 =20V

V

GS

 = 10V 

g

V

DD

 = 20V

I

D

 = 100A, V

DS

 =0V, V

GS

 = 10V

T

J

 = 25°C, I

S

 = 100A, V

GS

 = 0V g

integral reverse

p-n junction diode.

MOSFET symbol

showing  the

I

D

 = 30A

R

G

 = 2.7

Ω

Conditions

V

GS

 = 10V 

g

V

GS

 = 0V

nC

ns

pF

V

DS

 = 25V

ƒ = 1.0 MHz,  See Fig. 5
V

GS

 = 0V, V

DS

 = 0V to 32V 

i, See Fig. 12

V

GS

 = 0V, V

DS

 = 0V to 32V 

h

A

ns

nC

320c

–––

–––

–––

–––

1270*

/var/www/html/datasheet/sites/default/files/pdfhtml_dummy/irfs7434pbf-html.html
background image

IRFS/SL7434PbF

www.irf.com 

  © 2014 International Rectifier          

Submit Datasheet Feedback

                November 19, 2014

4

Fig 3.  Typical Output Characteristics

Fig 5.  Typical Transfer Characteristics

Fig 6.  Normalized On-Resistance vs. Temperature

Fig 4.  Typical Output Characteristics

Fig 8.  Typical Gate Charge vs. Gate-to-Source Voltage

Fig 7.  Typical Capacitance vs. Drain-to-Source Voltage

0.1

1

10

100

VDS, Drain-to-Source Voltage (V)

0.1

1

10

100

1000

I D

, D

ra

in

-t

o-

S

ou

rc

C

ur

re

nt

 (

A

)

VGS

TOP          

15V

10V

8.0V

7.0V

6.0V

5.5V

5.0V

BOTTOM

4.5V

≤60μs 

PULSE WIDTH

Tj = 25°C

4.5V

0.1

1

10

100

VDS, Drain-to-Source Voltage (V)

1

10

100

1000

I D

, D

ra

in

-t

o-

S

ou

rc

C

ur

re

nt

 (

A

)

4.5V

≤60μs 

PULSE WIDTH 

Tj = 175°C 

VGS

TOP          

15V

10V
8.0V

7.0V

6.0V

5.5V

5.0V

BOTTOM

4.5V

2

4

6

8

10

VGS, Gate-to-Source Voltage (V)

0.1

1

10

100

1000

I D

, D

ra

in

-t

o-

S

ou

rc

C

ur

re

nt

 (

A

)

TJ = 25°C

TJ = 175°C

VDS = 10V
≤60μs PULSE WIDTH

-60

-20

20

60

100

140

180

TJ , Junction Temperature (°C)

0.6

0.8

1.0

1.2

1.4

1.6

1.8

2.0

R

D

S

(o

n)

 ,

 D

ra

in

-t

o-

S

ou

rc

O

R

es

is

ta

nc

   

   

   

   

   

   

   

 (

N

or

m

al

iz

ed

)

ID = 100A

VGS = 10V

0

50

100

150

200

250

300

 QG,  Total Gate Charge (nC)

0.0

2.0

4.0

6.0

8.0

10.0

12.0

14.0

V

G

S

, G

at

e-

to

-S

ou

rc

V

ol

ta

ge

 (

V

)

VDS= 32V

VDS= 20V

ID= 100A

0.1

1

10

100

VDS, Drain-to-Source Voltage (V)

100

1000

10000

100000

1000000

C

, C

ap

ac

ita

nc

(p

F

)

VGS   = 0V,       f = 1 MHZ

Ciss   = Cgs + Cgd,  C ds SHORTED
Crss   = Cgd 

Coss  = Cds + Cgd

Coss

Crss

Ciss

/var/www/html/datasheet/sites/default/files/pdfhtml_dummy/irfs7434pbf-html.html
background image

IRFS/SL7434PbF

5

www.irf.com 

  © 2014 International Rectifier          

Submit Datasheet Feedback

                 November 19, 2014

Fig 10.  Maximum Safe Operating Area

Fig 11.  Drain-to-Source Breakdown Voltage

Fig 9.  Typical Source-Drain Diode

Forward Voltage

Fig 12.  Typical C

OSS

 Stored Energy

Fig 13.   Typical On-Resistance vs. Drain Current

0.0

0.5

1.0

1.5

2.0

2.5

VSD, Source-to-Drain Voltage (V)

0.1

1

10

100

1000

I S

D

, R

ev

er

se

 D

ra

in

 C

ur

re

nt

 (

A

)

TJ = 25°C

TJ = 175°C

VGS = 0V

0.1

1

10

100

VDS, Drain-to-Source Voltage (V)

0.1

1

10

100

1000

10000

I D

,  

D

ra

in

-t

o-

S

ou

rc

C

ur

re

nt

 (

A

)

Tc = 25°C

Tj = 175°C

Single Pulse

10msec

1msec

OPERATION IN THIS AREA 
LIMITED BY R DS(on)

100μsec

DC

Limited By Package

0

100

200

300

400

500

ID, Drain Current (A)

0.0

5.0

10.0

15.0

20.0

R

D

S

(o

n)

,  

D

ra

in

-t

-S

ou

rc

O

R

es

is

ta

nc

(m

Ω

)

VGS = 7.0V

VGS = 8.0V

VGS = 10V

VGS = 6.0V

VGS = 5.5V

-60

-20

20

60

100

140

180

TJ , Temperature ( °C )

40

41

42

43

44

45

46

47

48

49

50

V

(B

R

)D

S

S

,  D

ra

in

-t

o-

S

ou

rc

B

re

ak

do

w

V

ol

ta

ge

 (

V

)

Id = 5.0mA

0

5

10

15

20

25

30

35

40

45

VDS, Drain-to-Source Voltage (V)

0.0

0.2

0.4

0.6

0.8

1.0

1.2

1.4

1.6

E

ne

rg

J)

VDS= 0V to 32V

/var/www/html/datasheet/sites/default/files/pdfhtml_dummy/irfs7434pbf-html.html
background image

IRFS/SL7434PbF

www.irf.com 

  © 2014 International Rectifier          

Submit Datasheet Feedback

                November 19, 2014

6

Fig 13.  Maximum Effective Transient Thermal Impedance, Junction-to-Case

Fig 14.  Avalanche Current vs.Pulse width

Fig 15.  Maximum Avalanche Energy vs. Temperature

Notes on Repetitive Avalanche Curves , Figures 14, 15:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:

Purely a thermal phenomenon and failure occurs at a temperature far in
excess of T

jmax

. This is validated for every part type.

2. Safe operation in Avalanche is allowed as long asT

jmax

 is not exceeded.

3. Equation below based on circuit and waveforms shown in Figures 22a, 22b.
4. P

D (ave) 

= Average power dissipation per single avalanche pulse.

5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase

during avalanche).

6. I

av 

= Allowable avalanche current.

7. 

ΔT

 = 

Allowable rise in junction temperature, not to exceed

 

T

jmax 

(assumed as

25°C in Figure 14, 15).
t

av = 

Average time in avalanche.

D = Duty cycle in avalanche =  t

av 

·f

Z

thJC

(D, t

av

) = Transient thermal resistance, see Figures 13)

P

D (ave)

 = 1/2 ( 1.3·BV·I

av

) =

 DT/ Z

thJC

I

av 

=

 

2

DT/ [1.3·BV·Z

th

]

E

AS (AR)

 = P

D (ave)

·t

av

1E-006

1E-005

0.0001

0.001

0.01

0.1

t1 , Rectangular Pulse Duration (sec)

0.0001

0.001

0.01

0.1

1

T

he

rm

al

 R

es

po

ns

Z

 th

JC

 )

 °

C

/W

0.20

0.10

D = 0.50

0.02

0.01

0.05

SINGLE PULSE

( THERMAL RESPONSE )

Notes:

1. Duty Factor D = t1/t2

2. Peak Tj = P dm x Zthjc + Tc

1.0E-06

1.0E-05

1.0E-04

1.0E-03

1.0E-02

1.0E-01

tav (sec)

1

10

100

1000

A

va

la

nc

he

 C

ur

re

nt

 (

A

)

Allowed avalanche Current vs avalanche 
pulsewidth, tav, assuming 

ΔΤj = 25°C and 

Tstart = 150°C.

Allowed avalanche Current vs avalanche 
pulsewidth, tav, assuming 

ΔTj = 150°C and 

Tstart =25°C (Single Pulse)

25

50

75

100

125

150

175

Starting TJ , Junction Temperature (°C)

0

100

200

300

400

500

600

E

A

R

 , 

A

va

la

nc

he

 E

ne

rg

(m

J)

TOP          Single Pulse                
BOTTOM   1.0% Duty Cycle
ID = 100A

/var/www/html/datasheet/sites/default/files/pdfhtml_dummy/irfs7434pbf-html.html
background image

IRFS/SL7434PbF

7

www.irf.com 

  © 2014 International Rectifier          

Submit Datasheet Feedback

                 November 19, 2014

Fig. 17 - Typical Recovery Current vs. di

f

/dt

Fig 16.  Threshold Voltage vs. Temperature

Fig. 19 - Typical Stored Charge vs. di

f

/dt

Fig. 18 - Typical Recovery Current vs. di

f

/dt

Fig. 20 - Typical Stored Charge vs. di

f

/dt

-75

-25

25

75

125

175

225

TJ , Temperature ( °C )

0.5

1.5

2.5

3.5

4.5

V

G

S

(t

h)

,  G

at

th

re

sh

ol

V

ol

ta

ge

 (

V

)

ID = 250μA

ID = 1.0mA

ID = 1.0A

0

200

400

600

800

1000

diF /dt (A/μs)

0

2

4

6

8

10

I R

R

M

 (

A

)

IF = 60A
VR = 34V
TJ = 25°C
TJ = 125°C

0

200

400

600

800

1000

diF /dt (A/μs)

0

2

4

6

8

10

I R

R

M

 (

A

)

IF = 100A
VR = 34V
TJ = 25°C
TJ = 125°C

0

200

400

600

800

1000

diF /dt (A/μs)

40

60

80

100

120

140

160

180

200

220

240

Q

R

R

 (

nC

)

IF = 60A
VR = 34V
TJ = 25°C
TJ = 125°C

0

200

400

600

800

1000

diF /dt (A/μs)

0

40

80

120

160

200

Q

R

R

 (

nC

)

IF = 100A
VR = 34V
TJ = 25°C
TJ = 125°C

/var/www/html/datasheet/sites/default/files/pdfhtml_dummy/irfs7434pbf-html.html
background image

IRFS/SL7434PbF

www.irf.com 

  © 2014 International Rectifier          

Submit Datasheet Feedback

                November 19, 2014

8

Fig 23a.  Switching Time Test Circuit

Fig 23b.  Switching Time Waveforms

Fig 22b.  Unclamped Inductive Waveforms

Fig 22a.  Unclamped Inductive Test Circuit

tp

V

(BR)DSS

I

AS

RG

IAS

0.01

Ω

tp

D.U.T

L

VDS

+

- VDD

DRIVER

A

15V

20V

V

GS

Fig 24a.  Gate Charge Test Circuit

Fig 24b.   Gate Charge Waveform

Vds

Vgs

Id

Vgs(th)

Qgs1 Qgs2

Qgd

Qgodr

Fig 21. 

Peak Diode Recovery dv/dt Test Circuit for N-Channel

HEXFET

®

 Power MOSFETs

Circuit Layout Considerations

   •  Low Stray Inductance

   •  Ground Plane

   •  Low Leakage Inductance

      Current Transformer

P.W.

Period

di/dt

Diode Recovery

dv/dt

Ripple 

≤ 5%

Body Diode  Forward Drop

Re-Applied

Voltage

Reverse

Recovery

Current

Body Diode Forward

Current

V

GS

=10V

V

DD

I

SD

Driver Gate Drive

D.U.T. I

SD

Waveform

D.U.T. V

DS

Waveform

Inductor Curent

D = 

P.W.

Period

*

 V

GS

 = 5V for Logic Level Devices

*

+

-

+

+

+

-

-

-

ƒ

„

‚

R

G

V

DD

•  dv/dt controlled by R

G

•  Driver same type as D.U.T.

•  I

SD

 controlled by Duty Factor "D"

•  D.U.T. - Device Under Test

D.U.T



Inductor Current

D.U.T.

V

DS

I

D

I

G

3mA

V

GS

.3

μF

50K

Ω

.2

μF

12V

Current Regulator

Same Type as D.U.T.

Current Sampling Resistors

+

-

V

DS

90%

10%
V

GS

t

d(on)

t

r

t

d(off)

t

f

V

DS

Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %

R

D

V

GS

R

G

D.U.T.

10V

+

-

V

DD

V

GS

/var/www/html/datasheet/sites/default/files/pdfhtml_dummy/irfs7434pbf-html.html
background image

IRFS/SL7434PbF

9

www.irf.com 

  © 2014 International Rectifier          

Submit Datasheet Feedback

                 November 19, 2014

D

2

Pak (TO-263AB) Part Marking Information

D

2

Pak (TO-263AB) Package Outline

Dimensions are shown in millimeters (inches)

DAT E CODE

YE AR 0 =  2000
WEEK 02
A  =   AS S E MB LY  S IT E  CODE

RECT IF IE R

INT ERNAT IONAL

PART  NUMBER

P  =   DES IGNAT E S   L EAD  -  F RE E

PRODUCT  (OPT IONAL)

F 530S

IN  T HE AS S EMB LY LINE  "L"

AS S E MB LED ON WW 02, 2000

T HIS  IS  AN IRF 530S  WIT H

L OT  CODE 8024

INT ERNAT IONAL

L OGO

RECT IF IER

L OT   CODE

AS S EMBL Y

YEAR 0 =  2000

PART  NUMBER

DAT E CODE

LINE L

WEEK  02

OR

F 530S

L OGO

AS S EMBLY
LOT  CODE

Note: For the most current drawing please refer to IR website at 

http://www.irf.com/package/

/var/www/html/datasheet/sites/default/files/pdfhtml_dummy/irfs7434pbf-html.html
background image

IRFS/SL7434PbF

www.irf.com 

  © 2014 International Rectifier          

Submit Datasheet Feedback

                November 19, 2014

10

TO-262 Part Marking Information

TO-262 Package Outline

Dimensions are shown in millimeters (inches)

L OGO

R E CT IF IE R

INT E R NAT IONAL

L OT   CODE

AS S E MB L Y

L OGO

R E CT IF IE R

INT E R NAT IONAL

DAT E  CODE

WE E K  19

YE AR  7 =  1997

P AR T   NU MB E R

A =  AS S E MB L Y S IT E  CODE

OR

PR ODU CT  (OPT IONAL )

P  =  DE S IGNAT E S  L E AD-F R E E

E XAMP L E : T H IS  IS  AN IR L 3103L

L OT  CODE  1789

AS S E MB L Y

P AR T   NU MB E R

DAT E  CODE

WE E K  19
L INE   C

L OT   CODE

YE AR  7 =  1997

AS S E MB L E D ON WW 19, 1997
IN T H E  AS S E MB L Y L INE  "C"

Note: For the most current drawing please refer to IR website at 

http://www.irf.com/package/

Maker
Infineon Technologies