HEXFET
®
Power MOSFET
Notes
through
are on page 9
Features and Benefits
Applications
•
OR-ing MOSFET for 12V (typical) Bus in-Rush Current
•
Battery Operated DC Motor Inverter MOSFET
Features
Benefits
PQFN 5X6 mm
Low RDSon (<1.15 m
Ω)
Lower Conduction Losses
Low Thermal Resistance to PCB (<0.8°C/W)
Enable better thermal dissipation
100% Rg tested
Increased Reliability
Low Profile (<0.9 mm)
results in
Increased Power Density
Industry-Standard Pinout
⇒
Multi-Vendor Compatibility
Compatible with Existing Surface Mount Techniques
Easier Manufacturing
RoHS Compliant Containing no Lead, no Bromide and no Halogen
Environmentally Friendlier
MSL1, Industrial Qualification
Increased Reliability
V
DS
25
V
R
DS(on) max
(@V
GS
= 10V)
1.15
mΩ
Q
g (typical)
52
nC
R
G (typical)
1.3
Ω
I
D
(@T
mb
= 25°C)
100
h
A
Absolute Maximum Ratings
Parameter
Units
V
DS
Drain-to-Source Voltage
V
GS
Gate-to-Source Voltage
I
D
@ T
A
= 25°C
Continuous Drain Current, V
GS
@ 10V
I
D
@ T
A
= 70°C
Continuous Drain Current, V
GS
@ 10V
I
D
@ T
mb
= 25°C
Continuous Drain Current, V
GS
@ 10V
I
D
@ T
mb
= 100°C
Continuous Drain Current, V
GS
@ 10V
I
DM
Pulsed Drain Current c
P
D
@T
A
= 25°C
Power Dissipation g
P
D
@T
mb
= 25°C
Power Dissipation g
Linear Derating Factor g
W/°C
T
J
Operating Junction and
T
STG
Storage Temperature Range
100 h
V
W
A
°C
-55 to + 150
3.6
0.029
160
Max.
45
100h
400
± 20
25
31
IRFH5250PbF
1
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Form
Quantity
IRFH5250TRPbF
PQFN 5mm x 6mm
Tape and Reel
4000
IRFH5250TR2PBF
PQFN 5mm x 6mm
Tape and Reel
400
EOL notice # 259
Orderable part number
Package Type
Standard Pack
Note
2
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May 19, 2015
IRFH5250PbF
S
D
G
Static @ T
J
= 25°C (unless otherwise specified)
Parameter
Min.
Typ.
Max.
Units
BV
DSS
Drain-to-Source Breakdown Voltage
25
–––
–––
V
ΔΒV
DSS
/
ΔT
J
Breakdown Voltage Temp. Coefficient
–––
0.02
–––
V/°C
R
DS(on)
Static Drain-to-Source On-Resistance
–––
0.9
1.15
–––
1.4
1.75
V
GS(th)
Gate Threshold Voltage
1.35
1.80
2.35
V
V
DS
= V
GS
, I
D
= 150μA
ΔV
GS(th)
Gate Threshold Voltage Coefficient
–––
-6.3
–––
mV/°C
I
DSS
Drain-to-Source Leakage Current
–––
–––
5.0
–––
–––
150
I
GSS
Gate-to-Source Forward Leakage
–––
–––
100
Gate-to-Source Reverse Leakage
–––
–––
-100
gfs
Forward Transconductance
181
–––
–––
S
Q
g
Total Gate Charge
–––
110
–––
nC
Q
g
Total Gate Charge
–––
52
78
Q
gs1
Pre-Vth Gate-to-Source Charge
–––
13
–––
Q
gs2
Post-Vth Gate-to-Source Charge
–––
7.8
–––
Q
gd
Gate-to-Drain Charge
–––
17
–––
Q
godr
Gate Charge Overdrive
–––
15
–––
Q
sw
Switch Charge (Q
gs2
+ Q
gd
)
–––
25
–––
Q
oss
Output Charge
–––
36
–––
nC
R
G
Gate Resistance
–––
1.3
–––
Ω
t
d(on)
Turn-On Delay Time
–––
28
–––
t
r
Rise Time
–––
46
–––
t
d(off)
Turn-Off Delay Time
–––
30
–––
t
f
Fall Time
–––
19
–––
C
iss
Input Capacitance
–––
7174
–––
C
oss
Output Capacitance
–––
1758
–––
C
rss
Reverse Transfer Capacitance
–––
828
–––
Avalanche Characteristics
Parameter
Units
E
AS
Single Pulse Avalanche Energy
d
mJ
I
AR
Avalanche Current
c
A
Diode Characteristics
Parameter
Min.
Typ.
Max.
Units
I
S
Continuous Source Current
(Body Diode)
I
SM
Pulsed Source Current
(Body Diode)c
V
SD
Diode Forward Voltage
–––
–––
1.0
V
t
rr
Reverse Recovery Time
–––
37
56
ns
Q
rr
Reverse Recovery Charge
–––
68
102
nC
t
on
Forward Turn-On Time
V
GS
= 20V
V
GS
= -20V
Time is dominated by parasitic Inductance
ns
A
pF
nC
V
DS
= 13V
–––
V
DS
= 16V, V
GS
= 0V
V
GS
= 4.5V, I
D
= 50A
e
–––
–––
400
–––
–––
100 h
MOSFET symbol
nA
V
GS
= 10V, V
DS
= 13V, I
D
= 50A
I
D
= 50A
V
GS
= 0V
V
DS
= 13V
V
GS
= 4.5V
Conditions
V
GS
= 0V, I
D
= 250μA
Reference to 25°C, I
D
= 1mA
V
GS
= 10V, I
D
= 50A
e
V
DS
= 20V, V
GS
= 0V
Conditions
Max.
468
50
ƒ = 1.0MHz
T
J
= 25°C, I
F
= 50A, V
DD
= 13V
di/dt = 200A/μs e
T
J
= 25°C, I
S
= 50A, V
GS
= 0V e
showing the
integral reverse
p-n junction diode.
Typ.
–––
R
G
=1.8
Ω
V
DS
= 13V, I
D
= 50A
V
DS
= 20V, V
GS
= 0V, T
J
= 125°C
m
Ω
μA
I
D
= 50A
V
DD
= 13V, V
GS
= 4.5V
Thermal Resistance
Parameter
Typ.
Max.
Units
R
θJ-mb
Junction-to-Mounting Base
0.5
0.8
R
θJC
(Top)
Junction-to-Case f
–––
15
°C/W
R
θJA
Junction-to-Ambient g
–––
35
R
θJA
(<10s)
Junction-to-Ambient g
–––
21
3
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IRFH5250PbF
Fig 4. Normalized On-Resistance Vs. Temperature
Fig 2. Typical Output Characteristics
Fig 1. Typical Output Characteristics
Fig 3. Typical Transfer Characteristics
Fig 6. Typical Gate Charge Vs.Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.Drain-to-Source Voltage
0.1
1
10
100
VDS, Drain-to-Source Voltage (V)
10
100
1000
I D
, D
ra
in
-t
o-
S
ou
rc
e
C
ur
re
nt
(
A
)
2.7V
≤60μs
PULSE WIDTH
Tj = 150°C
VGS
TOP
10V
5.0V
4.5V
3.5V
3.3V
3.0V
2.9V
BOTTOM
2.7V
1
1.5
2
2.5
3
3.5
4
4.5
5
VGS, Gate-to-Source Voltage (V)
0.1
1
10
100
1000
I D
, D
ra
in
-t
o-
S
ou
rc
e
C
ur
re
nt
(
A
)
TJ = 25°C
TJ = 150°C
VDS = 15V
≤60μs PULSE WIDTH
-60 -40 -20 0 20 40 60 80 100 120 140 160
TJ , Junction Temperature (°C)
0.6
0.8
1.0
1.2
1.4
1.6
R
D
S
(o
n)
,
D
ra
in
-t
o-
S
ou
rc
e
O
n
R
es
is
ta
nc
e
(
N
or
m
al
iz
ed
)
ID = 50A
VGS = 10V
1
10
100
VDS, Drain-to-Source Voltage (V)
100
1000
10000
100000
C
, C
ap
ac
ita
nc
e
(p
F
)
VGS = 0V, f = 1 MHZ
Ciss = Cgs + Cgd, C ds SHORTED
Crss = Cgd
Coss = Cds + Cgd
Coss
Crss
Ciss
0
20
40
60
80
100
120
140
QG, Total Gate Charge (nC)
0.0
2.0
4.0
6.0
8.0
10.0
12.0
14.0
V
G
S
, G
at
e-
to
-S
ou
rc
e
V
ol
ta
ge
(
V
)
VDS= 20V
VDS= 13V
ID= 50A
0.1
1
10
100
VDS, Drain-to-Source Voltage (V)
1
10
100
1000
I D
, D
ra
in
-t
o-
S
ou
rc
e
C
ur
re
nt
(
A
)
VGS
TOP
10V
5.0V
4.5V
3.5V
3.3V
3.0V
2.9V
BOTTOM
2.7V
≤60μs
PULSE WIDTH
Tj = 25°C
2.7V
4
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IRFH5250PbF
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case (Bottom)
Fig 8. Maximum Safe Operating Area
Fig 9. Maximum Drain Current Vs.
Case (Bottom) Temperature
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 10. Threshold Voltage Vs. Temperature
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
VSD, Source-to-Drain Voltage (V)
0.1
1
10
100
1000
I S
D
, R
ev
er
se
D
ra
in
C
ur
re
nt
(
A
)
TJ = 25°C
TJ = 150°C
VGS = 0V
-75 -50 -25
0
25
50
75 100 125 150
TJ , Temperature ( °C )
0.5
1.0
1.5
2.0
2.5
3.0
V
G
S
(t
h)
, G
at
e
th
re
sh
ol
d
V
ol
ta
ge
(
V
)
ID = 1.0A
ID = 1.0mA
ID = 500μA
ID = 150μA
25
50
75
100
125
150
TC , Case Temperature (°C)
0
50
100
150
200
250
300
350
I D
,
D
ra
in
C
ur
re
nt
(
A
)
Limited By Package
1E-006
1E-005
0.0001
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
0.0001
0.001
0.01
0.1
1
T
he
rm
al
R
es
po
ns
e
(
Z
th
JC
)
°
C
/W
0.20
0.10
D = 0.50
0.02
0.01
0.05
SINGLE PULSE
( THERMAL RESPONSE )
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.1
1
10
100
VDS, Drain-to-Source Voltage (V)
0.1
1
10
100
1000
10000
I D
,
D
ra
in
-t
o-
S
ou
rc
e
C
ur
re
nt
(
A
)
Tc = 25°C
Tj = 150°C
Single Pulse
10msec
1msec
OPERATION IN THIS AREA
LIMITED BY RDS(on)
100μsec
DC
Limited by Package
5
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IRFH5250PbF
Fig 13. Maximum Avalanche Energy vs. Drain Current
Fig 12. On-Resistance vs. Gate Voltage
2
4
6
8
10
12
14
16
18
20
VGS, Gate -to -Source Voltage (V)
0
1
2
3
4
R
D
S
(o
n)
,
D
ra
in
-t
o
-S
ou
rc
e
O
n
R
es
is
ta
nc
e
(m
Ω
)
ID = 50A
TJ = 25°C
TJ = 125°C
25
50
75
100
125
150
Starting TJ , Junction Temperature (°C)
0
200
400
600
800
1000
1200
1400
1600
1800
2000
E
A
S
,
S
in
gl
e
P
ul
se
A
va
la
nc
he
E
ne
rg
y
(m
J)
ID
TOP 18A
24A
BOTTOM 50A
Fig 14. Typical Avalanch Current vs. Pulsewidth
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
1
10
100
1000
A
va
la
nc
he
C
ur
re
nt
(
A
)
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming
ΔΤ j = 25°C and
Tstart = 125°C.
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming
ΔTj = 125°C and
Tstart =25°C (Single Pulse)
6
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IRFH5250PbF
Fig 15.
Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET
®
Power MOSFETs
Fig 18a. Gate Charge Test Circuit
Fig 18b. Gate Charge Waveform
Vds
Vgs
Id
Vgs(th)
Qgs1 Qgs2
Qgd
Qgodr
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
P.W.
Period
di/dt
Diode Recovery
dv/dt
Ripple
≤ 5%
Body Diode Forward Drop
Re-Applied
Voltage
Reverse
Recovery
Current
Body Diode Forward
Current
V
GS
=10V
V
DD
I
SD
Driver Gate Drive
D.U.T. I
SD
Waveform
D.U.T. V
DS
Waveform
Inductor Curent
D =
P.W.
Period
*
V
GS
= 5V for Logic Level Devices
*
+
-
+
+
+
-
-
-
R
G
V
DD
• dv/dt controlled by R
G
• Driver same type as D.U.T.
• I
SD
controlled by Duty Factor "D"
• D.U.T. - Device Under Test
D.U.T
1K
VCC
DUT
0
L
S
Fig 16b. Unclamped Inductive Waveforms
Fig 16a. Unclamped Inductive Test
Circuit
tp
V
(BR)DSS
I
AS
RG
IAS
0.01
Ω
tp
D.U.T
L
VDS
+
- VDD
DRIVER
A
15V
20V
Fig 17a. Switching Time Test Circuit
Fig 17b. Switching Time Waveforms
V
GS
V
DS
90%
10%
t
d(on)
t
d(off)
t
r
t
f
V
DS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1
R
D
V
GS
R
G
D.U.T.
10V
+
-
V
DD
V
GS
7
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May 19, 2015
IRFH5250PbF
For more information on board mounting, including footprint and stencil recommendation, please refer to application note AN-1136:
http://www.irf.com/technical-info/appnotes/an-1136.pdf
For more information on package inspection techniques, please refer to application note AN-1154:
http://www.irf.com/technical-info/appnotes/an-1154.pdf
Note: For the most current drawing please refer to IR website at:
http://www.irf.com/package/
PQFN 5x6 Outline "B" Package Details
PQFN 5x6 Outline "G" Package Details
8
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May 19, 2015
IRFH5250PbF
PQFN 5x6 Tape and Reel
Bo
W
P 1
Ao
Ko
CODE
TAPE DIMENSIONS
REEL DIMENSIONS
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
Dimens ion design to accommodate the component width
Dimens ion design to accommodate the component lenght
Dimension design to accommodate the component thicknes s
Pitch between succes sive cavity centers
Overall width of the carrier tape
DES CRIPTION
T ype
Package
5 X 6 PQFN
Note: All dimens ion are nominal
Diameter
Reel
QTY
Width
Reel
(mm)
Ao
(mm)
Bo
(mm)
Ko
(mm)
P1
(mm)
W
Quadrant
Pin 1
(Inch)
W1
(mm)
13
4000
12.4
6.300
5.300
1.20
8.00
12
Q1
Note: For the most current drawing please refer to IR website at:
http://www.irf.com/package/
PQFN 5x6 Part Marking
XXXX
XYWWX
XXXXX
INTERNATIONAL
RECTIFIER LOGO
PART NUMBER
(“4 or 5 digits”)
MARKING CODE
(Per Marking Spec)
ASSEMBLY
SITE CODE
(Per SCOP 200-002)
DATE CODE
PIN 1
IDENTIFIER
LOT CODE
(Eng Mode - Min last 4 digits of EATI#)
(Prod Mode - 4 digits of SPN code)
9
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May 19, 2015
IRFH5250PbF
Qualification standards can be found at International Rectifier’s web site
http://www.irf.com/product-info/reliability
Higher qualification ratings may be available should the user have such requirements.
Please contact your International Rectifier sales representative for further information:
http://www.irf.com/whoto-call/salesrep/
Applicable version of JEDEC standard at the time of product release.
Notes:
Repetitive rating; pulse width limited by max. junction temperature.
Starting T
J
= 25°C, L = 0.37mH, R
G
= 25
Ω, I
AS
= 50A.
Pulse width ≤ 400μs; duty cycle ≤ 2%.
R
θ
is measured at
T
J
of approximately 90°C.
When mounted on 1 inch square 2 oz copper pad on 1.5x1.5 in. board of FR-4 material.
Calculated continuous current based on maximum allowable junction temperature. Package is limited to 100A by production
test capability
MS L1
(per JE DEC J-S T D-020D
†††
)
RoHS compliant
Yes
PQFN 5mm x 6mm
Qualification information
†
Moisture Sensitivity Level
Qualification level
Industrial
††
(per JE DEC JES D47F
†††
guidelines )
IR WORLD HEADQUARTERS: 101 N. Sepulveda Blvd., El Segundo, California 90245, USA
To contact International Rectifier, please visit
http://www.irf.com/whoto-call/
Date
Comments
• Updated ordering information to reflect the End-Of-life (EOL) of the mini-reel option (EOL notice #259)
• Updated data sheet with new IR corporate template
• Updated package outline for “option B” and added package outline for “option G” on page 7
• Updated tape and reel on page 8.
• Updated package outline for “option G” on page 7.
• Updated "IFX logo" on page 1 and page 9.
Revision History
12/16/2013
4/28/2015
5/19/2015
HEXFET
®
Power MOSFET
Notes
through
are on page 9
Features and Benefits
Applications
•
OR-ing MOSFET for 12V (typical) Bus in-Rush Current
•
Battery Operated DC Motor Inverter MOSFET
Features
Benefits
PQFN 5X6 mm
Low RDSon (<1.15 m
Ω)
Lower Conduction Losses
Low Thermal Resistance to PCB (<0.8°C/W)
Enable better thermal dissipation
100% Rg tested
Increased Reliability
Low Profile (<0.9 mm)
results in
Increased Power Density
Industry-Standard Pinout
⇒
Multi-Vendor Compatibility
Compatible with Existing Surface Mount Techniques
Easier Manufacturing
RoHS Compliant Containing no Lead, no Bromide and no Halogen
Environmentally Friendlier
MSL1, Industrial Qualification
Increased Reliability
V
DS
25
V
R
DS(on) max
(@V
GS
= 10V)
1.15
mΩ
Q
g (typical)
52
nC
R
G (typical)
1.3
Ω
I
D
(@T
mb
= 25°C)
100
h
A
Absolute Maximum Ratings
Parameter
Units
V
DS
Drain-to-Source Voltage
V
GS
Gate-to-Source Voltage
I
D
@ T
A
= 25°C
Continuous Drain Current, V
GS
@ 10V
I
D
@ T
A
= 70°C
Continuous Drain Current, V
GS
@ 10V
I
D
@ T
mb
= 25°C
Continuous Drain Current, V
GS
@ 10V
I
D
@ T
mb
= 100°C
Continuous Drain Current, V
GS
@ 10V
I
DM
Pulsed Drain Current c
P
D
@T
A
= 25°C
Power Dissipation g
P
D
@T
mb
= 25°C
Power Dissipation g
Linear Derating Factor g
W/°C
T
J
Operating Junction and
T
STG
Storage Temperature Range
100 h
V
W
A
°C
-55 to + 150
3.6
0.029
160
Max.
45
100h
400
± 20
25
31
IRFH5250PbF
1
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2015 International Rectifier
Submit Datasheet Feedback
May 19, 2015
Form
Quantity
IRFH5250TRPbF
PQFN 5mm x 6mm
Tape and Reel
4000
IRFH5250TR2PBF
PQFN 5mm x 6mm
Tape and Reel
400
EOL notice # 259
Orderable part number
Package Type
Standard Pack
Note
2
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2015 International Rectifier
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May 19, 2015
IRFH5250PbF
S
D
G
Static @ T
J
= 25°C (unless otherwise specified)
Parameter
Min.
Typ.
Max.
Units
BV
DSS
Drain-to-Source Breakdown Voltage
25
–––
–––
V
ΔΒV
DSS
/
ΔT
J
Breakdown Voltage Temp. Coefficient
–––
0.02
–––
V/°C
R
DS(on)
Static Drain-to-Source On-Resistance
–––
0.9
1.15
–––
1.4
1.75
V
GS(th)
Gate Threshold Voltage
1.35
1.80
2.35
V
V
DS
= V
GS
, I
D
= 150μA
ΔV
GS(th)
Gate Threshold Voltage Coefficient
–––
-6.3
–––
mV/°C
I
DSS
Drain-to-Source Leakage Current
–––
–––
5.0
–––
–––
150
I
GSS
Gate-to-Source Forward Leakage
–––
–––
100
Gate-to-Source Reverse Leakage
–––
–––
-100
gfs
Forward Transconductance
181
–––
–––
S
Q
g
Total Gate Charge
–––
110
–––
nC
Q
g
Total Gate Charge
–––
52
78
Q
gs1
Pre-Vth Gate-to-Source Charge
–––
13
–––
Q
gs2
Post-Vth Gate-to-Source Charge
–––
7.8
–––
Q
gd
Gate-to-Drain Charge
–––
17
–––
Q
godr
Gate Charge Overdrive
–––
15
–––
Q
sw
Switch Charge (Q
gs2
+ Q
gd
)
–––
25
–––
Q
oss
Output Charge
–––
36
–––
nC
R
G
Gate Resistance
–––
1.3
–––
Ω
t
d(on)
Turn-On Delay Time
–––
28
–––
t
r
Rise Time
–––
46
–––
t
d(off)
Turn-Off Delay Time
–––
30
–––
t
f
Fall Time
–––
19
–––
C
iss
Input Capacitance
–––
7174
–––
C
oss
Output Capacitance
–––
1758
–––
C
rss
Reverse Transfer Capacitance
–––
828
–––
Avalanche Characteristics
Parameter
Units
E
AS
Single Pulse Avalanche Energy
d
mJ
I
AR
Avalanche Current
c
A
Diode Characteristics
Parameter
Min.
Typ.
Max.
Units
I
S
Continuous Source Current
(Body Diode)
I
SM
Pulsed Source Current
(Body Diode)c
V
SD
Diode Forward Voltage
–––
–––
1.0
V
t
rr
Reverse Recovery Time
–––
37
56
ns
Q
rr
Reverse Recovery Charge
–––
68
102
nC
t
on
Forward Turn-On Time
V
GS
= 20V
V
GS
= -20V
Time is dominated by parasitic Inductance
ns
A
pF
nC
V
DS
= 13V
–––
V
DS
= 16V, V
GS
= 0V
V
GS
= 4.5V, I
D
= 50A
e
–––
–––
400
–––
–––
100 h
MOSFET symbol
nA
V
GS
= 10V, V
DS
= 13V, I
D
= 50A
I
D
= 50A
V
GS
= 0V
V
DS
= 13V
V
GS
= 4.5V
Conditions
V
GS
= 0V, I
D
= 250μA
Reference to 25°C, I
D
= 1mA
V
GS
= 10V, I
D
= 50A
e
V
DS
= 20V, V
GS
= 0V
Conditions
Max.
468
50
ƒ = 1.0MHz
T
J
= 25°C, I
F
= 50A, V
DD
= 13V
di/dt = 200A/μs e
T
J
= 25°C, I
S
= 50A, V
GS
= 0V e
showing the
integral reverse
p-n junction diode.
Typ.
–––
R
G
=1.8
Ω
V
DS
= 13V, I
D
= 50A
V
DS
= 20V, V
GS
= 0V, T
J
= 125°C
m
Ω
μA
I
D
= 50A
V
DD
= 13V, V
GS
= 4.5V
Thermal Resistance
Parameter
Typ.
Max.
Units
R
θJ-mb
Junction-to-Mounting Base
0.5
0.8
R
θJC
(Top)
Junction-to-Case f
–––
15
°C/W
R
θJA
Junction-to-Ambient g
–––
35
R
θJA
(<10s)
Junction-to-Ambient g
–––
21
3
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Fig 4. Normalized On-Resistance Vs. Temperature
Fig 2. Typical Output Characteristics
Fig 1. Typical Output Characteristics
Fig 3. Typical Transfer Characteristics
Fig 6. Typical Gate Charge Vs.Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.Drain-to-Source Voltage
0.1
1
10
100
VDS, Drain-to-Source Voltage (V)
10
100
1000
I D
, D
ra
in
-t
o-
S
ou
rc
e
C
ur
re
nt
(
A
)
2.7V
≤60μs
PULSE WIDTH
Tj = 150°C
VGS
TOP
10V
5.0V
4.5V
3.5V
3.3V
3.0V
2.9V
BOTTOM
2.7V
1
1.5
2
2.5
3
3.5
4
4.5
5
VGS, Gate-to-Source Voltage (V)
0.1
1
10
100
1000
I D
, D
ra
in
-t
o-
S
ou
rc
e
C
ur
re
nt
(
A
)
TJ = 25°C
TJ = 150°C
VDS = 15V
≤60μs PULSE WIDTH
-60 -40 -20 0 20 40 60 80 100 120 140 160
TJ , Junction Temperature (°C)
0.6
0.8
1.0
1.2
1.4
1.6
R
D
S
(o
n)
,
D
ra
in
-t
o-
S
ou
rc
e
O
n
R
es
is
ta
nc
e
(
N
or
m
al
iz
ed
)
ID = 50A
VGS = 10V
1
10
100
VDS, Drain-to-Source Voltage (V)
100
1000
10000
100000
C
, C
ap
ac
ita
nc
e
(p
F
)
VGS = 0V, f = 1 MHZ
Ciss = Cgs + Cgd, C ds SHORTED
Crss = Cgd
Coss = Cds + Cgd
Coss
Crss
Ciss
0
20
40
60
80
100
120
140
QG, Total Gate Charge (nC)
0.0
2.0
4.0
6.0
8.0
10.0
12.0
14.0
V
G
S
, G
at
e-
to
-S
ou
rc
e
V
ol
ta
ge
(
V
)
VDS= 20V
VDS= 13V
ID= 50A
0.1
1
10
100
VDS, Drain-to-Source Voltage (V)
1
10
100
1000
I D
, D
ra
in
-t
o-
S
ou
rc
e
C
ur
re
nt
(
A
)
VGS
TOP
10V
5.0V
4.5V
3.5V
3.3V
3.0V
2.9V
BOTTOM
2.7V
≤60μs
PULSE WIDTH
Tj = 25°C
2.7V
4
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Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case (Bottom)
Fig 8. Maximum Safe Operating Area
Fig 9. Maximum Drain Current Vs.
Case (Bottom) Temperature
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 10. Threshold Voltage Vs. Temperature
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
VSD, Source-to-Drain Voltage (V)
0.1
1
10
100
1000
I S
D
, R
ev
er
se
D
ra
in
C
ur
re
nt
(
A
)
TJ = 25°C
TJ = 150°C
VGS = 0V
-75 -50 -25
0
25
50
75 100 125 150
TJ , Temperature ( °C )
0.5
1.0
1.5
2.0
2.5
3.0
V
G
S
(t
h)
, G
at
e
th
re
sh
ol
d
V
ol
ta
ge
(
V
)
ID = 1.0A
ID = 1.0mA
ID = 500μA
ID = 150μA
25
50
75
100
125
150
TC , Case Temperature (°C)
0
50
100
150
200
250
300
350
I D
,
D
ra
in
C
ur
re
nt
(
A
)
Limited By Package
1E-006
1E-005
0.0001
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
0.0001
0.001
0.01
0.1
1
T
he
rm
al
R
es
po
ns
e
(
Z
th
JC
)
°
C
/W
0.20
0.10
D = 0.50
0.02
0.01
0.05
SINGLE PULSE
( THERMAL RESPONSE )
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.1
1
10
100
VDS, Drain-to-Source Voltage (V)
0.1
1
10
100
1000
10000
I D
,
D
ra
in
-t
o-
S
ou
rc
e
C
ur
re
nt
(
A
)
Tc = 25°C
Tj = 150°C
Single Pulse
10msec
1msec
OPERATION IN THIS AREA
LIMITED BY RDS(on)
100μsec
DC
Limited by Package
5
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Fig 13. Maximum Avalanche Energy vs. Drain Current
Fig 12. On-Resistance vs. Gate Voltage
2
4
6
8
10
12
14
16
18
20
VGS, Gate -to -Source Voltage (V)
0
1
2
3
4
R
D
S
(o
n)
,
D
ra
in
-t
o
-S
ou
rc
e
O
n
R
es
is
ta
nc
e
(m
Ω
)
ID = 50A
TJ = 25°C
TJ = 125°C
25
50
75
100
125
150
Starting TJ , Junction Temperature (°C)
0
200
400
600
800
1000
1200
1400
1600
1800
2000
E
A
S
,
S
in
gl
e
P
ul
se
A
va
la
nc
he
E
ne
rg
y
(m
J)
ID
TOP 18A
24A
BOTTOM 50A
Fig 14. Typical Avalanch Current vs. Pulsewidth
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
1
10
100
1000
A
va
la
nc
he
C
ur
re
nt
(
A
)
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming
ΔΤ j = 25°C and
Tstart = 125°C.
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming
ΔTj = 125°C and
Tstart =25°C (Single Pulse)
6
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IRFH5250PbF
Fig 15.
Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET
®
Power MOSFETs
Fig 18a. Gate Charge Test Circuit
Fig 18b. Gate Charge Waveform
Vds
Vgs
Id
Vgs(th)
Qgs1 Qgs2
Qgd
Qgodr
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
P.W.
Period
di/dt
Diode Recovery
dv/dt
Ripple
≤ 5%
Body Diode Forward Drop
Re-Applied
Voltage
Reverse
Recovery
Current
Body Diode Forward
Current
V
GS
=10V
V
DD
I
SD
Driver Gate Drive
D.U.T. I
SD
Waveform
D.U.T. V
DS
Waveform
Inductor Curent
D =
P.W.
Period
*
V
GS
= 5V for Logic Level Devices
*
+
-
+
+
+
-
-
-
R
G
V
DD
• dv/dt controlled by R
G
• Driver same type as D.U.T.
• I
SD
controlled by Duty Factor "D"
• D.U.T. - Device Under Test
D.U.T
1K
VCC
DUT
0
L
S
Fig 16b. Unclamped Inductive Waveforms
Fig 16a. Unclamped Inductive Test
Circuit
tp
V
(BR)DSS
I
AS
RG
IAS
0.01
Ω
tp
D.U.T
L
VDS
+
- VDD
DRIVER
A
15V
20V
Fig 17a. Switching Time Test Circuit
Fig 17b. Switching Time Waveforms
V
GS
V
DS
90%
10%
t
d(on)
t
d(off)
t
r
t
f
V
DS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1
R
D
V
GS
R
G
D.U.T.
10V
+
-
V
DD
V
GS
7
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IRFH5250PbF
For more information on board mounting, including footprint and stencil recommendation, please refer to application note AN-1136:
http://www.irf.com/technical-info/appnotes/an-1136.pdf
For more information on package inspection techniques, please refer to application note AN-1154:
http://www.irf.com/technical-info/appnotes/an-1154.pdf
Note: For the most current drawing please refer to IR website at:
http://www.irf.com/package/
PQFN 5x6 Outline "B" Package Details
PQFN 5x6 Outline "G" Package Details
8
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IRFH5250PbF
PQFN 5x6 Tape and Reel
Bo
W
P 1
Ao
Ko
CODE
TAPE DIMENSIONS
REEL DIMENSIONS
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
Dimens ion design to accommodate the component width
Dimens ion design to accommodate the component lenght
Dimension design to accommodate the component thicknes s
Pitch between succes sive cavity centers
Overall width of the carrier tape
DES CRIPTION
T ype
Package
5 X 6 PQFN
Note: All dimens ion are nominal
Diameter
Reel
QTY
Width
Reel
(mm)
Ao
(mm)
Bo
(mm)
Ko
(mm)
P1
(mm)
W
Quadrant
Pin 1
(Inch)
W1
(mm)
13
4000
12.4
6.300
5.300
1.20
8.00
12
Q1
Note: For the most current drawing please refer to IR website at:
http://www.irf.com/package/
PQFN 5x6 Part Marking
XXXX
XYWWX
XXXXX
INTERNATIONAL
RECTIFIER LOGO
PART NUMBER
(“4 or 5 digits”)
MARKING CODE
(Per Marking Spec)
ASSEMBLY
SITE CODE
(Per SCOP 200-002)
DATE CODE
PIN 1
IDENTIFIER
LOT CODE
(Eng Mode - Min last 4 digits of EATI#)
(Prod Mode - 4 digits of SPN code)
9
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IRFH5250PbF
Qualification standards can be found at International Rectifier’s web site
http://www.irf.com/product-info/reliability
Higher qualification ratings may be available should the user have such requirements.
Please contact your International Rectifier sales representative for further information:
http://www.irf.com/whoto-call/salesrep/
Applicable version of JEDEC standard at the time of product release.
Notes:
Repetitive rating; pulse width limited by max. junction temperature.
Starting T
J
= 25°C, L = 0.37mH, R
G
= 25
Ω, I
AS
= 50A.
Pulse width ≤ 400μs; duty cycle ≤ 2%.
R
θ
is measured at
T
J
of approximately 90°C.
When mounted on 1 inch square 2 oz copper pad on 1.5x1.5 in. board of FR-4 material.
Calculated continuous current based on maximum allowable junction temperature. Package is limited to 100A by production
test capability
MS L1
(per JE DEC J-S T D-020D
†††
)
RoHS compliant
Yes
PQFN 5mm x 6mm
Qualification information
†
Moisture Sensitivity Level
Qualification level
Industrial
††
(per JE DEC JES D47F
†††
guidelines )
IR WORLD HEADQUARTERS: 101 N. Sepulveda Blvd., El Segundo, California 90245, USA
To contact International Rectifier, please visit
http://www.irf.com/whoto-call/
Date
Comments
• Updated ordering information to reflect the End-Of-life (EOL) of the mini-reel option (EOL notice #259)
• Updated data sheet with new IR corporate template
• Updated package outline for “option B” and added package outline for “option G” on page 7
• Updated tape and reel on page 8.
• Updated package outline for “option G” on page 7.
• Updated "IFX logo" on page 1 and page 9.
Revision History
12/16/2013
4/28/2015
5/19/2015