IRFB7437PbF Product Datasheet

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HEXFET

®

 Power MOSFET

Benefits

l

Improved  Gate, Avalanche and Dynamic  dV/dt Ruggedness

l

Fully Characterized Capacitance and Avalanche SOA

l

Enhanced body diode dV/dt and dI/dt Capability

l

Lead-Free

l

 RoHS Compliant, Halogen-Free*

Fig 1.   Typical On-Resistance vs. Gate Voltage

Fig 2.  Maximum Drain Current vs. Case Temperature

Applications

l

Brushed Motor drive applications

l

BLDC Motor drive applications

l

Battery powered circuits

l

Half-bridge and full-bridge topologies

l

Synchronous rectifier applications

l

Resonant mode power supplies

l

OR-ing and redundant power switches

l

DC/DC and AC/DC converters

l

DC/AC Inverters

G

D

S

Gate

Drain

Source

TO-220AB

IRFB7437PbF

S

D

G

D

25

50

75

100

125

150

175

 TC , Case Temperature (°C)

0

50

100

150

200

250

I D

 ,

 D

ra

in

 C

ur

re

nt

 (

A

)

LIMITED BY PACKAGE

V

DSS

40V

R

DS(on)

   typ.

1.5mΩ 

              max.

2.0m

Ω 

I

(Silicon Limited)

250Ac

I

(Package Limited)

195A 

4.0

6.0

8.0

10.0 12.0 14.0 16.0 18.0 20.0

VGS, Gate-to-Source Voltage (V)

0

1

2

3

4

5

6

R

D

S

(o

n)

,  

D

ra

in

-t

-S

ou

rc

O

R

es

is

ta

nc

(m

Ω

)

TJ = 25°C

TJ = 125°C

ID = 100A

D

S

G

Strong

IR

FET™

IRFB7437PbF

Form

Quantity

IRFB7437PbF

TO-220

Tube

50

IRFB7437PbF

Base Part Number

Package Type

Standard Pack

Orderable Part Number

  

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IRFB7437PbF

Notes:



Calculated continuous current based on maximum allowable junction
temperature. Bond wire current limit is 195A. Note that current
limitations arising from heating of the device leads may occur with
some lead mounting arrangements. 

(Refer to AN-1140)

‚

Repetitive rating;  pulse width limited by max. junction
temperature.

ƒ

Limited by T

Jmax

, starting T

= 25°C, L = 0.069mH

R

= 50

Ω, I

AS 

= 100A, V

GS

 =10V.

„

I

SD 

≤ 100A, di/dt ≤ 1166A/μs, V

DD 

≤ V

(BR)DSS

, T

≤ 175°C.

…

Pulse width 

≤ 400μs; duty cycle ≤ 2%.

†

C

oss

 eff. (TR) is a fixed capacitance that gives the same charging time

as C

oss 

while V

DS 

is rising from 0 to 80% V

DSS

.

‡

C

oss

 eff. (ER) is a fixed capacitance that gives the same energy as

 C

oss 

while V

DS 

is rising from 0 to 80% V

DSS

.

ˆ

R

θ 

is measured at T

J

 approximately 90°C.

‰

Limited by T

Jmax 

starting

 

T

= 25°C, L= 1mH, R

= 50

Ω, I

AS 

= 40A, V

GS

 =10V.

*  Halogen -Free since April 30, 2014

Absolute Maximum Ratings

Symbol

Parameter

Units

I

D

 @ T

C

 = 25°C

Continuous Drain Current, V

GS

 @ 10V (Silicon Limited)

I

D

 @ T

C

 = 100°C

Continuous Drain Current, V

GS

 @ 10V (Silicon Limited)

I

D

 @ T

C

 = 25°C

Continuous Drain Current, V

GS

 @ 10V (Wire Bond Limited)

I

DM

Pulsed Drain Current 

d

P

D

 @T

C

 = 25°C

Maximum Power Dissipation  

W

Linear Derating Factor

W/°C

V

GS

Gate-to-Source Voltage

V

T

Operating Junction and

T

STG

Storage Temperature Range

Soldering Temperature, for 10 seconds (1.6mm from case)

Mounting torque, 6-32 or M3 screw

Avalanche Characteristics

E

AS (Thermally limited) 

Single Pulse Avalanche Energy 

e

mJ

E

AS (Thermally limited) 

Single Pulse Avalanche Energy  

k

I

AR

Avalanche Current

d

A

E

AR

Repetitive Avalanche Energy 

d

mJ

Thermal Resistance

Symbol

Parameter

Typ.

Max.

Units

R

θJC 

Junction-to-Case 

j

–––

0.65

R

θCS 

Case-to-Sink, Flat Greased Surface

0.50

–––

R

θJA 

Junction-to-Ambient 

j

–––

62

°C/W

A

°C

300

350

See Fig. 14, 15, 22a, 22b

230

Max.

250

c

180

1000

195

802

-55  to + 175

 ± 20

1.5

10lbf

x in (1.1Nx m)

Static @ T

J

 = 25°C (unless otherwise specified)

Symbol

Parameter

Min.

Typ.

Max.

Units

V

(BR)DSS

Drain-to-Source Breakdown Voltage

40

–––

–––

V

ΔV

(BR)DSS

/

ΔT

Breakdown Voltage Temp. Coefficient

–––

0.029

–––

V/°C

R

DS(on) 

Static Drain-to-Source On-Resistance

–––

1.5

2.0

m

Ω

–––

1.8

–––

V

GS(th)

Gate Threshold Voltage

2.2

3.0

3.9

V

I

DSS

Drain-to-Source Leakage Current

–––

–––

1.0

μA

–––

–––

150

I

GSS

Gate-to-Source Forward Leakage

–––

–––

100

nA

Gate-to-Source Reverse Leakage

–––

–––

-100

R

G

Internal Gate Resistance

–––

2.2

–––

Ω

V

DS

 = 40V, V

GS

 = 0V

V

DS

 = 40V, V

GS

 = 0V, T

J

 = 125°C

V

GS

 = 20V

V

GS

 = -20V

Conditions

V

GS

 = 0V, I

D

 = 250μA

Reference to 25°C, I

D

 = 1mA

d

V

GS

 = 10V, I

D

 = 100A 

V

GS

 = 6.0V, I

D

 = 50A 

V

DS

 = V

GS

, I

D

 = 150μA

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IRFB7437PbF

Dynamic @ T

J

 = 25°C (unless otherwise specified)

Symbol

Parameter

Min. Typ. Max. Units

gfs

Forward Transconductance

160

–––

–––

S

Q

g

Total Gate Charge

–––

150

225

nC

Q

gs

Gate-to-Source Charge

–––

41

–––

Q

gd

Gate-to-Drain ("Miller") Charge

–––

51

–––

Q

sync

Total Gate Charge Sync. (Q

g

 - Q

gd

)

–––

99

–––

t

d(on)

Turn-On Delay Time

–––

19

–––

ns

t

r

Rise Time

–––

70

–––

t

d(off)

Turn-Off Delay Time

–––

78

–––

t

f

Fall Time

–––

53

–––

C

iss

Input Capacitance

–––

7330

–––

pF

C

oss

Output Capacitance

–––

1095

–––

C

rss

Reverse Transfer Capacitance

–––

745

–––

C

oss

 eff. (ER) Effective Output Capacitance (Energy Related) i ––– 1310 –––

C

oss

 eff. (TR) Effective Output Capacitance (Time Related)h

–––

1735

–––

Diode Characteristics

Symbol

        Parameter

Min. Typ. Max. Units

I

S

Continuous Source Current 

–––

––– 250c

A

(Body Diode)

I

SM

Pulsed Source Current

–––

–––

1000

A

(Body Diode)d

V

SD

Diode Forward Voltage

–––

1.0

1.3

V

dv/dt

Peak Diode Recovery 

f

–––

3.1

–––

V/ns

t

rr

Reverse Recovery Time

–––

30

–––

ns

T

J

 = 25°C

V

R

 = 34V,

–––

30

–––

T

J

 = 125°C

I

F

 = 100A

Q

rr

Reverse Recovery Charge

–––

24

–––

nC T

J

 = 25°C

di/dt = 100A/μs g

–––

25

–––

T

J

 = 125°C

I

RRM

Reverse Recovery Current

–––

1.3

–––

A

T

J

 = 25°C

T

J

 = 175°C, I

S

 = 100A, V

DS

 = 40V g

I

D

 = 30A

R

G

 = 2.7Ω

V

DD

 = 20V

Conditions

V

GS

 = 10V g

V

GS

 = 0V

V

DS

 = 25V

ƒ = 1.0 MHz,  See Fig. 5
V

GS

 = 0V, V

DS

 = 0V to 32V i, See Fig. 11

V

GS

 = 0V, V

DS

 = 0V to 32V h

T

J

 = 25°C, I

S

 = 100A, V

GS

 = 0V g

integral reverse
p-n junction diode.

MOSFET symbol
showing  the

V

GS

 = 10V 

g

I

D

 = 100A, V

DS

 =20V, V

GS

 = 10V

Conditions

V

DS

 = 10V, I

D

 = 100A

I

D

 = 100A

V

DS

 =20V

D

S

G

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IRFB7437PbF

Fig 3.  Typical Output Characteristics

Fig 5.  Typical Transfer Characteristics

Fig 6.  Normalized On-Resistance vs. Temperature

Fig 4.  Typical Output Characteristics

Fig 8.  Typical Gate Charge vs. Gate-to-Source Voltage

Fig 7.  Typical Capacitance vs. Drain-to-Source Voltage

0.1

1

10

100

VDS, Drain-to-Source Voltage (V)

1

10

100

1000

I D

, D

ra

in

-t

o-

S

ou

rc

C

ur

re

nt

 (

A

)

VGS

TOP          

15V

10V

8.0V

7.0V

6.0V

5.5V

5.0V

BOTTOM

4.5V

≤60μs PULSE WIDTH

Tj = 25°C

4.5V

0.1

1

10

100

VDS, Drain-to-Source Voltage (V)

10

100

1000

I D

, D

ra

in

-t

o-

S

ou

rc

C

ur

re

nt

 (

A

)

VGS

TOP          

15V

10V

8.0V

7.0V

6.0V

5.5V

5.0V

BOTTOM

4.5V

≤60μs PULSE WIDTH

Tj = 175°C

4.5V

-60 -40 -20 0 20 40 60 80 100120140160180

TJ , Junction Temperature (°C)

0.6

0.8

1.0

1.2

1.4

1.6

1.8

2.0

R

D

S

(o

n)

 , 

D

ra

in

-t

o-

S

ou

rc

O

R

es

is

ta

nc

   

   

   

   

   

   

   

 (

N

or

m

al

iz

ed

)

ID = 100A

VGS = 10V

1

10

100

VDS, Drain-to-Source Voltage (V)

100

1000

10000

100000

C

, C

ap

ac

ita

nc

(p

F

)

VGS   = 0V,       f = 1 MHZ

Ciss   = Cgs + Cgd,  Cds SHORTED

Crss   = Cgd 
Coss  = Cds + Cgd

Coss

Crss

Ciss

0

40

80

120

160

200

 QG  Total Gate Charge (nC)

0

2

4

6

8

10

12

14

V

G

S

, G

at

e-

to

-S

ou

rc

V

ol

ta

ge

 (

V

)

VDS= 32V

VDS= 20V

ID= 100A

3

4

5

6

7

8

VGS, Gate-to-Source Voltage (V)

1.0

10

100

1000

I D

, D

ra

in

-t

o-

S

ou

rc

C

ur

re

nt

 (A

)

TJ = 25°C

TJ = 175°C

VDS = 10V
≤60μs PULSE WIDTH

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IRFB7437PbF

Fig 10.  Maximum Safe Operating Area

Fig 11.  Drain-to-Source Breakdown Voltage

Fig 9.  Typical Source-Drain Diode

Forward Voltage

Fig 12.  Typical C

OSS

 Stored Energy

Fig 13.   Typical On-Resistance vs. Drain Current

0.0

0.5

1.0

1.5

2.0

2.5

VSD, Source-to-Drain Voltage (V)

0.1

1

10

100

1000

I S

D

, R

ev

er

se

 D

ra

in

 C

ur

re

nt

 (

A

)

TJ = 25°C

TJ = 175°C

VGS = 0V

-60 -40 -20 0 20 40 60 80 100120140160180

TJ , Temperature ( °C )

40

42

44

46

48

50

V

(B

R

)D

S

S

,  

D

ra

in

-t

o-

S

ou

rc

B

re

ak

do

w

V

ol

ta

ge

 (

V

)

Id = 1.0mA

0

10

20

30

40

50

VDS, Drain-to-Source Voltage (V)

0.0

0.2

0.4

0.6

0.8

1.0

1.2

E

ne

rg

J)

0.1

1

10

VDS, Drain-toSource Voltage (V)

0.1

1

10

100

1000

I D

,  

D

ra

in

-t

o-

S

ou

rc

C

ur

re

nt

 (

A

)

Tc = 25°C

Tj = 175°C

Single Pulse

1msec

10msec

100μsec

DC

OPERATION IN THIS AREA 

LIMITED BY RDS(on)

Limited by Package

0

100

200

300

400

500

ID , Drain Current (A)

1

2

3

4

5

6

7

8

R

D

S

 (

on

) ,

 D

ra

in

-t

o-

S

ou

rc

O

R

es

is

ta

nc

(m

Ω

)

VGS = 5.5V

VGS = 6.0V

VGS = 7.0V

VGS = 8.0V

VGS = 10V

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IRFB7437PbF

Fig 14.  Maximum Effective Transient Thermal Impedance, Junction-to-Case

Fig 15.  Typical Avalanche Current vs.Pulsewidth

Fig 16.  Maximum Avalanche Energy vs. Temperature

Notes on Repetitive Avalanche Curves , Figures 14, 15:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:

Purely a thermal phenomenon and failure occurs at a temperature far in
excess of T

jmax

. This is validated for every part type.

2. Safe operation in Avalanche is allowed as long asT

jmax

 is not exceeded.

3. Equation below based on circuit and waveforms shown in Figures 22a, 22b.
4. P

D (ave) 

= Average power dissipation per single avalanche pulse.

5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase

during avalanche).

6. I

av 

= Allowable avalanche current.

7. 

ΔT

 = 

Allowable rise in junction temperature, not to exceed

 

T

jmax 

(assumed as

25°C in Figure 14, 15).
t

av = 

Average time in avalanche.

D = Duty cycle in avalanche =  t

av 

·f

Z

thJC

(D, t

av

) = Transient thermal resistance, see Figures 13)

P

D (ave)

 = 1/2 ( 1.3·BV·I

av

) =

 DT/ Z

thJC

I

av 

=

 

2

DT/ [1.3·BV·Z

th

]

E

AS (AR)

 = P

D (ave)

·t

av

1E-006

1E-005

0.0001

0.001

0.01

0.1

t1 , Rectangular Pulse Duration (sec)

0.0001

0.001

0.01

0.1

1

T

he

rm

al

 R

es

po

ns

Z  

th

JC

 )

0.20
0.10

D = 0.50

0.02
0.01

0.05

SINGLE PULSE

( THERMAL RESPONSE )

Notes:

1. Duty Factor D = t1/t2

2. Peak Tj = P dm x Zthjc + Tc

1.0E-06

1.0E-05

1.0E-04

1.0E-03

1.0E-02

1.0E-01

tav (sec)

1

10

100

1000

A

va

la

nc

he

 C

ur

re

nt

 (

A

)

Allowed avalanche Current vs avalanche 
pulsewidth, tav, assuming ΔΤ j = 25°C and 

Tstart = 150°C. (Single Pulse)

Allowed avalanche Current vs avalanche 
pulsewidth, tav, assuming ΔTj = 150°C and 

Tstart =25°C (Single Pulse)

25

50

75

100

125

150

175

Starting TJ , Junction Temperature (°C)

0

50

100

150

200

250

300

350

E

A

R

 ,

 A

va

la

nc

he

 E

ne

rg

(m

J)

TOP          Single Pulse                
BOTTOM   1% Duty Cycle
ID = 100A

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IRFB7437PbF

Fig. 18 - Typical Recovery Current vs. di

f

/dt

Fig 17.  Threshold Voltage vs. Temperature

Fig. 20 - Typical Stored Charge vs. di

f

/dt

Fig. 19 - Typical Recovery Current vs. di

f

/dt

Fig. 21 - Typical Stored Charge vs. di

f

/dt

-75 -50 -25 0

25 50 75 100 125 150 175

TJ , Temperature ( °C )

1.0

1.5

2.0

2.5

3.0

3.5

4.0

4.5

V

G

S

(t

h)

,  

G

at

th

re

sh

ol

V

ol

ta

ge

 (

V

)

ID = 150μA

ID = 1.0mA

ID = 1.0A

0

200

400

600

800

1000

diF /dt (A/μs)

0

2

4

6

8

10

I R

R

 (

A

)

IF = 100A
VR = 34V
TJ = 25°C
TJ = 125°C

0

200

400

600

800

1000

diF /dt (A/μs)

0

2

4

6

8

10

I R

R

 (

A

)

IF = 60A
VR = 34V
TJ = 25°C
TJ = 125°C

0

200

400

600

800

1000

diF /dt (A/μs)

0

20

40

60

80

100

120

140

Q

R

R

 (

nC

)

IF = 60A
VR = 34V
TJ = 25°C
TJ = 125°C

0

200

400

600

800

1000

diF /dt (A/μs)

0

20

40

60

80

100

120

140

Q

R

R

 (

nC

)

IF = 100A
VR = 34V
TJ = 25°C
TJ = 125°C

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                        January 6, 2015

IRFB7437PbF

Fig 24a.  Switching Time Test Circuit

Fig 24b.  Switching Time Waveforms

Fig 23b.  Unclamped Inductive Waveforms

Fig 23a.  Unclamped Inductive Test Circuit

tp

V

(BR)DSS

I

AS

RG

IAS

0.01

Ω

tp

D.U.T

L

VDS

+

- VDD

DRIVER

A

15V

20V

V

GS

Fig 25a.  Gate Charge Test Circuit

Fig 25b.   Gate Charge Waveform

Vds

Vgs

Id

Vgs(th)

Qgs1 Qgs2

Qgd

Qgodr

Fig 22. 

Peak Diode Recovery dv/dt Test Circuit for N-Channel

HEXFET

®

 Power MOSFETs

Circuit Layout Considerations

   •  Low Stray Inductance

   •  Ground Plane

   •  Low Leakage Inductance

      Current Transformer

P.W.

Period

di/dt

Diode Recovery

dv/dt

Ripple 

≤ 5%

Body Diode  Forward Drop

Re-Applied

Voltage

Reverse

Recovery

Current

Body Diode Forward

Current

V

GS

=10V

V

DD

I

SD

Driver Gate Drive

D.U.T. I

SD

Waveform

D.U.T. V

DS

Waveform

Inductor Curent

D = 

P.W.

Period

*

 V

GS

 = 5V for Logic Level Devices

*

+

-

+

+

+

-

-

-

ƒ

„

‚

R

G

V

DD

•  dv/dt controlled by R

G

•  Driver same type as D.U.T.

•  I

SD

 controlled by Duty Factor "D"

•  D.U.T. - Device Under Test

D.U.T



Inductor Current

D.U.T.

V

DS

I

D

I

G

3mA

V

GS

.3

μF

50K

Ω

.2

μF

12V

Current Regulator

Same Type as D.U.T.

Current Sampling Resistors

+

-

V

DS

90%

10%
V

GS

t

d(on)

t

r

t

d(off)

t

f

V

DS

Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %

R

D

V

GS

R

G

D.U.T.

10V

+

-

V

DD

V

GS

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IRFB7437PbF

TO-220AB Part Marking Information

TO-220AB Package Outline

Dimensions are shown in millimeters (inches)

TO-220AB packages are not recommended for Surface Mount Application.

Note: For the most current drawing please refer to IR website at: 

http://www.irf.com/package/

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IRFB7437PbF

IR WORLD HEADQUARTERS: 101 N. Sepulveda Blvd., El Segundo, California 90245, USA

To contact International Rectifier, please visit 

http://www.irf.com/whoto-call/

†     Qualification standards can be found at International Rectifier’s web site:  

http://www.irf.com/product-info/reliability/

††  Applicable version of JEDEC standard at the time of product release.

Qualification level

Moisture Sensitivity Level

TO-220

Not applicable

RoHS compliant

(per JEDEC JESD47F

††

guidelines)

Yes

Qualification information

Industrial

Revision History

Date

Comment

• Updated data sheet with new IR corporate template.
• Updated typo on the fig.19 and fig.21, unit of y-axis from "A" to "nC" on page7.
• Updated package outline and part marking on page 9.
• Added bullet point in the  Benefits  "RoHS Compliant, Halogen -Free" on page 1.
• Updated E

AS (L =1mH)

 = 802mJ on page 2

• Updated note 9  “Limited by T

Jmax

, starting T

J

 = 25°C, L = 1mH, R

G

 = 50

Ω, I

AS

 = 40A, V

GS

 =10V”.  on page 2

4/22/2014

1/6/2015

Maker
Infineon Technologies