HEXFET
®
Power MOSFET
Benefits
l
Improved Gate, Avalanche and Dynamic
dV/dt Ruggedness
l
Fully Characterized Capacitance and
Avalanche SOA
l
Enhanced body diode dV/dt and dI/dt Capability
l
Lead-Free
l
RoHS Compliant, Halogen-Free
Applications
l
High Efficiency Synchronous Rectification
in SMPS
l
Uninterruptible Power Supply
l
High Speed Power Switching
l
Hard Switched and High Frequency Circuits
S
D
G
G
D
S
Gate
Drain
Source
TO-220AB
S
D
G
D
V
DSS
60V
R
DS(on)
typ.
2.1m
:
max.
2.5m
:
I
D
(Silicon Limited)
270A c
I
D
(Package Limited)
195A
Absolute Maximum Ratings
Symbol
Parameter
Units
I
D
@ T
C
= 25°C
Continuous Drain Current, V
GS
@ 10V (Silicon Limited)
I
D
@ T
C
= 100°C
Continuous Drain Current, V
GS
@ 10V (Silicon Limited)
I
D
@ T
C
= 25°C
Continuous Drain Current, V
GS
@ 10V (Wire Bond Limited)
I
DM
Pulsed Drain Current
d
P
D
@T
C
= 25°C
Maximum Power Dissipation
W
Linear Derating Factor
W/°C
V
GS
Gate-to-Source Voltage
V
dv/dt
Peak Diode Recovery
f
V/ns
T
J
Operating Junction and
T
STG
Storage Temperature Range
Soldering Temperature, for 10 seconds
(1.6mm from case)
Mounting torque, 6-32 or M3 screw
Avalanche Characteristics
E
AS (Thermally limited)
Single Pulse Avalanche Energy
e
mJ
I
AR
Avalanche Current
d
A
E
AR
Repetitive Avalanche Energy
g
mJ
Thermal Resistance
Symbol
Parameter
Typ.
Max.
Units
R
θJC
Junction-to-Case k
–––
0.4
R
θCS
Case-to-Sink, Flat Greased Surface
0.50
–––
°C/W
R
θJA
Junction-to-Ambient jk
–––
62
-55 to + 175
± 20
2.5
10lb
xin (1.1Nxm)
Max.
270
c
190
c
1080
195
A
°C
300
320
See Fig. 14, 15, 22a, 22b,
375
10
IRFB3006PbF
1
www.irf.com
©
2014 International Rectifier
Submit Datasheet Feedback
April 23, 2014
Form
Quantity
IRFB3006PbF
TO-220
Tube
50
IRFB3006PbF
Base Part Number
Package Type
Standard Pack
Orderable Part Number
2
www.irf.com
©
2014 International Rectifier
Submit Datasheet Feedback
April 23, 2014
IRFB3006PbF
Notes:
Calculated continuous current based on maximum allowable junction
temperature. Bond wire current limit is 195A. Note that current
limitations arising from heating of the device leads may occur with
some lead mounting arrangements.
(Refer to AN-1140)
Repetitive rating; pulse width limited by max. junction
temperature.
Limited by T
Jmax
, starting T
J
= 25°C, L = 0.022mH
R
G
= 25
Ω, I
AS
= 170A, V
GS
=10V. Part not recommended for use
above this value .
S
D
G
I
SD
≤ 170A, di/dt ≤ 1360A/μs, V
DD
≤ V
(BR)DSS
, T
J
≤ 175°C.
Pulse width
≤ 400μs; duty cycle ≤ 2%.
C
oss
eff. (TR) is a fixed capacitance that gives the same charging time
as C
oss
while V
DS
is rising from 0 to 80% V
DSS
.
C
oss
eff. (ER) is a fixed capacitance that gives the same energy as
C
oss
while V
DS
is rising from 0 to 80% V
DSS
.
When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended
footprint and soldering techniques refer to application note #AN-994.
R
θ
is measured at T
J
approximately 90°C.
Static @ T
J
= 25°C (unless otherwise specified)
Symbol
Parameter
Min. Typ. Max. Units
V
(BR)DSS
Drain-to-Source Breakdown Voltage
60
–––
–––
V
ΔV
(BR)DSS
/
ΔT
J
Breakdown Voltage Temp. Coefficient
–––
0.07
–––
V/°C
R
DS(on)
Static Drain-to-Source On-Resistance
–––
2.1
2.5
m
Ω
V
GS(th)
Gate Threshold Voltage
2.0
–––
4.0
V
I
DSS
Drain-to-Source Leakage Current
–––
–––
20
μA
–––
–––
250
I
GSS
Gate-to-Source Forward Leakage
–––
–––
100
nA
Gate-to-Source Reverse Leakage
–––
–––
-100
R
G
Internal Gate Resistance
–––
2.0
–––
Ω
Dynamic @ T
J
= 25°C (unless otherwise specified)
Symbol
Parameter
Min. Typ. Max. Units
gfs
Forward Transconductance
280
–––
–––
S
Q
g
Total Gate Charge
–––
200
300
nC
Q
gs
Gate-to-Source Charge
–––
37
–––
Q
gd
Gate-to-Drain ("Miller") Charge
–––
60
Q
sync
Total Gate Charge Sync. (Q
g
- Q
gd
)
–––
140
–––
t
d(on)
Turn-On Delay Time
–––
16
–––
ns
t
r
Rise Time
–––
182
–––
t
d(off)
Turn-Off Delay Time
–––
118
–––
t
f
Fall Time
–––
189
–––
C
iss
Input Capacitance
–––
8970
–––
pF
C
oss
Output Capacitance
–––
1020
–––
C
rss
Reverse Transfer Capacitance
–––
534
–––
C
oss
eff. (ER) Effective Output Capacitance (Energy Related) ––– 1480 –––
C
oss
eff. (TR) Effective Output Capacitance (Time Related)h ––– 1920 –––
Diode Characteristics
Symbol
Parameter
Min. Typ. Max. Units
I
S
Continuous Source Current
–––
––– 270c
A
(Body Diode)
I
SM
Pulsed Source Current
–––
–––
1080
A
(Body Diode)
d
V
SD
Diode Forward Voltage
–––
–––
1.3
V
t
rr
Reverse Recovery Time
–––
44
–––
ns
T
J
= 25°C
V
R
= 51V,
–––
48
–––
T
J
= 125°C
I
F
= 170A
Q
rr
Reverse Recovery Charge
–––
63
–––
nC T
J
= 25°C
di/dt = 100A/μs
g
–––
77
–––
T
J
= 125°C
I
RRM
Reverse Recovery Current
–––
2.4
–––
A
T
J
= 25°C
t
on
Forward Turn-On Time
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Conditions
V
DS
= 25V, I
D
= 170A
I
D
= 170A
V
GS
= 20V
V
GS
= -20V
MOSFET symbol
showing the
V
DS
=30V
Conditions
V
GS
= 10V g
V
GS
= 0V
V
DS
= 50V
ƒ = 1.0 MHz, See Fig. 5
V
GS
= 0V, V
DS
= 0V to 48V i, See Fig. 11
V
GS
= 0V, V
DS
= 0V to 48V h
T
J
= 25°C, I
S
= 170A, V
GS
= 0V
g
integral reverse
p-n junction diode.
Conditions
V
GS
= 0V, I
D
= 250μA
Reference to 25°C, I
D
= 5mAd
V
GS
= 10V, I
D
= 170A g
V
DS
= V
GS
, I
D
= 250μA
V
DS
= 60V, V
GS
= 0V
V
DS
= 60V, V
GS
= 0V, T
J
= 125°C
I
D
= 170A
R
G
= 2.7Ω
V
GS
= 10V g
V
DD
= 39V
I
D
= 170A, V
DS
=0V, V
GS
= 10V
3
www.irf.com
©
2014 International Rectifier
Submit Datasheet Feedback
April 23, 2014
IRFB3006PbF
Fig 1. Typical Output Characteristics
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance vs. Temperature
Fig 2. Typical Output Characteristics
Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage
Fig 5. Typical Capacitance vs. Drain-to-Source Voltage
0.1
1
10
100
VDS, Drain-to-Source Voltage (V)
1
10
100
1000
I D
, D
ra
in
-t
o-
S
ou
rc
e
C
ur
re
nt
(
A
)
≤ 60μs PULSE WIDTH
Tj = 25°C
3.5V
VGS
TOP
15V
10V
8.0V
6.0V
5.0V
4.5V
4.0V
BOTTOM
3.5V
0.1
1
10
100
VDS, Drain-to-Source Voltage (V)
10
100
1000
I D
, D
ra
in
-t
o-
S
ou
rc
e
C
ur
re
nt
(
A
)
≤ 60μs PULSE WIDTH
Tj = 175°C
3.5V
VGS
TOP
15V
10V
8.0V
6.0V
5.0V
4.5V
4.0V
BOTTOM
3.5V
2.0
3.0
4.0
5.0
6.0
7.0
VGS, Gate-to-Source Voltage (V)
1
10
100
1000
I D
, D
ra
in
-t
o-
S
ou
rc
e
C
ur
re
nt
(Α
)
VDS = 25V
≤ 60μs PULSE WIDTH
TJ = 25°C
TJ = 175°C
1
10
100
VDS, Drain-to-Source Voltage (V)
0
4000
8000
12000
16000
C
, C
ap
ac
ita
nc
e
(p
F
)
VGS = 0V, f = 1 MHZ
Ciss = Cgs + Cgd, Cds SHORTED
Crss = Cgd
Coss = Cds + Cgd
Coss
Crss
Ciss
0
40
80
120
160
200
240
280
QG Total Gate Charge (nC)
0
4
8
12
16
V
G
S
, G
at
e-
to
-S
ou
rc
e
V
ol
ta
ge
(
V
)
VDS= 48V
VDS= 30V
ID= 170A
-60 -40 -20 0
20 40 60 80 100 120 140 160 180
TJ , Junction Temperature (°C)
0.5
1.0
1.5
2.0
2.5
R
D
S
(o
n)
,
D
ra
in
-t
o-
S
ou
rc
e
O
n
R
es
is
ta
nc
e
(
N
or
m
al
iz
ed
)
ID = 170A
VGS = 10V
4
www.irf.com
©
2014 International Rectifier
Submit Datasheet Feedback
April 23, 2014
IRFB3006PbF
Fig 8. Maximum Safe Operating Area
Fig 10. Drain-to-Source Breakdown Voltage
Fig 7. Typical Source-Drain Diode
Forward Voltage
Fig 11. Typical C
OSS
Stored Energy
Fig 9. Maximum Drain Current vs.
Case Temperature
Fig 12. Maximum Avalanche Energy Vs. DrainCurrent
0.0
0.4
0.8
1.2
1.6
2.0
VSD, Source-to-Drain Voltage (V)
0.1
1
10
100
1000
I S
D
, R
ev
er
se
D
ra
in
C
ur
re
nt
(
A
)
TJ = 25°C
TJ = 175°C
VGS = 0V
25
50
75
100
125
150
175
TC , Case Temperature (°C)
0
50
100
150
200
250
300
I D
,
D
ra
in
C
ur
re
nt
(
A
)
LIMITED BY PACKAGE
-60 -40 -20 0
20 40 60 80 100 120 140 160 180
TJ , Junction Temperature (°C)
55
60
65
70
75
80
V
(B
R
)D
S
S
,
D
ra
in
-t
o-
S
ou
rc
e
B
re
ak
do
w
n
V
ol
ta
ge
ID = 5mA
0
10
20
30
40
50
60
VDS, Drain-to-Source Voltage (V)
0.0
0.5
1.0
1.5
2.0
E
ne
rg
y
(μ
J)
25
50
75
100
125
150
175
Starting TJ, Junction Temperature (°C)
0
200
400
600
800
1000
1200
1400
E
A
S
,
S
in
gl
e
P
ul
se
A
va
la
nc
he
E
ne
rg
y
(m
J)
I D
TOP
20A
27A
BOTTOM
170A
0.1
1
10
100
VDS, Drain-toSource Voltage (V)
0.1
1
10
100
1000
10000
I D
,
D
ra
in
-t
o-
S
ou
rc
e
C
ur
re
nt
(
A
)
Tc = 25°C
Tj = 175°C
Single Pulse
1msec
10msec
OPERATION IN THIS AREA
LIMITED BY R DS(on)
100μsec
DC
LIMITED BY PACKAGE
5
www.irf.com
©
2014 International Rectifier
Submit Datasheet Feedback
April 23, 2014
IRFB3006PbF
Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Fig 14. Typical Avalanche Current vs.Pulsewidth
Fig 15. Maximum Avalanche Energy vs. Temperature
Notes on Repetitive Avalanche Curves , Figures 14, 15:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a temperature far in
excess of T
jmax
. This is validated for every part type.
2. Safe operation in Avalanche is allowed as long asT
jmax
is not exceeded.
3. Equation below based on circuit and waveforms shown in Figures 16a, 16b.
4. P
D (ave)
= Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).
6. I
av
= Allowable avalanche current.
7.
ΔT
=
Allowable rise in junction temperature, not to exceed
T
jmax
(assumed as
25°C in Figure 14, 15).
t
av =
Average time in avalanche.
D = Duty cycle in avalanche = t
av
·f
Z
thJC
(D, t
av
) = Transient thermal resistance, see Figures 13)
P
D (ave)
= 1/2 ( 1.3·BV·I
av
) =
DT/ Z
thJC
I
av
=
2
DT/ [1.3·BV·Z
th
]
E
AS (AR)
= P
D (ave)
·t
av
1E-006
1E-005
0.0001
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
0.0001
0.001
0.01
0.1
1
T
he
rm
al
R
es
po
ns
e
(
Z
th
JC
)
0.20
0.10
D = 0.50
0.02
0.01
0.05
SINGLE PULSE
( THERMAL RESPONSE )
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
Ri (°C/W)
τι (sec)
0.175365 0.000343
0.22547 0.006073
τ
J
τ
J
τ
1
τ
1
τ
2
τ
2
R
1
R
1
R
2
R
2
τ
C
C
Ci=
τi/Ri
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
1
10
100
1000
A
va
la
nc
he
C
ur
re
nt
(
A
)
0.05
Duty Cycle = Single Pulse
0.10
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming
ΔΤ j = 25°C and
Tstart = 150°C.
0.01
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming
ΔTj = 150°C and
Tstart =25°C (Single Pulse)
25
50
75
100
125
150
175
Starting TJ , Junction Temperature (°C)
0
100
200
300
400
E
A
R
,
A
va
la
nc
he
E
ne
rg
y
(m
J)
TOP Single Pulse
BOTTOM 1% Duty Cycle
ID = 170A
6
www.irf.com
©
2014 International Rectifier
Submit Datasheet Feedback
April 23, 2014
IRFB3006PbF
Fig. 17 - Typical Recovery Current vs. di
f
/dt
Fig 16. Threshold Voltage Vs. Temperature
Fig. 19 - Typical Stored Charge vs. di
f
/dt
Fig. 18 - Typical Recovery Current vs. di
f
/dt
Fig. 20 - Typical Stored Charge vs. di
f
/dt
-75 -50 -25
0
25
50
75 100 125 150 175
TJ , Temperature ( °C )
1.0
1.5
2.0
2.5
3.0
3.5
4.0
V
G
S
(t
h)
G
at
e
th
re
sh
ol
d
V
ol
ta
ge
(
V
)
ID = 1.0A
ID = 1.0mA
ID = 250μA
100
200
300
400
500
600
700
800
dif / dt - (A / μs)
0
4
8
12
16
20
I R
R
M
-
(
A
)
IF = 112A
VR = 51V
TJ = 125°C
TJ = 25°C
100
200
300
400
500
600
700
800
dif / dt - (A / μs)
0
4
8
12
16
20
I R
R
M
-
(
A
)
IF = 170A
VR = 51V
TJ = 125°C
TJ = 25°C
100
200
300
400
500
600
700
800
dif / dt - (A / μs)
0
100
200
300
400
500
600
700
Q
R
R
-
(
nC
)
IF = 112A
VR = 51V
TJ = 125°C
TJ = 25°C
100
200
300
400
500
600
700
800
dif / dt - (A / μs)
0
100
200
300
400
500
600
700
Q
R
R
-
(
nC
)
IF = 170A
VR = 51V
TJ = 125°C
TJ = 25°C
7
www.irf.com
©
2014 International Rectifier
Submit Datasheet Feedback
April 23, 2014
IRFB3006PbF
Fig 23a. Switching Time Test Circuit
Fig 23b. Switching Time Waveforms
Fig 22b. Unclamped Inductive Waveforms
Fig 22a. Unclamped Inductive Test Circuit
tp
V
(BR)DSS
I
AS
RG
IAS
0.01
Ω
tp
D.U.T
L
VDS
+
- VDD
DRIVER
A
15V
20V
V
GS
Fig 24a. Gate Charge Test Circuit
Fig 24b. Gate Charge Waveform
Vds
Vgs
Id
Vgs(th)
Qgs1 Qgs2
Qgd
Qgodr
Fig 21.
Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET
®
Power MOSFETs
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
P.W.
Period
di/dt
Diode Recovery
dv/dt
Ripple
≤ 5%
Body Diode Forward Drop
Re-Applied
Voltage
Reverse
Recovery
Current
Body Diode Forward
Current
V
GS
=10V
V
DD
I
SD
Driver Gate Drive
D.U.T. I
SD
Waveform
D.U.T. V
DS
Waveform
Inductor Curent
D =
P.W.
Period
*
V
GS
= 5V for Logic Level Devices
*
+
-
+
+
+
-
-
-
R
G
V
DD
• dv/dt controlled by R
G
• Driver same type as D.U.T.
• I
SD
controlled by Duty Factor "D"
• D.U.T. - Device Under Test
D.U.T
Inductor Current
D.U.T.
V
DS
I
D
I
G
3mA
V
GS
.3
μF
50K
Ω
.2
μF
12V
Current Regulator
Same Type as D.U.T.
Current Sampling Resistors
+
-
V
DS
90%
10%
V
GS
t
d(on)
t
r
t
d(off)
t
f
V
DS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
R
D
V
GS
R
G
D.U.T.
10V
+
-
V
DD
V
GS
8
www.irf.com
©
2014 International Rectifier
Submit Datasheet Feedback
April 23, 2014
IRFB3006PbF
TO-220AB packages are not recommended for Surface Mount Application.
TO-220AB Part Marking Information
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
Note: For the most current drawing please refer to IR website at:
http://www.irf.com/package/
IRFB3006
IRFB3006
PYWW?
LC LC
PART NUMBER
DATE CODE
P = LEAD-FREE
Y = LAST DIGIT OF YEAR
WW = WORK WEEK
? = ASSEMBLY SITE CODE
INTERNATIONAL
RECTIFIER LOGO
ASSEMBLY
LOT CODE
OR
YWWP
LC LC
PART NUMBER
DATE CODE
Y = LAST DIGIT OF YEAR
WW = WORK WEEK
P = LEAD-FREE
INTERNATIONAL
RECTIFIER LOGO
ASSEMBLY
LOT CODE
9
www.irf.com
©
2014 International Rectifier
Submit Datasheet Feedback
April 23, 2014
IRFB3006PbF
IR WORLD HEADQUARTERS: 101 N. Sepulveda Blvd., El Segundo, California 90245, USA
To contact International Rectifier, please visit
http://www.irf.com/whoto-call/
Qualification standards can be found at International Rectifiers web site:
http://www.irf.com/product-info/reliability/
Applicable version of JEDEC standard at the time of product release.
Qualification level
Moisture Sensitivity Level
TO-220
Not applicable
RoHS compliant
(per JEDEC JESD47F
††
guidelines)
Yes
Qualification information†
Industrial
Revision History
Date
Comment
• Updated data sheet with new IR corporate template.
• Updated package outline & part marking on page 8.
• Added bullet point in the Benefits "RoHS Compliant, Halogen -Free" on page 1.
4/23/2014
HEXFET
®
Power MOSFET
Benefits
l
Improved Gate, Avalanche and Dynamic
dV/dt Ruggedness
l
Fully Characterized Capacitance and
Avalanche SOA
l
Enhanced body diode dV/dt and dI/dt Capability
l
Lead-Free
l
RoHS Compliant, Halogen-Free
Applications
l
High Efficiency Synchronous Rectification
in SMPS
l
Uninterruptible Power Supply
l
High Speed Power Switching
l
Hard Switched and High Frequency Circuits
S
D
G
G
D
S
Gate
Drain
Source
TO-220AB
S
D
G
D
V
DSS
60V
R
DS(on)
typ.
2.1m
:
max.
2.5m
:
I
D
(Silicon Limited)
270A c
I
D
(Package Limited)
195A
Absolute Maximum Ratings
Symbol
Parameter
Units
I
D
@ T
C
= 25°C
Continuous Drain Current, V
GS
@ 10V (Silicon Limited)
I
D
@ T
C
= 100°C
Continuous Drain Current, V
GS
@ 10V (Silicon Limited)
I
D
@ T
C
= 25°C
Continuous Drain Current, V
GS
@ 10V (Wire Bond Limited)
I
DM
Pulsed Drain Current
d
P
D
@T
C
= 25°C
Maximum Power Dissipation
W
Linear Derating Factor
W/°C
V
GS
Gate-to-Source Voltage
V
dv/dt
Peak Diode Recovery
f
V/ns
T
J
Operating Junction and
T
STG
Storage Temperature Range
Soldering Temperature, for 10 seconds
(1.6mm from case)
Mounting torque, 6-32 or M3 screw
Avalanche Characteristics
E
AS (Thermally limited)
Single Pulse Avalanche Energy
e
mJ
I
AR
Avalanche Current
d
A
E
AR
Repetitive Avalanche Energy
g
mJ
Thermal Resistance
Symbol
Parameter
Typ.
Max.
Units
R
θJC
Junction-to-Case k
–––
0.4
R
θCS
Case-to-Sink, Flat Greased Surface
0.50
–––
°C/W
R
θJA
Junction-to-Ambient jk
–––
62
-55 to + 175
± 20
2.5
10lb
xin (1.1Nxm)
Max.
270
c
190
c
1080
195
A
°C
300
320
See Fig. 14, 15, 22a, 22b,
375
10
IRFB3006PbF
1
www.irf.com
©
2014 International Rectifier
Submit Datasheet Feedback
April 23, 2014
Form
Quantity
IRFB3006PbF
TO-220
Tube
50
IRFB3006PbF
Base Part Number
Package Type
Standard Pack
Orderable Part Number
2
www.irf.com
©
2014 International Rectifier
Submit Datasheet Feedback
April 23, 2014
IRFB3006PbF
Notes:
Calculated continuous current based on maximum allowable junction
temperature. Bond wire current limit is 195A. Note that current
limitations arising from heating of the device leads may occur with
some lead mounting arrangements.
(Refer to AN-1140)
Repetitive rating; pulse width limited by max. junction
temperature.
Limited by T
Jmax
, starting T
J
= 25°C, L = 0.022mH
R
G
= 25
Ω, I
AS
= 170A, V
GS
=10V. Part not recommended for use
above this value .
S
D
G
I
SD
≤ 170A, di/dt ≤ 1360A/μs, V
DD
≤ V
(BR)DSS
, T
J
≤ 175°C.
Pulse width
≤ 400μs; duty cycle ≤ 2%.
C
oss
eff. (TR) is a fixed capacitance that gives the same charging time
as C
oss
while V
DS
is rising from 0 to 80% V
DSS
.
C
oss
eff. (ER) is a fixed capacitance that gives the same energy as
C
oss
while V
DS
is rising from 0 to 80% V
DSS
.
When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended
footprint and soldering techniques refer to application note #AN-994.
R
θ
is measured at T
J
approximately 90°C.
Static @ T
J
= 25°C (unless otherwise specified)
Symbol
Parameter
Min. Typ. Max. Units
V
(BR)DSS
Drain-to-Source Breakdown Voltage
60
–––
–––
V
ΔV
(BR)DSS
/
ΔT
J
Breakdown Voltage Temp. Coefficient
–––
0.07
–––
V/°C
R
DS(on)
Static Drain-to-Source On-Resistance
–––
2.1
2.5
m
Ω
V
GS(th)
Gate Threshold Voltage
2.0
–––
4.0
V
I
DSS
Drain-to-Source Leakage Current
–––
–––
20
μA
–––
–––
250
I
GSS
Gate-to-Source Forward Leakage
–––
–––
100
nA
Gate-to-Source Reverse Leakage
–––
–––
-100
R
G
Internal Gate Resistance
–––
2.0
–––
Ω
Dynamic @ T
J
= 25°C (unless otherwise specified)
Symbol
Parameter
Min. Typ. Max. Units
gfs
Forward Transconductance
280
–––
–––
S
Q
g
Total Gate Charge
–––
200
300
nC
Q
gs
Gate-to-Source Charge
–––
37
–––
Q
gd
Gate-to-Drain ("Miller") Charge
–––
60
Q
sync
Total Gate Charge Sync. (Q
g
- Q
gd
)
–––
140
–––
t
d(on)
Turn-On Delay Time
–––
16
–––
ns
t
r
Rise Time
–––
182
–––
t
d(off)
Turn-Off Delay Time
–––
118
–––
t
f
Fall Time
–––
189
–––
C
iss
Input Capacitance
–––
8970
–––
pF
C
oss
Output Capacitance
–––
1020
–––
C
rss
Reverse Transfer Capacitance
–––
534
–––
C
oss
eff. (ER) Effective Output Capacitance (Energy Related) ––– 1480 –––
C
oss
eff. (TR) Effective Output Capacitance (Time Related)h ––– 1920 –––
Diode Characteristics
Symbol
Parameter
Min. Typ. Max. Units
I
S
Continuous Source Current
–––
––– 270c
A
(Body Diode)
I
SM
Pulsed Source Current
–––
–––
1080
A
(Body Diode)
d
V
SD
Diode Forward Voltage
–––
–––
1.3
V
t
rr
Reverse Recovery Time
–––
44
–––
ns
T
J
= 25°C
V
R
= 51V,
–––
48
–––
T
J
= 125°C
I
F
= 170A
Q
rr
Reverse Recovery Charge
–––
63
–––
nC T
J
= 25°C
di/dt = 100A/μs
g
–––
77
–––
T
J
= 125°C
I
RRM
Reverse Recovery Current
–––
2.4
–––
A
T
J
= 25°C
t
on
Forward Turn-On Time
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Conditions
V
DS
= 25V, I
D
= 170A
I
D
= 170A
V
GS
= 20V
V
GS
= -20V
MOSFET symbol
showing the
V
DS
=30V
Conditions
V
GS
= 10V g
V
GS
= 0V
V
DS
= 50V
ƒ = 1.0 MHz, See Fig. 5
V
GS
= 0V, V
DS
= 0V to 48V i, See Fig. 11
V
GS
= 0V, V
DS
= 0V to 48V h
T
J
= 25°C, I
S
= 170A, V
GS
= 0V
g
integral reverse
p-n junction diode.
Conditions
V
GS
= 0V, I
D
= 250μA
Reference to 25°C, I
D
= 5mAd
V
GS
= 10V, I
D
= 170A g
V
DS
= V
GS
, I
D
= 250μA
V
DS
= 60V, V
GS
= 0V
V
DS
= 60V, V
GS
= 0V, T
J
= 125°C
I
D
= 170A
R
G
= 2.7Ω
V
GS
= 10V g
V
DD
= 39V
I
D
= 170A, V
DS
=0V, V
GS
= 10V
3
www.irf.com
©
2014 International Rectifier
Submit Datasheet Feedback
April 23, 2014
IRFB3006PbF
Fig 1. Typical Output Characteristics
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance vs. Temperature
Fig 2. Typical Output Characteristics
Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage
Fig 5. Typical Capacitance vs. Drain-to-Source Voltage
0.1
1
10
100
VDS, Drain-to-Source Voltage (V)
1
10
100
1000
I D
, D
ra
in
-t
o-
S
ou
rc
e
C
ur
re
nt
(
A
)
≤ 60μs PULSE WIDTH
Tj = 25°C
3.5V
VGS
TOP
15V
10V
8.0V
6.0V
5.0V
4.5V
4.0V
BOTTOM
3.5V
0.1
1
10
100
VDS, Drain-to-Source Voltage (V)
10
100
1000
I D
, D
ra
in
-t
o-
S
ou
rc
e
C
ur
re
nt
(
A
)
≤ 60μs PULSE WIDTH
Tj = 175°C
3.5V
VGS
TOP
15V
10V
8.0V
6.0V
5.0V
4.5V
4.0V
BOTTOM
3.5V
2.0
3.0
4.0
5.0
6.0
7.0
VGS, Gate-to-Source Voltage (V)
1
10
100
1000
I D
, D
ra
in
-t
o-
S
ou
rc
e
C
ur
re
nt
(Α
)
VDS = 25V
≤ 60μs PULSE WIDTH
TJ = 25°C
TJ = 175°C
1
10
100
VDS, Drain-to-Source Voltage (V)
0
4000
8000
12000
16000
C
, C
ap
ac
ita
nc
e
(p
F
)
VGS = 0V, f = 1 MHZ
Ciss = Cgs + Cgd, Cds SHORTED
Crss = Cgd
Coss = Cds + Cgd
Coss
Crss
Ciss
0
40
80
120
160
200
240
280
QG Total Gate Charge (nC)
0
4
8
12
16
V
G
S
, G
at
e-
to
-S
ou
rc
e
V
ol
ta
ge
(
V
)
VDS= 48V
VDS= 30V
ID= 170A
-60 -40 -20 0
20 40 60 80 100 120 140 160 180
TJ , Junction Temperature (°C)
0.5
1.0
1.5
2.0
2.5
R
D
S
(o
n)
,
D
ra
in
-t
o-
S
ou
rc
e
O
n
R
es
is
ta
nc
e
(
N
or
m
al
iz
ed
)
ID = 170A
VGS = 10V
4
www.irf.com
©
2014 International Rectifier
Submit Datasheet Feedback
April 23, 2014
IRFB3006PbF
Fig 8. Maximum Safe Operating Area
Fig 10. Drain-to-Source Breakdown Voltage
Fig 7. Typical Source-Drain Diode
Forward Voltage
Fig 11. Typical C
OSS
Stored Energy
Fig 9. Maximum Drain Current vs.
Case Temperature
Fig 12. Maximum Avalanche Energy Vs. DrainCurrent
0.0
0.4
0.8
1.2
1.6
2.0
VSD, Source-to-Drain Voltage (V)
0.1
1
10
100
1000
I S
D
, R
ev
er
se
D
ra
in
C
ur
re
nt
(
A
)
TJ = 25°C
TJ = 175°C
VGS = 0V
25
50
75
100
125
150
175
TC , Case Temperature (°C)
0
50
100
150
200
250
300
I D
,
D
ra
in
C
ur
re
nt
(
A
)
LIMITED BY PACKAGE
-60 -40 -20 0
20 40 60 80 100 120 140 160 180
TJ , Junction Temperature (°C)
55
60
65
70
75
80
V
(B
R
)D
S
S
,
D
ra
in
-t
o-
S
ou
rc
e
B
re
ak
do
w
n
V
ol
ta
ge
ID = 5mA
0
10
20
30
40
50
60
VDS, Drain-to-Source Voltage (V)
0.0
0.5
1.0
1.5
2.0
E
ne
rg
y
(μ
J)
25
50
75
100
125
150
175
Starting TJ, Junction Temperature (°C)
0
200
400
600
800
1000
1200
1400
E
A
S
,
S
in
gl
e
P
ul
se
A
va
la
nc
he
E
ne
rg
y
(m
J)
I D
TOP
20A
27A
BOTTOM
170A
0.1
1
10
100
VDS, Drain-toSource Voltage (V)
0.1
1
10
100
1000
10000
I D
,
D
ra
in
-t
o-
S
ou
rc
e
C
ur
re
nt
(
A
)
Tc = 25°C
Tj = 175°C
Single Pulse
1msec
10msec
OPERATION IN THIS AREA
LIMITED BY R DS(on)
100μsec
DC
LIMITED BY PACKAGE
5
www.irf.com
©
2014 International Rectifier
Submit Datasheet Feedback
April 23, 2014
IRFB3006PbF
Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Fig 14. Typical Avalanche Current vs.Pulsewidth
Fig 15. Maximum Avalanche Energy vs. Temperature
Notes on Repetitive Avalanche Curves , Figures 14, 15:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a temperature far in
excess of T
jmax
. This is validated for every part type.
2. Safe operation in Avalanche is allowed as long asT
jmax
is not exceeded.
3. Equation below based on circuit and waveforms shown in Figures 16a, 16b.
4. P
D (ave)
= Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).
6. I
av
= Allowable avalanche current.
7.
ΔT
=
Allowable rise in junction temperature, not to exceed
T
jmax
(assumed as
25°C in Figure 14, 15).
t
av =
Average time in avalanche.
D = Duty cycle in avalanche = t
av
·f
Z
thJC
(D, t
av
) = Transient thermal resistance, see Figures 13)
P
D (ave)
= 1/2 ( 1.3·BV·I
av
) =
DT/ Z
thJC
I
av
=
2
DT/ [1.3·BV·Z
th
]
E
AS (AR)
= P
D (ave)
·t
av
1E-006
1E-005
0.0001
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
0.0001
0.001
0.01
0.1
1
T
he
rm
al
R
es
po
ns
e
(
Z
th
JC
)
0.20
0.10
D = 0.50
0.02
0.01
0.05
SINGLE PULSE
( THERMAL RESPONSE )
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
Ri (°C/W)
τι (sec)
0.175365 0.000343
0.22547 0.006073
τ
J
τ
J
τ
1
τ
1
τ
2
τ
2
R
1
R
1
R
2
R
2
τ
C
C
Ci=
τi/Ri
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
1
10
100
1000
A
va
la
nc
he
C
ur
re
nt
(
A
)
0.05
Duty Cycle = Single Pulse
0.10
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming
ΔΤ j = 25°C and
Tstart = 150°C.
0.01
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming
ΔTj = 150°C and
Tstart =25°C (Single Pulse)
25
50
75
100
125
150
175
Starting TJ , Junction Temperature (°C)
0
100
200
300
400
E
A
R
,
A
va
la
nc
he
E
ne
rg
y
(m
J)
TOP Single Pulse
BOTTOM 1% Duty Cycle
ID = 170A
6
www.irf.com
©
2014 International Rectifier
Submit Datasheet Feedback
April 23, 2014
IRFB3006PbF
Fig. 17 - Typical Recovery Current vs. di
f
/dt
Fig 16. Threshold Voltage Vs. Temperature
Fig. 19 - Typical Stored Charge vs. di
f
/dt
Fig. 18 - Typical Recovery Current vs. di
f
/dt
Fig. 20 - Typical Stored Charge vs. di
f
/dt
-75 -50 -25
0
25
50
75 100 125 150 175
TJ , Temperature ( °C )
1.0
1.5
2.0
2.5
3.0
3.5
4.0
V
G
S
(t
h)
G
at
e
th
re
sh
ol
d
V
ol
ta
ge
(
V
)
ID = 1.0A
ID = 1.0mA
ID = 250μA
100
200
300
400
500
600
700
800
dif / dt - (A / μs)
0
4
8
12
16
20
I R
R
M
-
(
A
)
IF = 112A
VR = 51V
TJ = 125°C
TJ = 25°C
100
200
300
400
500
600
700
800
dif / dt - (A / μs)
0
4
8
12
16
20
I R
R
M
-
(
A
)
IF = 170A
VR = 51V
TJ = 125°C
TJ = 25°C
100
200
300
400
500
600
700
800
dif / dt - (A / μs)
0
100
200
300
400
500
600
700
Q
R
R
-
(
nC
)
IF = 112A
VR = 51V
TJ = 125°C
TJ = 25°C
100
200
300
400
500
600
700
800
dif / dt - (A / μs)
0
100
200
300
400
500
600
700
Q
R
R
-
(
nC
)
IF = 170A
VR = 51V
TJ = 125°C
TJ = 25°C
7
www.irf.com
©
2014 International Rectifier
Submit Datasheet Feedback
April 23, 2014
IRFB3006PbF
Fig 23a. Switching Time Test Circuit
Fig 23b. Switching Time Waveforms
Fig 22b. Unclamped Inductive Waveforms
Fig 22a. Unclamped Inductive Test Circuit
tp
V
(BR)DSS
I
AS
RG
IAS
0.01
Ω
tp
D.U.T
L
VDS
+
- VDD
DRIVER
A
15V
20V
V
GS
Fig 24a. Gate Charge Test Circuit
Fig 24b. Gate Charge Waveform
Vds
Vgs
Id
Vgs(th)
Qgs1 Qgs2
Qgd
Qgodr
Fig 21.
Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET
®
Power MOSFETs
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
P.W.
Period
di/dt
Diode Recovery
dv/dt
Ripple
≤ 5%
Body Diode Forward Drop
Re-Applied
Voltage
Reverse
Recovery
Current
Body Diode Forward
Current
V
GS
=10V
V
DD
I
SD
Driver Gate Drive
D.U.T. I
SD
Waveform
D.U.T. V
DS
Waveform
Inductor Curent
D =
P.W.
Period
*
V
GS
= 5V for Logic Level Devices
*
+
-
+
+
+
-
-
-
R
G
V
DD
• dv/dt controlled by R
G
• Driver same type as D.U.T.
• I
SD
controlled by Duty Factor "D"
• D.U.T. - Device Under Test
D.U.T
Inductor Current
D.U.T.
V
DS
I
D
I
G
3mA
V
GS
.3
μF
50K
Ω
.2
μF
12V
Current Regulator
Same Type as D.U.T.
Current Sampling Resistors
+
-
V
DS
90%
10%
V
GS
t
d(on)
t
r
t
d(off)
t
f
V
DS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
R
D
V
GS
R
G
D.U.T.
10V
+
-
V
DD
V
GS
8
www.irf.com
©
2014 International Rectifier
Submit Datasheet Feedback
April 23, 2014
IRFB3006PbF
TO-220AB packages are not recommended for Surface Mount Application.
TO-220AB Part Marking Information
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
Note: For the most current drawing please refer to IR website at:
http://www.irf.com/package/
IRFB3006
IRFB3006
PYWW?
LC LC
PART NUMBER
DATE CODE
P = LEAD-FREE
Y = LAST DIGIT OF YEAR
WW = WORK WEEK
? = ASSEMBLY SITE CODE
INTERNATIONAL
RECTIFIER LOGO
ASSEMBLY
LOT CODE
OR
YWWP
LC LC
PART NUMBER
DATE CODE
Y = LAST DIGIT OF YEAR
WW = WORK WEEK
P = LEAD-FREE
INTERNATIONAL
RECTIFIER LOGO
ASSEMBLY
LOT CODE
9
www.irf.com
©
2014 International Rectifier
Submit Datasheet Feedback
April 23, 2014
IRFB3006PbF
IR WORLD HEADQUARTERS: 101 N. Sepulveda Blvd., El Segundo, California 90245, USA
To contact International Rectifier, please visit
http://www.irf.com/whoto-call/
Qualification standards can be found at International Rectifiers web site:
http://www.irf.com/product-info/reliability/
Applicable version of JEDEC standard at the time of product release.
Qualification level
Moisture Sensitivity Level
TO-220
Not applicable
RoHS compliant
(per JEDEC JESD47F
††
guidelines)
Yes
Qualification information†
Industrial
Revision History
Date
Comment
• Updated data sheet with new IR corporate template.
• Updated package outline & part marking on page 8.
• Added bullet point in the Benefits "RoHS Compliant, Halogen -Free" on page 1.
4/23/2014