Typical values (unless otherwise specified)
Notes:
Click on this section to link to the appropriate technical paper.
Click on this section to link to the DirectFET
®
Website.
Surface mounted on 1 in. square Cu board, steady state.
T
C
measured with thermocouple mounted to top (Drain) of part.
Repetitive rating; pulse width limited by max. junction temperature.
DirectFET
ISOMETRIC
Description
The IRF9383MTRPbF combines the latest HEXFET
®
P-Channel Power MOSFET Silicon technology with the advanced DirectFET
®
packaging to achieve the lowest on-state resistance in a package that has the footprint of a SO-8 and only 0.6 mm profile. The DirectFET
®
package is compatible with existing layout geometries used in power applications, PCB assembly equipment and vapor phase, infra-red or
convection soldering techniques, when application note AN-1035 is followed regarding the manufacturing methods and processes. The DirectFET
®
package allows dual sided cooling to maximize thermal transfer in power systems, improving previous best thermal resistance by 80%.
MX
Applicable DirectFET Outline and Substrate Outline (see p.7,8 for details)
DirectFET
®
P-Channel Power MOSFET
l
Environmentaly Friendly Product
l
RoHs Compliant Containing no Lead,
no Bromide and no Halogen
l
Common-Drain P-Channel MOSFETs Provides
High Level of Integration and Very Low RDS(on)
Fig 1. Typical On-Resistance vs. Gate Voltage
Fig 2. Typical Total Gate Charge vs Gate-to-Source Voltage
Features and Benefits
Applications
l
Isolation Switch for Input Power or Battery Application
l
High Side Switch for Inverter Applications
2
4
6
8
10
12
14
16
18
20
-VGS, Gate -to -Source Voltage (V)
0
2
4
6
8
10
12
T
yp
ic
al
R
D
S
(o
n)
(
m
Ω
)
ID = -22A
TJ = 25°C
TJ = 125°C
0
20
40
60
80 100 120 140 160 180
QG Total Gate Charge (nC)
0.0
2.0
4.0
6.0
8.0
10.0
12.0
14.0
-V
G
S
, G
at
e-
to
-S
ou
rc
e
V
ol
ta
ge
(
V
)
VDS= -24V
VDS= -15V
VDS= -6.0V
ID= -18A
V
DSS
V
GS
R
DS(on)
R
DS(on)
-30V max ±20V max 2.3mΩ@-10V 3.8mΩ@-4.5V
Q
g tot
Q
gd
Q
gs2
Q
rr
Q
oss
V
gs(th)
67nC
29nC
9.4nC
315nC
59nC
-1.8V
Absolute Maximum Ratings
Parameter
Units
V
DS
Drain-to-Source Voltage
V
GS
Gate-to-Source Voltage
I
D
@ T
A
= 25°C
Continuous Drain Current, V
GS
@ 10V
e
I
D
@ T
A
= 70°C
Continuous Drain Current, V
GS
@ 10V
e
I
D
@ T
C
= 25°C
Continuous Drain Current, V
GS
@ 10V
f
I
DM
Pulsed Drain Current
g
V
A
Max.
-17
-160
-180
±20
-30
-22
SQ
SX
ST
MQ
MX
MT
MP
MC
IRF9383MPbF
1
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D
D
G
S
S
Form
Quantity
IRF9383MTRPbF
DirectFET
®
Medium Can
Tape and Reel
4800
IRF9383MTR1PbF
DirectFET
®
Medium Can
Tape and Reel
1000
"TR1" suffix EOL notice #264
Orderable part number
Package Type
Standard Pack
Note
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2
IRF9383MPbF
Pulse width ≤ 400μs; duty cycle ≤ 2%.
Notes:
Static @ T
J
= 25°C (unless otherwise specified)
Parameter
Min. Typ. Max. Units
BV
DSS
Drain-to-Source Breakdown Voltage
-30
–––
–––
V
ΔΒV
DSS
/
ΔT
J
Breakdown Voltage Temp. Coefficient
––– 0.0159 –––
V/°C
R
DS(on)
Static Drain-to-Source On-Resistance
–––
2.3
2.9
–––
3.8
4.8
V
GS(th)
Gate Threshold Voltage
-1.3
-1.8
-2.4
V
ΔV
GS(th)
/ΔT
J
Gate Threshold Voltage Coefficient
–––
-5.9
––– mV/°C
I
DSS
Drain-to-Source Leakage Current
–––
–––
-1.0
–––
–––
-150
I
GSS
Gate-to-Source Forward Leakage
–––
–––
-100
Gate-to-Source Reverse Leakage
–––
–––
100
gfs
Forward Transconductance
56
–––
–––
S
Q
g
Total Gate Charge
–––
130
–––
Q
g
Total Gate Charge
–––
67
–––
Q
gs1
Pre- Vth Gate-to-Source Charge
–––
12
–––
V
DS
= -15V
Q
gs2
Post -Vth Gate-to-Source Charge
–––
9.4
–––
V
GS
= -4.5V
Q
gd
Gate-to-Drain Charge
–––
29
–––
I
D
= -18A
Q
godr
Gate Charge Overdrive
–––
16.6
–––
See Fig.15
Q
sw
Switch charge (Q
gs2
+ Q
gd
)
–––
38.4
–––
Q
oss
Output Charge
–––
59
–––
nC
R
G
Gate Resistance
–––
6.5
–––
Ω
t
d(on)
Turn-On Delay Time
–––
29
–––
t
r
Rise Time
–––
160
–––
t
d(off)
Turn-Off Delay Time
–––
115
–––
t
f
Fall Time
–––
110
–––
C
iss
Input Capacitance
–––
7305
–––
C
oss
Output Capacitance
–––
1780
–––
C
rss
Reverse Transfer Capacitance
–––
1030
–––
Diode Characteristics
Parameter
Min. Typ. Max. Units
I
S
Continuous Source Current
(Body Diode)
I
SM
Pulsed Source Current
(Body Diode)
g
V
SD
Diode Forward Voltage
–––
–––
-1.2
V
t
rr
Reverse Recovery Time
–––
52
78
ns
Q
rr
Reverse Recovery Charge
–––
315
470
nC
ns
pF
A
–––
–––
–––
–––
-114
-180
μA
m
Ω
nA
nC
di/dt = 500A/μs
h
T
J
= 25°C, I
S
= -18A, V
GS
= 0V
h
showing the
integral reverse
p-n junction diode.
V
GS
= -4.5V, I
D
= -18A
h
T
J
= 25°C, I
F
= -18A, ,V
DD
= -15V
V
GS
= 0V
V
DS
= -15V
I
D
= -18A
V
DD
= -15V, V
GS
= -4.5V
h
V
DS
= V
GS
, I
D
= -150μA
V
DS
= -24V, V
GS
= 0V
V
GS
= -20V
V
GS
= 20V
Conditions
V
GS
= 0V, I
D
= -250μA
Reference to 25°C, I
D
= -1.0mA
V
GS
= -10V, I
D
= -22A
h
V
DS
= -24V, V
GS
= 0V
V
DS
= -24V, V
GS
= 0V, T
J
= 125°C
MOSFET symbol
R
G
= 1.8
Ω
V
DS
= -10V, I
D
= -18A
Conditions
See Fig.17
ƒ = 1.0KHz
V
DS
= -15V, V
GS
= -10V, I
D
= -18A
G
D
S
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IRF9383MPbF
Fig 3. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient
R
θ
is measured at
T
J
of approximately 90°C.
Surface mounted on 1 in. square Cu
board (still air).
Mounted to a PCB with small
clip heatsink (still air)
Mounted on minimum footprint full size
board with metalized back and with small
clip heatsink (still air)
Used double sided cooling, mounting pad with large heatsink.
Mounted on minimum footprint full size board with metalized
back and with small clip heatsink.
Notes:
1E-006
1E-005
0.0001
0.001
0.01
0.1
1
10
100
1000
t1 , Rectangular Pulse Duration (sec)
0.0001
0.001
0.01
0.1
1
10
100
T
he
rm
al
R
es
po
ns
e
(
Z
th
JA
)
0.20
0.10
D = 0.50
0.02
0.01
0.05
SINGLE PULSE
( THERMAL RESPONSE )
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthja + Tc
Ri (°C/W)
τi (sec)
2.7194 0.0138004
23.1599 55.766563
10.2579 0.6520047
23.6469 7.7259631
τ
J
τ
J
τ
1
τ
1
τ
2
τ
2
τ
3
τ
3
R
1
R
1
R
2
R
2
R
3
R
3
Ci=
τi/Ri
Ci=
τi/Ri
τ
A
τ
A
τ
4
τ
4
R
4
R
4
Absolute Maximum Ratings
Parameter
Units
P
D
@T
A
= 25°C
Power Dissipation
e
P
D
@T
A
= 70°C
Power Dissipation
e
P
D
@T
C
= 25°C
Power Dissipation
f
T
P
Peak Soldering Temperature
T
J
Operating Junction and
T
STG
Storage Temperature Range
Thermal Resistance
Parameter
Typ.
Max.
Units
R
θJA
Junction-to-Ambient
e
–––
60
R
θJA
Junction-to-Ambient
i
12.5
–––
R
θJA
Junction-to-Ambient
j
20
–––
°C/W
R
θJC
Junction-to-Case
f,k
–––
1.1
R
θJ-PCB
Junction-to-PCB Mounted
1.0
–––
Linear Derating Factor
e
W/°C
W
°C
1.3
0.02
270
-40 to + 150
Max.
113
2.1
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IRF9383MPbF
Fig 5. Typical Output Characteristics
Fig 4. Typical Output Characteristics
Fig 6. Typical Transfer Characteristics
Fig 7. Normalized On-Resistance vs. Temperature
Fig 8. Typical Capacitance vs.Drain-to-Source Voltage
Fig 9. Typical On-Resistance vs.
Drain Current and Gate Voltage
0.1
1
10
100
-VDS, Drain-to-Source Voltage (V)
0.01
0.1
1
10
100
1000
-I
D
, D
ra
in
-t
o-
S
ou
rc
e
C
ur
re
nt
(
A
)
VGS
TOP
-10V
-5.0V
-4.5V
-3.5V
-3.25V
-3.0V
-2.75V
BOTTOM
-2.5V
≤60μs PULSE WIDTH
Tj = 25°C
-2.5V
0.1
1
10
100
-V DS, Drain-to-Source Voltage (V)
1
10
100
1000
-I D
, D
ra
in
-t
o-
S
ou
rc
e
C
ur
re
nt
(
A
)
-2.5V
≤60μs PULSE WIDTH
Tj = 150°C
VGS
TOP
-10V
-5.0V
-4.5V
-3.5V
-3.25V
-3.0V
-2.75V
BOTTOM
-2.5V
1
2
3
4
5
-VGS, Gate-to-Source Voltage (V)
1.0
10
100
1000
-I
D
, D
ra
in
-t
o-
S
ou
rc
e
C
ur
re
nt
(
A
)
TJ = 150°C
TJ = 25°C
TJ = -40°C
VDS = -15V
≤60μs PULSE WIDTH
-60 -40 -20 0 20 40 60 80 100 120 140 160
TJ , Junction Temperature (°C)
0.6
0.8
1.0
1.2
1.4
1.6
T
yp
ic
al
R
D
S
(o
n)
(
N
or
m
al
iz
ed
)
ID = -22A
VGS = -10V
VGS = -4.5V
1
10
100
-VDS, Drain-to-Source Voltage (V)
100
1000
10000
100000
C
, C
ap
ac
ita
nc
e(
pF
)
VGS = 0V, f = 1 MHZ
Ciss = Cgs + Cgd, C ds SHORTED
Crss = Cgd
Coss = Cds + Cgd
Coss
Crss
Ciss
0
20
40
60
80 100 120 140 160 180
-ID, Drain Current (A)
2
4
6
8
10
12
T
yp
ic
al
R
D
S
(o
n)
(
m
Ω
)
TJ = 25°C
Vgs = -3.5V
Vgs = -4.5V
Vgs = -5.0V
Vgs = -6.0V
Vgs = -8.0V
Vgs = -10V
Vgs = -12V
Vgs = -15V
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IRF9383MPbF
Fig 13. Typical Threshold Voltage vs. Junction
Temperature
Fig 12. Maximum Drain Current vs. Case Temperature
Fig 10. Typical Source-Drain Diode Forward Voltage
Fig 11. Maximum Safe Operating Area
Fig 14. Maximum Avalanche Energy vs. Drain Current
0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2
-VSD, Source-to-Drain Voltage (V)
0
1
10
100
1000
-I
S
D
, R
ev
er
se
D
ra
in
C
ur
re
nt
(
A
)
TJ = 150°C
TJ = 25°C
TJ = -40°C
VGS = 0V
25
50
75
100
125
150
TC , Case Temperature (°C)
0
5
10
15
20
25
-I
D
,
D
ra
in
C
ur
re
nt
(
A
)
-75 -50 -25
0
25
50
75 100 125 150
TJ , Temperature ( °C )
1.0
1.2
1.4
1.6
1.8
2.0
2.2
2.4
2.6
-T
yp
ic
al
V
G
S
(t
h)
G
at
e
th
re
sh
ol
d
V
ol
ta
ge
(
V
)
ID = -150μA
ID = -250μA
ID = -1.0mA
ID = -1.0A
25
50
75
100
125
150
Starting TJ , Junction Temperature (°C)
0
500
1000
1500
2000
2500
E
A
S
,
S
in
gl
e
P
ul
se
A
va
la
nc
he
E
ne
rg
y
(m
J)
ID
TOP -1.6A
-2.3A
BOTTOM -18A
0.01
0.1
1
10
100
-VDS, Drain-to-Source Voltage (V)
0.01
0.1
1
10
100
1000
-I
D
,
D
ra
in
-t
o-
S
ou
rc
e
C
ur
re
nt
(
A
)
Tc = 25°C
Tj = 150°C
Single Pulse
1msec
10msec
OPERATION IN THIS AREA
LIMITED BY R DS(on)
100μsec
DC
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6
IRF9383MPbF
Fig 17a. Gate Charge Test Circuit
Fig 17b. Gate Charge Waveform
Fig 18b. Unclamped Inductive Waveforms
Fig 18a. Unclamped Inductive Test Circuit
Fig 19b. Switching Time Waveforms
Fig 19a. Switching Time Test Circuit
Vds
Vgs
Id
Vgs(th)
Qgs1
Qgs2
Qgd
Qgodr
1K
VCC
DUT
0
L
S
20K
S
RG
IAS
0.01Ω
tp
D.U.T
L
V
DS
VDD
DRIVER
A
15V
-20V
-V
GS
V
DS
-V
GS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
R
D
V
GS
V
DD
R
G
D.U.T.
+
-
tp
V
(BR)DSS
I
AS
V
DS
90%
10%
V
GS
t
d(on)
t
r
t
d(off)
t
f
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IRF9383MPbF
DirectFET
®
Board Footprint, MX Outline
(Medium Size Can, X-Designation).
Please see DirectFET
®
application note AN-1035 for all details regarding the assembly of DirectFET
®
.
This includes all recommendations for stencil and substrate designs.
*
Reverse Polarity of D.U.T for P-Channel
P.W.
Period
di/dt
Diode Recovery
dv/dt
Ripple
≤ 5%
Body Diode
Forward Drop
Re-Applied
Voltage
Reverse
Recovery
Current
Body Diode Forward
Current
V
GS
=10V
V
DD
I
SD
Driver Gate Drive
D.U.T. I
SD
Waveform
D.U.T. V
DS
Waveform
Inductor Curent
D =
P.W.
Period
*
V
GS
= 5V for Logic Level Devices
*
Inductor Current
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
• di/dt controlled by R
G
• Driver same type as D.U.T.
• I
SD
controlled by Duty Factor "D"
• D.U.T. - Device Under Test
+
-
+
+
+
-
-
-
R
G
V
DD
D.U.T
*
Fig 20.
Diode Reverse Recovery Test Circuit for P-Channel HEXFET
®
Power MOSFETs
G
S
G=GATE
D=DRAIN
S=SOURCE
S
D
D
D
D
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IRF9383MPbF
DirectFET
®
Outline Dimension, MX Outline
(Medium Size Can, X-Designation).
Please see DirectFET
®
application note AN-1035 for all details regarding the assembly of DirectFET
®
. This includes
all recommendations for stencil and substrate designs.
DirectFET
®
Part Marking
CODE
A
B
C
D
E
F
G
H
J
K
L
M
P
0.017
0.028
0.007
0.040
0.095
0.156
0.028
0.018
0.028
MAX
0.250
0.38
0.59
0.08
0.88
2.28
3.85
0.68
0.35
0.68
MIN
6.25
4.80
0.42
0.70
0.17
1.02
2.42
3.95
0.72
0.45
0.72
MAX
6.35
5.05
0.015
0.023
0.003
0.090
0.035
0.152
0.027
0.027
0.014
MIN
0.189
0.246
METRIC
IMPERIAL
DIMENSIONS
1.38
1.42
0.80
0.84
0.056
0.054
0.033
0.031
R
0.03
0.08
0.001
0.003
Dimensions are shown in
millimeters (inches)
0.199
GATE MARKING
PART NUMBER
LOGO
BATCH NUMBER
DATE CODE
Line above the last character of
the date code indicates "Lead-Free"
Note: For the most current drawing please refer to IR website at
http://www.irf.com/package/
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IRF9383MPbF
DirectFET
®
Tape & Reel Dimension (Showing component orientation).
LOADED TAPE FEED DIRECTION
NOTE: CONTROLLING
DIMENSIONS IN MM
CODE
A
B
C
D
E
F
G
H
IMPERIAL
MIN
0.311
0.154
0.469
0.215
0.201
0.256
0.059
0.059
MAX
8.10
4.10
12.30
5.55
5.30
6.70
N.C
1.60
MIN
7.90
3.90
11.90
5.45
5.10
6.50
1.50
1.50
METRIC
DIMENSIONS
MAX
0.319
0.161
0.484
0.219
0.209
0.264
N.C
0.063
NOTE: Controlling dimensions in mm
Std reel quantity is 4800 parts. (ordered as IRF9383MTRPBF). For 1000 parts on 7"
reel, order IRF9383MTR1PBF
CODE
MIN
MAX
MIN
MAX
A
330
N.C
12.992
N.C
B
20.2
N.C
0.795
N.C
C
12.8
13.2
0.504
0.520
D
1.5
N.C
0.059
N.C
E
100.0
N.C
3.937
N.C
F
N.C
18.4
N.C
0.724
G
12.4
14.4
0.488
0.567
H
11.9
15.4
0.469
0.606
METRIC
IMPERIAL
STANDARD OPTION (QTY 4800)
REEL DIMENSIONS
Note: For the most current drawing please refer to IR website at
http://www.irf.com/package/
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IRF9383MPbF
Qualification standards can be found at International Rectifier’s web site
http://www.irf.com/product-info/reliability
Higher qualification ratings may be available should the user have such requirements.
Please contact your International Rectifier sales representative for further information:
http://www.irf.com/whoto-call/salesrep/
Applicable version of JEDEC standard at the time of product release.
IR WORLD HEADQUARTERS: 101 N. Sepulveda Blvd., El Segundo, California 90245, USA
To contact International Rectifier, please visit
http://www.irf.com/whoto-call/
MSL1
(per JEDEC J-STD-020D
†††
)
RoHS Compliant
Qualification Information
†
Qualification level
Consumer
††
(per JEDEC JESD47F
†††
guidelines)
Yes
Moisture Sensitivity Level
DirectFET
®
Date
Comments
2/17/2014 •
Updated ordering information to reflect the End-Of-life (EOL) of the mini-reel option (EOL notice #264).
• Updated data sheet with new IR corporate template.
2/25/2014
• Change MSL3 to MSL1, on page 9.
• Updated schematics from "N-Channel" to "P-Channel" on page 1.
• Updated "IFX logo" on page 1 and page 10..
Revision History
6/2/2015
Typical values (unless otherwise specified)
Notes:
Click on this section to link to the appropriate technical paper.
Click on this section to link to the DirectFET
®
Website.
Surface mounted on 1 in. square Cu board, steady state.
T
C
measured with thermocouple mounted to top (Drain) of part.
Repetitive rating; pulse width limited by max. junction temperature.
DirectFET
ISOMETRIC
Description
The IRF9383MTRPbF combines the latest HEXFET
®
P-Channel Power MOSFET Silicon technology with the advanced DirectFET
®
packaging to achieve the lowest on-state resistance in a package that has the footprint of a SO-8 and only 0.6 mm profile. The DirectFET
®
package is compatible with existing layout geometries used in power applications, PCB assembly equipment and vapor phase, infra-red or
convection soldering techniques, when application note AN-1035 is followed regarding the manufacturing methods and processes. The DirectFET
®
package allows dual sided cooling to maximize thermal transfer in power systems, improving previous best thermal resistance by 80%.
MX
Applicable DirectFET Outline and Substrate Outline (see p.7,8 for details)
DirectFET
®
P-Channel Power MOSFET
l
Environmentaly Friendly Product
l
RoHs Compliant Containing no Lead,
no Bromide and no Halogen
l
Common-Drain P-Channel MOSFETs Provides
High Level of Integration and Very Low RDS(on)
Fig 1. Typical On-Resistance vs. Gate Voltage
Fig 2. Typical Total Gate Charge vs Gate-to-Source Voltage
Features and Benefits
Applications
l
Isolation Switch for Input Power or Battery Application
l
High Side Switch for Inverter Applications
2
4
6
8
10
12
14
16
18
20
-VGS, Gate -to -Source Voltage (V)
0
2
4
6
8
10
12
T
yp
ic
al
R
D
S
(o
n)
(
m
Ω
)
ID = -22A
TJ = 25°C
TJ = 125°C
0
20
40
60
80 100 120 140 160 180
QG Total Gate Charge (nC)
0.0
2.0
4.0
6.0
8.0
10.0
12.0
14.0
-V
G
S
, G
at
e-
to
-S
ou
rc
e
V
ol
ta
ge
(
V
)
VDS= -24V
VDS= -15V
VDS= -6.0V
ID= -18A
V
DSS
V
GS
R
DS(on)
R
DS(on)
-30V max ±20V max 2.3mΩ@-10V 3.8mΩ@-4.5V
Q
g tot
Q
gd
Q
gs2
Q
rr
Q
oss
V
gs(th)
67nC
29nC
9.4nC
315nC
59nC
-1.8V
Absolute Maximum Ratings
Parameter
Units
V
DS
Drain-to-Source Voltage
V
GS
Gate-to-Source Voltage
I
D
@ T
A
= 25°C
Continuous Drain Current, V
GS
@ 10V
e
I
D
@ T
A
= 70°C
Continuous Drain Current, V
GS
@ 10V
e
I
D
@ T
C
= 25°C
Continuous Drain Current, V
GS
@ 10V
f
I
DM
Pulsed Drain Current
g
V
A
Max.
-17
-160
-180
±20
-30
-22
SQ
SX
ST
MQ
MX
MT
MP
MC
IRF9383MPbF
1
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D
D
G
S
S
Form
Quantity
IRF9383MTRPbF
DirectFET
®
Medium Can
Tape and Reel
4800
IRF9383MTR1PbF
DirectFET
®
Medium Can
Tape and Reel
1000
"TR1" suffix EOL notice #264
Orderable part number
Package Type
Standard Pack
Note
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June 2, 2015
2
IRF9383MPbF
Pulse width ≤ 400μs; duty cycle ≤ 2%.
Notes:
Static @ T
J
= 25°C (unless otherwise specified)
Parameter
Min. Typ. Max. Units
BV
DSS
Drain-to-Source Breakdown Voltage
-30
–––
–––
V
ΔΒV
DSS
/
ΔT
J
Breakdown Voltage Temp. Coefficient
––– 0.0159 –––
V/°C
R
DS(on)
Static Drain-to-Source On-Resistance
–––
2.3
2.9
–––
3.8
4.8
V
GS(th)
Gate Threshold Voltage
-1.3
-1.8
-2.4
V
ΔV
GS(th)
/ΔT
J
Gate Threshold Voltage Coefficient
–––
-5.9
––– mV/°C
I
DSS
Drain-to-Source Leakage Current
–––
–––
-1.0
–––
–––
-150
I
GSS
Gate-to-Source Forward Leakage
–––
–––
-100
Gate-to-Source Reverse Leakage
–––
–––
100
gfs
Forward Transconductance
56
–––
–––
S
Q
g
Total Gate Charge
–––
130
–––
Q
g
Total Gate Charge
–––
67
–––
Q
gs1
Pre- Vth Gate-to-Source Charge
–––
12
–––
V
DS
= -15V
Q
gs2
Post -Vth Gate-to-Source Charge
–––
9.4
–––
V
GS
= -4.5V
Q
gd
Gate-to-Drain Charge
–––
29
–––
I
D
= -18A
Q
godr
Gate Charge Overdrive
–––
16.6
–––
See Fig.15
Q
sw
Switch charge (Q
gs2
+ Q
gd
)
–––
38.4
–––
Q
oss
Output Charge
–––
59
–––
nC
R
G
Gate Resistance
–––
6.5
–––
Ω
t
d(on)
Turn-On Delay Time
–––
29
–––
t
r
Rise Time
–––
160
–––
t
d(off)
Turn-Off Delay Time
–––
115
–––
t
f
Fall Time
–––
110
–––
C
iss
Input Capacitance
–––
7305
–––
C
oss
Output Capacitance
–––
1780
–––
C
rss
Reverse Transfer Capacitance
–––
1030
–––
Diode Characteristics
Parameter
Min. Typ. Max. Units
I
S
Continuous Source Current
(Body Diode)
I
SM
Pulsed Source Current
(Body Diode)
g
V
SD
Diode Forward Voltage
–––
–––
-1.2
V
t
rr
Reverse Recovery Time
–––
52
78
ns
Q
rr
Reverse Recovery Charge
–––
315
470
nC
ns
pF
A
–––
–––
–––
–––
-114
-180
μA
m
Ω
nA
nC
di/dt = 500A/μs
h
T
J
= 25°C, I
S
= -18A, V
GS
= 0V
h
showing the
integral reverse
p-n junction diode.
V
GS
= -4.5V, I
D
= -18A
h
T
J
= 25°C, I
F
= -18A, ,V
DD
= -15V
V
GS
= 0V
V
DS
= -15V
I
D
= -18A
V
DD
= -15V, V
GS
= -4.5V
h
V
DS
= V
GS
, I
D
= -150μA
V
DS
= -24V, V
GS
= 0V
V
GS
= -20V
V
GS
= 20V
Conditions
V
GS
= 0V, I
D
= -250μA
Reference to 25°C, I
D
= -1.0mA
V
GS
= -10V, I
D
= -22A
h
V
DS
= -24V, V
GS
= 0V
V
DS
= -24V, V
GS
= 0V, T
J
= 125°C
MOSFET symbol
R
G
= 1.8
Ω
V
DS
= -10V, I
D
= -18A
Conditions
See Fig.17
ƒ = 1.0KHz
V
DS
= -15V, V
GS
= -10V, I
D
= -18A
G
D
S
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IRF9383MPbF
Fig 3. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient
R
θ
is measured at
T
J
of approximately 90°C.
Surface mounted on 1 in. square Cu
board (still air).
Mounted to a PCB with small
clip heatsink (still air)
Mounted on minimum footprint full size
board with metalized back and with small
clip heatsink (still air)
Used double sided cooling, mounting pad with large heatsink.
Mounted on minimum footprint full size board with metalized
back and with small clip heatsink.
Notes:
1E-006
1E-005
0.0001
0.001
0.01
0.1
1
10
100
1000
t1 , Rectangular Pulse Duration (sec)
0.0001
0.001
0.01
0.1
1
10
100
T
he
rm
al
R
es
po
ns
e
(
Z
th
JA
)
0.20
0.10
D = 0.50
0.02
0.01
0.05
SINGLE PULSE
( THERMAL RESPONSE )
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthja + Tc
Ri (°C/W)
τi (sec)
2.7194 0.0138004
23.1599 55.766563
10.2579 0.6520047
23.6469 7.7259631
τ
J
τ
J
τ
1
τ
1
τ
2
τ
2
τ
3
τ
3
R
1
R
1
R
2
R
2
R
3
R
3
Ci=
τi/Ri
Ci=
τi/Ri
τ
A
τ
A
τ
4
τ
4
R
4
R
4
Absolute Maximum Ratings
Parameter
Units
P
D
@T
A
= 25°C
Power Dissipation
e
P
D
@T
A
= 70°C
Power Dissipation
e
P
D
@T
C
= 25°C
Power Dissipation
f
T
P
Peak Soldering Temperature
T
J
Operating Junction and
T
STG
Storage Temperature Range
Thermal Resistance
Parameter
Typ.
Max.
Units
R
θJA
Junction-to-Ambient
e
–––
60
R
θJA
Junction-to-Ambient
i
12.5
–––
R
θJA
Junction-to-Ambient
j
20
–––
°C/W
R
θJC
Junction-to-Case
f,k
–––
1.1
R
θJ-PCB
Junction-to-PCB Mounted
1.0
–––
Linear Derating Factor
e
W/°C
W
°C
1.3
0.02
270
-40 to + 150
Max.
113
2.1
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IRF9383MPbF
Fig 5. Typical Output Characteristics
Fig 4. Typical Output Characteristics
Fig 6. Typical Transfer Characteristics
Fig 7. Normalized On-Resistance vs. Temperature
Fig 8. Typical Capacitance vs.Drain-to-Source Voltage
Fig 9. Typical On-Resistance vs.
Drain Current and Gate Voltage
0.1
1
10
100
-VDS, Drain-to-Source Voltage (V)
0.01
0.1
1
10
100
1000
-I
D
, D
ra
in
-t
o-
S
ou
rc
e
C
ur
re
nt
(
A
)
VGS
TOP
-10V
-5.0V
-4.5V
-3.5V
-3.25V
-3.0V
-2.75V
BOTTOM
-2.5V
≤60μs PULSE WIDTH
Tj = 25°C
-2.5V
0.1
1
10
100
-V DS, Drain-to-Source Voltage (V)
1
10
100
1000
-I D
, D
ra
in
-t
o-
S
ou
rc
e
C
ur
re
nt
(
A
)
-2.5V
≤60μs PULSE WIDTH
Tj = 150°C
VGS
TOP
-10V
-5.0V
-4.5V
-3.5V
-3.25V
-3.0V
-2.75V
BOTTOM
-2.5V
1
2
3
4
5
-VGS, Gate-to-Source Voltage (V)
1.0
10
100
1000
-I
D
, D
ra
in
-t
o-
S
ou
rc
e
C
ur
re
nt
(
A
)
TJ = 150°C
TJ = 25°C
TJ = -40°C
VDS = -15V
≤60μs PULSE WIDTH
-60 -40 -20 0 20 40 60 80 100 120 140 160
TJ , Junction Temperature (°C)
0.6
0.8
1.0
1.2
1.4
1.6
T
yp
ic
al
R
D
S
(o
n)
(
N
or
m
al
iz
ed
)
ID = -22A
VGS = -10V
VGS = -4.5V
1
10
100
-VDS, Drain-to-Source Voltage (V)
100
1000
10000
100000
C
, C
ap
ac
ita
nc
e(
pF
)
VGS = 0V, f = 1 MHZ
Ciss = Cgs + Cgd, C ds SHORTED
Crss = Cgd
Coss = Cds + Cgd
Coss
Crss
Ciss
0
20
40
60
80 100 120 140 160 180
-ID, Drain Current (A)
2
4
6
8
10
12
T
yp
ic
al
R
D
S
(o
n)
(
m
Ω
)
TJ = 25°C
Vgs = -3.5V
Vgs = -4.5V
Vgs = -5.0V
Vgs = -6.0V
Vgs = -8.0V
Vgs = -10V
Vgs = -12V
Vgs = -15V
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IRF9383MPbF
Fig 13. Typical Threshold Voltage vs. Junction
Temperature
Fig 12. Maximum Drain Current vs. Case Temperature
Fig 10. Typical Source-Drain Diode Forward Voltage
Fig 11. Maximum Safe Operating Area
Fig 14. Maximum Avalanche Energy vs. Drain Current
0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2
-VSD, Source-to-Drain Voltage (V)
0
1
10
100
1000
-I
S
D
, R
ev
er
se
D
ra
in
C
ur
re
nt
(
A
)
TJ = 150°C
TJ = 25°C
TJ = -40°C
VGS = 0V
25
50
75
100
125
150
TC , Case Temperature (°C)
0
5
10
15
20
25
-I
D
,
D
ra
in
C
ur
re
nt
(
A
)
-75 -50 -25
0
25
50
75 100 125 150
TJ , Temperature ( °C )
1.0
1.2
1.4
1.6
1.8
2.0
2.2
2.4
2.6
-T
yp
ic
al
V
G
S
(t
h)
G
at
e
th
re
sh
ol
d
V
ol
ta
ge
(
V
)
ID = -150μA
ID = -250μA
ID = -1.0mA
ID = -1.0A
25
50
75
100
125
150
Starting TJ , Junction Temperature (°C)
0
500
1000
1500
2000
2500
E
A
S
,
S
in
gl
e
P
ul
se
A
va
la
nc
he
E
ne
rg
y
(m
J)
ID
TOP -1.6A
-2.3A
BOTTOM -18A
0.01
0.1
1
10
100
-VDS, Drain-to-Source Voltage (V)
0.01
0.1
1
10
100
1000
-I
D
,
D
ra
in
-t
o-
S
ou
rc
e
C
ur
re
nt
(
A
)
Tc = 25°C
Tj = 150°C
Single Pulse
1msec
10msec
OPERATION IN THIS AREA
LIMITED BY R DS(on)
100μsec
DC
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IRF9383MPbF
Fig 17a. Gate Charge Test Circuit
Fig 17b. Gate Charge Waveform
Fig 18b. Unclamped Inductive Waveforms
Fig 18a. Unclamped Inductive Test Circuit
Fig 19b. Switching Time Waveforms
Fig 19a. Switching Time Test Circuit
Vds
Vgs
Id
Vgs(th)
Qgs1
Qgs2
Qgd
Qgodr
1K
VCC
DUT
0
L
S
20K
S
RG
IAS
0.01Ω
tp
D.U.T
L
V
DS
VDD
DRIVER
A
15V
-20V
-V
GS
V
DS
-V
GS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
R
D
V
GS
V
DD
R
G
D.U.T.
+
-
tp
V
(BR)DSS
I
AS
V
DS
90%
10%
V
GS
t
d(on)
t
r
t
d(off)
t
f
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IRF9383MPbF
DirectFET
®
Board Footprint, MX Outline
(Medium Size Can, X-Designation).
Please see DirectFET
®
application note AN-1035 for all details regarding the assembly of DirectFET
®
.
This includes all recommendations for stencil and substrate designs.
*
Reverse Polarity of D.U.T for P-Channel
P.W.
Period
di/dt
Diode Recovery
dv/dt
Ripple
≤ 5%
Body Diode
Forward Drop
Re-Applied
Voltage
Reverse
Recovery
Current
Body Diode Forward
Current
V
GS
=10V
V
DD
I
SD
Driver Gate Drive
D.U.T. I
SD
Waveform
D.U.T. V
DS
Waveform
Inductor Curent
D =
P.W.
Period
*
V
GS
= 5V for Logic Level Devices
*
Inductor Current
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
• di/dt controlled by R
G
• Driver same type as D.U.T.
• I
SD
controlled by Duty Factor "D"
• D.U.T. - Device Under Test
+
-
+
+
+
-
-
-
R
G
V
DD
D.U.T
*
Fig 20.
Diode Reverse Recovery Test Circuit for P-Channel HEXFET
®
Power MOSFETs
G
S
G=GATE
D=DRAIN
S=SOURCE
S
D
D
D
D
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IRF9383MPbF
DirectFET
®
Outline Dimension, MX Outline
(Medium Size Can, X-Designation).
Please see DirectFET
®
application note AN-1035 for all details regarding the assembly of DirectFET
®
. This includes
all recommendations for stencil and substrate designs.
DirectFET
®
Part Marking
CODE
A
B
C
D
E
F
G
H
J
K
L
M
P
0.017
0.028
0.007
0.040
0.095
0.156
0.028
0.018
0.028
MAX
0.250
0.38
0.59
0.08
0.88
2.28
3.85
0.68
0.35
0.68
MIN
6.25
4.80
0.42
0.70
0.17
1.02
2.42
3.95
0.72
0.45
0.72
MAX
6.35
5.05
0.015
0.023
0.003
0.090
0.035
0.152
0.027
0.027
0.014
MIN
0.189
0.246
METRIC
IMPERIAL
DIMENSIONS
1.38
1.42
0.80
0.84
0.056
0.054
0.033
0.031
R
0.03
0.08
0.001
0.003
Dimensions are shown in
millimeters (inches)
0.199
GATE MARKING
PART NUMBER
LOGO
BATCH NUMBER
DATE CODE
Line above the last character of
the date code indicates "Lead-Free"
Note: For the most current drawing please refer to IR website at
http://www.irf.com/package/
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June 2, 2015
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IRF9383MPbF
DirectFET
®
Tape & Reel Dimension (Showing component orientation).
LOADED TAPE FEED DIRECTION
NOTE: CONTROLLING
DIMENSIONS IN MM
CODE
A
B
C
D
E
F
G
H
IMPERIAL
MIN
0.311
0.154
0.469
0.215
0.201
0.256
0.059
0.059
MAX
8.10
4.10
12.30
5.55
5.30
6.70
N.C
1.60
MIN
7.90
3.90
11.90
5.45
5.10
6.50
1.50
1.50
METRIC
DIMENSIONS
MAX
0.319
0.161
0.484
0.219
0.209
0.264
N.C
0.063
NOTE: Controlling dimensions in mm
Std reel quantity is 4800 parts. (ordered as IRF9383MTRPBF). For 1000 parts on 7"
reel, order IRF9383MTR1PBF
CODE
MIN
MAX
MIN
MAX
A
330
N.C
12.992
N.C
B
20.2
N.C
0.795
N.C
C
12.8
13.2
0.504
0.520
D
1.5
N.C
0.059
N.C
E
100.0
N.C
3.937
N.C
F
N.C
18.4
N.C
0.724
G
12.4
14.4
0.488
0.567
H
11.9
15.4
0.469
0.606
METRIC
IMPERIAL
STANDARD OPTION (QTY 4800)
REEL DIMENSIONS
Note: For the most current drawing please refer to IR website at
http://www.irf.com/package/
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June 2, 2015
10
IRF9383MPbF
Qualification standards can be found at International Rectifier’s web site
http://www.irf.com/product-info/reliability
Higher qualification ratings may be available should the user have such requirements.
Please contact your International Rectifier sales representative for further information:
http://www.irf.com/whoto-call/salesrep/
Applicable version of JEDEC standard at the time of product release.
IR WORLD HEADQUARTERS: 101 N. Sepulveda Blvd., El Segundo, California 90245, USA
To contact International Rectifier, please visit
http://www.irf.com/whoto-call/
MSL1
(per JEDEC J-STD-020D
†††
)
RoHS Compliant
Qualification Information
†
Qualification level
Consumer
††
(per JEDEC JESD47F
†††
guidelines)
Yes
Moisture Sensitivity Level
DirectFET
®
Date
Comments
2/17/2014 •
Updated ordering information to reflect the End-Of-life (EOL) of the mini-reel option (EOL notice #264).
• Updated data sheet with new IR corporate template.
2/25/2014
• Change MSL3 to MSL1, on page 9.
• Updated schematics from "N-Channel" to "P-Channel" on page 1.
• Updated "IFX logo" on page 1 and page 10..
Revision History
6/2/2015