IRF8327SPbF Product Datasheet

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DirectFET

®

 Power MOSFET ‚

Description

The IRF8327SPbF combines the latest HEXFET

®

 Power MOSFET Silicon technology with the advanced DirectFET

®

 packaging to achieve the

lowest on-state resistance in a package that has the footprint of a MICRO-8 and only 0.7 mm profile.  The DirectFET

®

 package is compatible

with existing layout geometries used in power applications, PCB assembly equipment and vapor phase, infra-red or convection soldering
techniques, when application note AN-1035 is followed regarding the manufacturing methods and processes. The DirectFET

®

 package allows

dual sided cooling to maximize thermal transfer in power systems, improving previous best thermal resistance by 80%.
The IRF8327SPbF balances both low resistance and low charge along with ultra low package inductance to reduce both conduction and
switching losses. The reduced total losses make this product ideal for high efficiency DC-DC converters that power the latest generation of
processors operating at higher frequencies.  The IRF8327SPbF has been optimized for parameters that are critical in synchronous buck
operating from 12 volt bus converters including Rds(on) and gate charge  to minimize losses.

Applicable DirectFET Outline and  Substrate Outline (see p.7,8 for details)



Fig 1.   Typical On-Resistance vs. Gate Voltage

Typical values (unless otherwise specified)

Fig 2.   Typical  Total Gate Charge vs. Gate-to-Source Voltage



 Click on this section to link to the appropriate technical paper. 

‚

 Click on this section to link to the DirectFET Website.

ƒ

 Surface mounted on 1 in. square Cu board, steady state.

„

 T

C

 measured with thermocouple mounted to top (Drain) of part.

…

 Repetitive rating;  pulse width limited by max. junction temperature.

†

 Starting T

= 25°C, L = 1.1mH, R

= 25

Ω, I

AS 

= 11A.

Notes:

DirectFET

®

 ISOMETRIC

SQ

l

 

RoHS Compliant and Halogen Free 



l

 

Low Profile (<0.7 mm)

l

 

Dual Sided Cooling Compatible 



l

 

Ultra Low Package Inductance

l

 

Optimized for High Frequency Switching 



l

Ideal for CPU Core DC-DC Converters

l

 

Optimized for Control FET application



l

 

Low Conduction and Switching Losses

l

 

Compatible with existing Surface Mount Techniques 



l

 

100% Rg tested 

SQ

SX

ST

MQ

MX

MT

MP

0

5

10

15

20

VGS, Gate -to -Source Voltage  (V)

0

5

10

15

20

25

T

yp

ic

al

 R

D

S

(o

n)

 (

m

Ω

)

ID = 14A

TJ = 25°C

TJ = 125°C

V

DSS

V

GS

R

DS(on) 

R

DS(on) 

30V max ±20V max 5.1mΩ@ 10V 8.5mΩ@ 4.5V

0

5

10

15

20

25

 QG  Total Gate Charge (nC)

0.0

2.0

4.0

6.0

8.0

10.0

12.0

14.0

V

G

S

, G

at

e-

to

-S

ou

rc

V

ol

ta

ge

 (

V

)

VDS= 24V

VDS= 15V

VDS= 6.0V

ID= 11A

Q

g  tot

Q

gd  

Q

gs2  

Q

rr  

Q

oss  

V

gs(th)  

9.2nC

3.0nC

1.2nC

19nC

7.9nC

1.9V

IRF8327SPbF

  

     

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Absolute Maximum Ratings

Parameter

Units

V

DS

Drain-to-Source Voltage

V

V

GS

Gate-to-Source Voltage

I

D

 @ T

A

 = 25°C  

Continuous Drain Current, V

GS

 @ 10V e

I

D

 @ T

A

 = 70°C

Continuous Drain Current, V

GS

 @ 10V e

A

I

D

 @ T

C

 = 25°C

Continuous Drain Current, V

GS

 @ 10V f

I

DM

Pulsed Drain Current g

E

AS

Single Pulse Avalanche Energy h

mJ

I

AR

Avalanche Currentg

A

11

Max.

11
60

110

 ±20

30

14

62

Form

Quantity

IRF8327STRPbF

DirectFET SQ

Tape and Reel

4800

"TR" suffix

IRF8327STR1PbF

DirectFET SQ

Tape and Reel

1000

"TR1" suffix EOL notice # 264

Note

Orderable part number

Package Type

Standard Pack

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             May 6, 2014

IRF8327SPbF

‡

 Pulse width ≤ 400μs; duty cycle ≤ 2%.

Notes:

Static @ T

J

 = 25°C (unless otherwise specified)

Parameter

Min. Typ. Max. Units

BV

DSS

Drain-to-Source Breakdown Voltage

30

–––

–––

V

ΔΒV

DSS

/

ΔT

Breakdown Voltage Temp. Coefficient

–––

22

––– mV/°C

R

DS(on)

Static Drain-to-Source On-Resistance

–––

5.1

7.3

–––

8.5

10.9

V

GS(th)

Gate Threshold Voltage

1.4

1.9

2.4

V

ΔV

GS(th)

/

ΔT

J

Gate Threshold Voltage Coefficient

–––

-6.3

––– mV/°C

I

DSS

Drain-to-Source Leakage Current

–––

–––

1.0

μA

–––

–––

150

I

GSS

Gate-to-Source Forward Leakage

–––

–––

100

nA

Gate-to-Source Reverse Leakage

–––

–––

-100

gfs

Forward Transconductance

25

–––

–––

S

Q

g

Total Gate Charge 

–––

9.2

14

Q

gs1

Pre-Vth Gate-to-Source Charge

–––

2.7

–––

Q

gs2

Post-Vth Gate-to-Source Charge

–––

1.2

–––

nC

Q

gd

Gate-to-Drain Charge

–––

3.0

–––

Q

godr

Gate Charge Overdrive

–––

2.3

–––

See Fig. 15

Q

sw

Switch Charge (Q

gs2

 + Q

gd

)

–––

4.2

–––

Q

oss

Output Charge

–––

7.9

–––

nC

R

G

Gate Resistance

–––

2.1

3.7

Ω

t

d(on)

Turn-On Delay Time

–––

7.8

–––

t

r

Rise Time

–––

8.9

–––

ns

t

d(off)

Turn-Off Delay Time

–––

9.3

–––

t

f

Fall Time

–––

5.3

–––

C

iss

Input Capacitance

–––

1430

–––

C

oss

Output Capacitance

–––

370

–––

pF

C

rss

Reverse Transfer Capacitance

–––

140

–––

Diode Characteristics

        Parameter

Min. Typ. Max. Units

I

S

Continuous Source Current 

–––

–––

52

(Body Diode)

A

I

SM

Pulsed Source Current

–––

–––

110

(Body Diode)

g

V

SD

Diode Forward Voltage

–––

0.80

1.0

V

t

rr

Reverse Recovery Time

–––

17

26

ns

Q

rr

Reverse Recovery Charge

–––

19

29

nC

di/dt = 230A/μs 

i

T

J

 = 25°C, I

S

 = 11A, V

GS

 = 0V 

i

showing  the
integral reverse
p-n junction diode.

V

GS

 = 4.5V, I

D

 = 11A 

i

V

DS

 = V

GS

, I

D

 = 25μA 

T

J

 = 25°C, I

F

 = 11A

V

GS

 = 4.5V 

I

D

 = 11A

V

GS

 = 0V

V

DS

 = 15V

I

D

 = 11A

V

DD

 = 15V, V

GS

 = 4.5V

i

Conditions

V

GS

 = 0V, I

D

 = 250μA

Reference to 25°C, I

D

 = 1mA 

V

GS

 = 10V, I

D

 = 14A 

i

V

GS

 = 20V

V

GS

 = -20V

V

DS

 = 24V, V

GS

 = 0V

V

DS

 = 15V

V

DS

 = 24V, V

GS

 = 0V, T

J

 = 125°C

MOSFET symbol

R

G

 = 1.8Ω

V

DS

 = 15V, I

D

 = 11A

Conditions

See Fig. 17

ƒ = 1.0MHz

V

DS

 = 16V, V

GS

 = 0V

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IRF8327SPbF

Fig 3.  Maximum Effective Transient Thermal Impedance, Junction-to-Ambient 

ƒ

ˆ

 Used double sided cooling , mounting pad with large heatsink.

‰

 Mounted on minimum footprint full size board with metalized

  back and with small clip heatsink.

Notes:

Š

  R

θ 

is measured at 

T

J

 of approximately 90°C.

 ƒ Surface mounted on 1 in. square Cu

     (still air).

‰ Mounted to a PCB with

small clip heatsink (still air)

 ‰ Mounted on minimum

footprint full size board with
metalized back and with small
clip heatsink (still air)

1E-006

1E-005

0.0001

0.001

0.01

0.1

1

10

100

1000

t1 , Rectangular Pulse Duration (sec)

0.001

0.01

0.1

1

10

100

T

he

rm

al

 R

es

po

ns

Z

 th

JA

 )

0.20
0.10

D = 0.50

0.02

0.01

0.05

SINGLE PULSE

( THERMAL RESPONSE )

Notes:

1. Duty Factor D = t1/t2

2. Peak Tj = P dm x Zthja + Tc

Ri (°C/W)   

 τi (sec)

5.276      0.00315
30.637    0.75858
22.090    36.9

τ

J

τ

J

τ

1

τ

1

τ

2

τ

2

τ

3

τ

3

R

1

R

1

R

2

R

2

R

3

R

3

Ci= 

τi/Ri

Ci= 

τi/Ri

τ

A

τ

A

Absolute Maximum Ratings

Parameter

Units

P

D

 @T

A

 = 25°C

Power Dissipation 

e

W

P

D

 @T

A

 = 70°C

Power Dissipation 

e

P

D

 @T

C

 = 25°C

Power Dissipation 

f

T

Peak Soldering Temperature

°C

T

Operating Junction and

T

STG

Storage Temperature Range

Thermal Resistance

Parameter

Typ.

Max.

Units

R

θJA 

Junction-to-Ambient  

el

–––

58

R

θJA 

Junction-to-Ambient  

jl

12.5

–––

R

θJA 

Junction-to-Ambient  

kl

20

–––

°C/W

R

θJC 

Junction-to-Case 

fl

–––

3.0

R

θJ-PCB 

Junction-to-PCB Mounted

1.0

–––

Linear Derating Factor 

e

W/°C

0.017

270

-40  to + 150

Max.

42

2.2
1.4

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IRF8327SPbF

Fig 5.  Typical Output Characteristics

Fig 4.  Typical Output Characteristics

Fig 6.  Typical Transfer Characteristics

Fig 7.  Normalized On-Resistance vs. Temperature

Fig 8.  Typical Capacitance vs.Drain-to-Source Voltage

Fig 9.   Typical On-Resistance vs.

 Drain Current and Gate Voltage

0.1

1

10

100

VDS, Drain-to-Source Voltage (V)

0.01

0.1

1

10

100

1000

I D

, D

ra

in

-t

o-

S

ou

rc

C

ur

re

nt

 (

A

)

VGS

TOP          

10V
5.0V

4.5V

4.0V

3.5V

3.0V

2.8V

BOTTOM

2.5V

≤60μs PULSE WIDTH

Tj = 25°C

2.5V

0.1

1

10

100

VDS, Drain-to-Source Voltage (V)

0.1

1

10

100

1000

I D

, D

ra

in

-t

o-

S

ou

rc

C

ur

re

nt

 (

A

)

2.5V

≤60μs PULSE WIDTH

Tj = 150°C

VGS

TOP          

10V
5.0V

4.5V

4.0V

3.5V

3.0V

2.8V

BOTTOM

2.5V

1.5

2.0

2.5

3.0

3.5

4.0

4.5

VGS, Gate-to-Source Voltage (V)

0.1

1

10

100

1000

I D

, D

ra

in

-t

o-

S

ou

rc

C

ur

re

nt

 (

A

)

TJ = 150°C

TJ = 25°C

TJ = -40°C

VDS = 15V
≤60μs PULSE WIDTH

-60 -40 -20 0 20 40 60 80 100 120 140 160

TJ , Junction Temperature (°C)

0.5

1.0

1.5

2.0

T

yp

ic

al

 R

D

S

(o

n)

 (

N

or

m

al

iz

ed

)

ID = 14A

VGS = 10V
VGS = 4.5V

1

10

100

VDS, Drain-to-Source Voltage (V)

100

1000

10000

C

, C

ap

ac

ita

nc

e(

pF

)

VGS   = 0V,       f = 1 MHZ

Ciss   = Cgs + Cgd,  C ds SHORTED
Crss   = Cgd 

Coss  = Cds + Cgd

Coss

Crss

Ciss

0

20

40

60

80

100

120

ID, Drain Current (A)

0

5

10

15

20

25

30

35

40

T

yp

ic

al

 R

D

S

(o

n)

 (

m

Ω

)

TJ = 25°C

Vgs = 3.5V 
Vgs = 4.0V 
Vgs = 4.5V 
Vgs = 5.0V
Vgs = 8.0V  
Vgs = 10V 

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Fig 13.  Typical Threshold Voltage vs. Junction

Temperature

Fig 12.  Maximum Drain Current vs. Case Temperature

Fig 10.  Typical Source-Drain Diode Forward Voltage

Fig11.  Maximum Safe Operating  Area

Fig 14.  Maximum Avalanche Energy vs. Drain Current

0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2

VSD, Source-to-Drain Voltage (V)

0

1

10

100

1000

I S

D

, R

ev

er

se

 D

ra

in

 C

ur

re

nt

 (

A

)

TJ = 150°C

TJ = 25°C

TJ = -40°C

VGS = 0V

25

50

75

100

125

150

 TC , Case Temperature (°C)

0

10

20

30

40

50

60

I D

,   

D

ra

in

 C

ur

re

nt

 (

A

)

-75 -50 -25

0

25

50

75 100 125 150

TJ , Temperature ( °C )

1.0

1.5

2.0

2.5

3.0

T

yp

ic

al

 V

G

S

(t

h)

 G

at

th

re

sh

ol

V

ol

ta

ge

 (

V

)

ID = 25μA

ID = 100μA

ID = 150μA

ID = 250μA

ID = 1.0mA

ID = 1.0A

0.01

0.10

1.00

10.00

100.00

VDS, Drain-to-Source Voltage (V)

0.01

0.1

1

10

100

1000

I D

,  

D

ra

in

-t

o-

S

ou

rc

C

ur

re

nt

 (

A

)

OPERATION IN THIS AREA 

LIMITED BY R DS(on)

TA = 25°C

TJ = 150°C

Single Pulse

100μsec

1msec

10msec

DC

25

50

75

100

125

150

Starting TJ , Junction Temperature (°C)

0

50

100

150

200

250

E

A

S

 , 

S

in

gl

P

ul

se

 A

va

la

nc

he

 E

ne

rg

(m

J)

ID

TOP      0.82A

1.0A

BOTTOM 11A

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IRF8327SPbF

Fig 15a.  Gate Charge Test Circuit

Fig 15b.   Gate Charge Waveform

Fig 16b.  Unclamped Inductive Waveforms

tp

V

(BR)DSS

I

AS

Fig 16a.  Unclamped Inductive Test Circuit

Fig 17b.  Switching Time Waveforms

Fig 17a.  Switching Time Test Circuit

R G

IAS

0.01

Ω

tp

D.U.T

L

VDS

+

- VDD

DRIVER

A

15V

20V

V

GS

Vds

Vgs

Id

Vgs(th)

Qgs1

Qgs2

Qgd

Qgodr

1K

VCC

DUT

0

L

S

20K

V

DS

90%

10%
V

GS

t

d(on)

t

r

t

d(off)

t

f

V

DS

Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %

R

D

V

GS

R

G

D.U.T.

V

GS

+

-

V

DD

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IRF8327SPbF

Fig 18. 

 Diode Reverse Recovery Test Circuit for HEXFET

®

 Power MOSFETs

Circuit Layout Considerations

   •  Low Stray Inductance

   •  Ground Plane

   •  Low Leakage Inductance

      Current Transformer

P.W.

Period

di/dt

Diode Recovery

dv/dt

Ripple 

≤ 5%

Body Diode  Forward Drop

Re-Applied

Voltage

Reverse

Recovery

Current

Body Diode Forward

Current

V

GS

=10V

V

DD

I

SD

Driver Gate Drive

D.U.T. I

SD

Waveform

D.U.T. V

DS

Waveform

Inductor Curent

D = 

P.W.

Period

***

 V

GS

 = 5V for Logic Level Devices

***

+

-

+

+

+

-

-

-

ƒ

„

‚

R

G

V

DD

•  dv/dt controlled by R

G

•  Driver same type as D.U.T.

•  I

SD

 controlled by Duty Factor "D"

•  D.U.T. - Device Under Test

D.U.T



**

*

*

 Use P-Channel Driver for P-Channel Measurements

**

 Reverse Polarity for P-Channel

DirectFET

®

 

 Board Footprint, SQ Outline

(Small Size Can, Q-Designation).

Please see DirectFET application note AN-1035 for all details regarding the assembly of DirectFET.
This includes all recommendations for stencil and  substrate designs.

G = GATE

D = DRAIN

S = SOURCE

D

D

D

D

G

S

Note: For the most current drawing please refer to IR website at: 

http://www.irf.com/package/

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IRF8327SPbF

DirectFET

® 

Part Marking

DirectFET

®

 

 Outline Dimension, SQ Outline

(Small Size Can, Q-Designation).

Please see DirectFET application note AN-1035 for all details regarding the assembly of DirectFET. This includes

all recommendations for stencil and  substrate designs.

CODE

A
B

C
D

E
F

G

H

J

K

L

M

R

P

N/A

0.0031

0.007

0.038
0.083

0.112

0.032

0.018
0.020

MAX

0.191
0.156

N/A

0.020

0.08

0.93
2.00

2.75

0.78

0.35
0.48

MIN

4.75
3.70

N/A

0.080

0.17

0.97
2.10

2.85

0.82

0.45
0.52

MAX

4.85
3.95

N/A

0.003

0.0008

0.079

0.037

0.108

0.031

0.019

0.014

MIN

0.146

0.187

METRIC

IMPERIAL

DIMENSIONS

0.88

0.92

0.036

0.035

0.032

0.78

0.82

0.031

Dimensions are shown in
millimeters (inches)

0.028

0.59

0.70

0.023

GATE MARKING

PART NUMBER

LOGO

BATCH NUMBER

DATE CODE

Line above the last character of

the date code indicates "Lead-Free"

Note: For the most current drawing please refer to IR website at: 

http://www.irf.com/package/

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             May 6, 2014

IRF8327SPbF

DirectFET

®

 

 Tape & Reel Dimension (Showing component orientation).

LOADED TAPE FEED DIRECTION

A

E

NOTE: CONTROLLING
DIMENSIONS IN MM

CODE

 A

 B

 C
 D

 E
 F

 G

 H

F

B

C

IMPERIAL

 MIN

0.311

0.154
0.469
0.215
0.158
0.197
0.059
0.059

 MAX

 8.10
 4.10

12.30

 5.55
 4.20
 5.20

 N.C

 1.60

 MIN

 7.90
 3.90

11.90

 5.45
 4.00
 5.00
 1.50
 1.50

METRIC

DIMENSIONS

 MAX

0.319

0.161

0.484
0.219
0.165
0.205

 N.C

0.063

D

H

G

Note: For the most current drawing please refer to IR website at: 

http://www.irf.com/package/

REEL DIMENSIONS

NOTE: Controlling dimensions in mm Std reel

quantity is 4800 parts. (ordered as IRF8327SPBF). 

B

C

 MAX

 N.C
 N.C

0.520

 N.C
 N.C

0.724
0.567
0.606

IMPERIAL

H

 MIN

330.0

 20.2
 12.8

  1.5

100.0

  N.C
 12.4
 11.9

STANDARD OPTION (QTY 4800)

CODE

  A
  B
  C
  D
  E
  F
  G
  H

 MAX

 N.C
 N.C

 13.2

 N.C
 N.C

 18.4
 14.4
 15.4

 MIN

12.992

0.795
0.504
0.059
3.937
 N.C
0.488
0.469

METRIC

G

E

F

A

D

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IRF8327SPbF

MSL

1

(per JEDEC J-STD-020D

†††

)

RoHS Compliant

Yes

Moisture Sensitivity Level

DFET

Comments: This family of products has passed JEDEC’s Industrial 
qualification. IR’s Consumer qualification level is granted by extension of 
the higher Industrial level.

Qualification Information

Qualification level

Consumer

 ††

(per JEDEC JESD47F

†††

 guidelines) 

†

Qualification standards can be found at International Rectifier’s web site

http://www.irf.com/product-info/reliability

††

 Higher qualification ratings may be available should the user have such requirements.
Please contact your International Rectifier sales representative for further information:

http://www.irf.com/whoto-call/salesrep/

†††

Applicable version of JEDEC standard at the time of product release.

IR WORLD HEADQUARTERS: 101 N. Sepulveda Blvd., El Segundo, California 90245, USA

To contact International Rectifier, please visit 

http://www.irf.com/whoto-call/

Date

Comments

• Updated ordering information to reflect the End-Of-life (EOL) of the mini-reel option  (EOL notice #264).
• Updated data sheet based on corporate template.

Revision History 

5/6/2014

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background image

DirectFET

®

 Power MOSFET ‚

Description

The IRF8327SPbF combines the latest HEXFET

®

 Power MOSFET Silicon technology with the advanced DirectFET

®

 packaging to achieve the

lowest on-state resistance in a package that has the footprint of a MICRO-8 and only 0.7 mm profile.  The DirectFET

®

 package is compatible

with existing layout geometries used in power applications, PCB assembly equipment and vapor phase, infra-red or convection soldering
techniques, when application note AN-1035 is followed regarding the manufacturing methods and processes. The DirectFET

®

 package allows

dual sided cooling to maximize thermal transfer in power systems, improving previous best thermal resistance by 80%.
The IRF8327SPbF balances both low resistance and low charge along with ultra low package inductance to reduce both conduction and
switching losses. The reduced total losses make this product ideal for high efficiency DC-DC converters that power the latest generation of
processors operating at higher frequencies.  The IRF8327SPbF has been optimized for parameters that are critical in synchronous buck
operating from 12 volt bus converters including Rds(on) and gate charge  to minimize losses.

Applicable DirectFET Outline and  Substrate Outline (see p.7,8 for details)



Fig 1.   Typical On-Resistance vs. Gate Voltage

Typical values (unless otherwise specified)

Fig 2.   Typical  Total Gate Charge vs. Gate-to-Source Voltage



 Click on this section to link to the appropriate technical paper. 

‚

 Click on this section to link to the DirectFET Website.

ƒ

 Surface mounted on 1 in. square Cu board, steady state.

„

 T

C

 measured with thermocouple mounted to top (Drain) of part.

…

 Repetitive rating;  pulse width limited by max. junction temperature.

†

 Starting T

= 25°C, L = 1.1mH, R

= 25

Ω, I

AS 

= 11A.

Notes:

DirectFET

®

 ISOMETRIC

SQ

l

 

RoHS Compliant and Halogen Free 



l

 

Low Profile (<0.7 mm)

l

 

Dual Sided Cooling Compatible 



l

 

Ultra Low Package Inductance

l

 

Optimized for High Frequency Switching 



l

Ideal for CPU Core DC-DC Converters

l

 

Optimized for Control FET application



l

 

Low Conduction and Switching Losses

l

 

Compatible with existing Surface Mount Techniques 



l

 

100% Rg tested 

SQ

SX

ST

MQ

MX

MT

MP

0

5

10

15

20

VGS, Gate -to -Source Voltage  (V)

0

5

10

15

20

25

T

yp

ic

al

 R

D

S

(o

n)

 (

m

Ω

)

ID = 14A

TJ = 25°C

TJ = 125°C

V

DSS

V

GS

R

DS(on) 

R

DS(on) 

30V max ±20V max 5.1mΩ@ 10V 8.5mΩ@ 4.5V

0

5

10

15

20

25

 QG  Total Gate Charge (nC)

0.0

2.0

4.0

6.0

8.0

10.0

12.0

14.0

V

G

S

, G

at

e-

to

-S

ou

rc

V

ol

ta

ge

 (

V

)

VDS= 24V

VDS= 15V

VDS= 6.0V

ID= 11A

Q

g  tot

Q

gd  

Q

gs2  

Q

rr  

Q

oss  

V

gs(th)  

9.2nC

3.0nC

1.2nC

19nC

7.9nC

1.9V

IRF8327SPbF

  

     

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Absolute Maximum Ratings

Parameter

Units

V

DS

Drain-to-Source Voltage

V

V

GS

Gate-to-Source Voltage

I

D

 @ T

A

 = 25°C  

Continuous Drain Current, V

GS

 @ 10V e

I

D

 @ T

A

 = 70°C

Continuous Drain Current, V

GS

 @ 10V e

A

I

D

 @ T

C

 = 25°C

Continuous Drain Current, V

GS

 @ 10V f

I

DM

Pulsed Drain Current g

E

AS

Single Pulse Avalanche Energy h

mJ

I

AR

Avalanche Currentg

A

11

Max.

11
60

110

 ±20

30

14

62

Form

Quantity

IRF8327STRPbF

DirectFET SQ

Tape and Reel

4800

"TR" suffix

IRF8327STR1PbF

DirectFET SQ

Tape and Reel

1000

"TR1" suffix EOL notice # 264

Note

Orderable part number

Package Type

Standard Pack

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IRF8327SPbF

‡

 Pulse width ≤ 400μs; duty cycle ≤ 2%.

Notes:

Static @ T

J

 = 25°C (unless otherwise specified)

Parameter

Min. Typ. Max. Units

BV

DSS

Drain-to-Source Breakdown Voltage

30

–––

–––

V

ΔΒV

DSS

/

ΔT

Breakdown Voltage Temp. Coefficient

–––

22

––– mV/°C

R

DS(on)

Static Drain-to-Source On-Resistance

–––

5.1

7.3

–––

8.5

10.9

V

GS(th)

Gate Threshold Voltage

1.4

1.9

2.4

V

ΔV

GS(th)

/

ΔT

J

Gate Threshold Voltage Coefficient

–––

-6.3

––– mV/°C

I

DSS

Drain-to-Source Leakage Current

–––

–––

1.0

μA

–––

–––

150

I

GSS

Gate-to-Source Forward Leakage

–––

–––

100

nA

Gate-to-Source Reverse Leakage

–––

–––

-100

gfs

Forward Transconductance

25

–––

–––

S

Q

g

Total Gate Charge 

–––

9.2

14

Q

gs1

Pre-Vth Gate-to-Source Charge

–––

2.7

–––

Q

gs2

Post-Vth Gate-to-Source Charge

–––

1.2

–––

nC

Q

gd

Gate-to-Drain Charge

–––

3.0

–––

Q

godr

Gate Charge Overdrive

–––

2.3

–––

See Fig. 15

Q

sw

Switch Charge (Q

gs2

 + Q

gd

)

–––

4.2

–––

Q

oss

Output Charge

–––

7.9

–––

nC

R

G

Gate Resistance

–––

2.1

3.7

Ω

t

d(on)

Turn-On Delay Time

–––

7.8

–––

t

r

Rise Time

–––

8.9

–––

ns

t

d(off)

Turn-Off Delay Time

–––

9.3

–––

t

f

Fall Time

–––

5.3

–––

C

iss

Input Capacitance

–––

1430

–––

C

oss

Output Capacitance

–––

370

–––

pF

C

rss

Reverse Transfer Capacitance

–––

140

–––

Diode Characteristics

        Parameter

Min. Typ. Max. Units

I

S

Continuous Source Current 

–––

–––

52

(Body Diode)

A

I

SM

Pulsed Source Current

–––

–––

110

(Body Diode)

g

V

SD

Diode Forward Voltage

–––

0.80

1.0

V

t

rr

Reverse Recovery Time

–––

17

26

ns

Q

rr

Reverse Recovery Charge

–––

19

29

nC

di/dt = 230A/μs 

i

T

J

 = 25°C, I

S

 = 11A, V

GS

 = 0V 

i

showing  the
integral reverse
p-n junction diode.

V

GS

 = 4.5V, I

D

 = 11A 

i

V

DS

 = V

GS

, I

D

 = 25μA 

T

J

 = 25°C, I

F

 = 11A

V

GS

 = 4.5V 

I

D

 = 11A

V

GS

 = 0V

V

DS

 = 15V

I

D

 = 11A

V

DD

 = 15V, V

GS

 = 4.5V

i

Conditions

V

GS

 = 0V, I

D

 = 250μA

Reference to 25°C, I

D

 = 1mA 

V

GS

 = 10V, I

D

 = 14A 

i

V

GS

 = 20V

V

GS

 = -20V

V

DS

 = 24V, V

GS

 = 0V

V

DS

 = 15V

V

DS

 = 24V, V

GS

 = 0V, T

J

 = 125°C

MOSFET symbol

R

G

 = 1.8Ω

V

DS

 = 15V, I

D

 = 11A

Conditions

See Fig. 17

ƒ = 1.0MHz

V

DS

 = 16V, V

GS

 = 0V

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IRF8327SPbF

Fig 3.  Maximum Effective Transient Thermal Impedance, Junction-to-Ambient 

ƒ

ˆ

 Used double sided cooling , mounting pad with large heatsink.

‰

 Mounted on minimum footprint full size board with metalized

  back and with small clip heatsink.

Notes:

Š

  R

θ 

is measured at 

T

J

 of approximately 90°C.

 ƒ Surface mounted on 1 in. square Cu

     (still air).

‰ Mounted to a PCB with

small clip heatsink (still air)

 ‰ Mounted on minimum

footprint full size board with
metalized back and with small
clip heatsink (still air)

1E-006

1E-005

0.0001

0.001

0.01

0.1

1

10

100

1000

t1 , Rectangular Pulse Duration (sec)

0.001

0.01

0.1

1

10

100

T

he

rm

al

 R

es

po

ns

Z

 th

JA

 )

0.20
0.10

D = 0.50

0.02

0.01

0.05

SINGLE PULSE

( THERMAL RESPONSE )

Notes:

1. Duty Factor D = t1/t2

2. Peak Tj = P dm x Zthja + Tc

Ri (°C/W)   

 τi (sec)

5.276      0.00315
30.637    0.75858
22.090    36.9

τ

J

τ

J

τ

1

τ

1

τ

2

τ

2

τ

3

τ

3

R

1

R

1

R

2

R

2

R

3

R

3

Ci= 

τi/Ri

Ci= 

τi/Ri

τ

A

τ

A

Absolute Maximum Ratings

Parameter

Units

P

D

 @T

A

 = 25°C

Power Dissipation 

e

W

P

D

 @T

A

 = 70°C

Power Dissipation 

e

P

D

 @T

C

 = 25°C

Power Dissipation 

f

T

Peak Soldering Temperature

°C

T

Operating Junction and

T

STG

Storage Temperature Range

Thermal Resistance

Parameter

Typ.

Max.

Units

R

θJA 

Junction-to-Ambient  

el

–––

58

R

θJA 

Junction-to-Ambient  

jl

12.5

–––

R

θJA 

Junction-to-Ambient  

kl

20

–––

°C/W

R

θJC 

Junction-to-Case 

fl

–––

3.0

R

θJ-PCB 

Junction-to-PCB Mounted

1.0

–––

Linear Derating Factor 

e

W/°C

0.017

270

-40  to + 150

Max.

42

2.2
1.4

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IRF8327SPbF

Fig 5.  Typical Output Characteristics

Fig 4.  Typical Output Characteristics

Fig 6.  Typical Transfer Characteristics

Fig 7.  Normalized On-Resistance vs. Temperature

Fig 8.  Typical Capacitance vs.Drain-to-Source Voltage

Fig 9.   Typical On-Resistance vs.

 Drain Current and Gate Voltage

0.1

1

10

100

VDS, Drain-to-Source Voltage (V)

0.01

0.1

1

10

100

1000

I D

, D

ra

in

-t

o-

S

ou

rc

C

ur

re

nt

 (

A

)

VGS

TOP          

10V
5.0V

4.5V

4.0V

3.5V

3.0V

2.8V

BOTTOM

2.5V

≤60μs PULSE WIDTH

Tj = 25°C

2.5V

0.1

1

10

100

VDS, Drain-to-Source Voltage (V)

0.1

1

10

100

1000

I D

, D

ra

in

-t

o-

S

ou

rc

C

ur

re

nt

 (

A

)

2.5V

≤60μs PULSE WIDTH

Tj = 150°C

VGS

TOP          

10V
5.0V

4.5V

4.0V

3.5V

3.0V

2.8V

BOTTOM

2.5V

1.5

2.0

2.5

3.0

3.5

4.0

4.5

VGS, Gate-to-Source Voltage (V)

0.1

1

10

100

1000

I D

, D

ra

in

-t

o-

S

ou

rc

C

ur

re

nt

 (

A

)

TJ = 150°C

TJ = 25°C

TJ = -40°C

VDS = 15V
≤60μs PULSE WIDTH

-60 -40 -20 0 20 40 60 80 100 120 140 160

TJ , Junction Temperature (°C)

0.5

1.0

1.5

2.0

T

yp

ic

al

 R

D

S

(o

n)

 (

N

or

m

al

iz

ed

)

ID = 14A

VGS = 10V
VGS = 4.5V

1

10

100

VDS, Drain-to-Source Voltage (V)

100

1000

10000

C

, C

ap

ac

ita

nc

e(

pF

)

VGS   = 0V,       f = 1 MHZ

Ciss   = Cgs + Cgd,  C ds SHORTED
Crss   = Cgd 

Coss  = Cds + Cgd

Coss

Crss

Ciss

0

20

40

60

80

100

120

ID, Drain Current (A)

0

5

10

15

20

25

30

35

40

T

yp

ic

al

 R

D

S

(o

n)

 (

m

Ω

)

TJ = 25°C

Vgs = 3.5V 
Vgs = 4.0V 
Vgs = 4.5V 
Vgs = 5.0V
Vgs = 8.0V  
Vgs = 10V 

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IRF8327SPbF

Fig 13.  Typical Threshold Voltage vs. Junction

Temperature

Fig 12.  Maximum Drain Current vs. Case Temperature

Fig 10.  Typical Source-Drain Diode Forward Voltage

Fig11.  Maximum Safe Operating  Area

Fig 14.  Maximum Avalanche Energy vs. Drain Current

0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2

VSD, Source-to-Drain Voltage (V)

0

1

10

100

1000

I S

D

, R

ev

er

se

 D

ra

in

 C

ur

re

nt

 (

A

)

TJ = 150°C

TJ = 25°C

TJ = -40°C

VGS = 0V

25

50

75

100

125

150

 TC , Case Temperature (°C)

0

10

20

30

40

50

60

I D

,   

D

ra

in

 C

ur

re

nt

 (

A

)

-75 -50 -25

0

25

50

75 100 125 150

TJ , Temperature ( °C )

1.0

1.5

2.0

2.5

3.0

T

yp

ic

al

 V

G

S

(t

h)

 G

at

th

re

sh

ol

V

ol

ta

ge

 (

V

)

ID = 25μA

ID = 100μA

ID = 150μA

ID = 250μA

ID = 1.0mA

ID = 1.0A

0.01

0.10

1.00

10.00

100.00

VDS, Drain-to-Source Voltage (V)

0.01

0.1

1

10

100

1000

I D

,  

D

ra

in

-t

o-

S

ou

rc

C

ur

re

nt

 (

A

)

OPERATION IN THIS AREA 

LIMITED BY R DS(on)

TA = 25°C

TJ = 150°C

Single Pulse

100μsec

1msec

10msec

DC

25

50

75

100

125

150

Starting TJ , Junction Temperature (°C)

0

50

100

150

200

250

E

A

S

 , 

S

in

gl

P

ul

se

 A

va

la

nc

he

 E

ne

rg

(m

J)

ID

TOP      0.82A

1.0A

BOTTOM 11A

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IRF8327SPbF

Fig 15a.  Gate Charge Test Circuit

Fig 15b.   Gate Charge Waveform

Fig 16b.  Unclamped Inductive Waveforms

tp

V

(BR)DSS

I

AS

Fig 16a.  Unclamped Inductive Test Circuit

Fig 17b.  Switching Time Waveforms

Fig 17a.  Switching Time Test Circuit

R G

IAS

0.01

Ω

tp

D.U.T

L

VDS

+

- VDD

DRIVER

A

15V

20V

V

GS

Vds

Vgs

Id

Vgs(th)

Qgs1

Qgs2

Qgd

Qgodr

1K

VCC

DUT

0

L

S

20K

V

DS

90%

10%
V

GS

t

d(on)

t

r

t

d(off)

t

f

V

DS

Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %

R

D

V

GS

R

G

D.U.T.

V

GS

+

-

V

DD

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             May 6, 2014

IRF8327SPbF

Fig 18. 

 Diode Reverse Recovery Test Circuit for HEXFET

®

 Power MOSFETs

Circuit Layout Considerations

   •  Low Stray Inductance

   •  Ground Plane

   •  Low Leakage Inductance

      Current Transformer

P.W.

Period

di/dt

Diode Recovery

dv/dt

Ripple 

≤ 5%

Body Diode  Forward Drop

Re-Applied

Voltage

Reverse

Recovery

Current

Body Diode Forward

Current

V

GS

=10V

V

DD

I

SD

Driver Gate Drive

D.U.T. I

SD

Waveform

D.U.T. V

DS

Waveform

Inductor Curent

D = 

P.W.

Period

***

 V

GS

 = 5V for Logic Level Devices

***

+

-

+

+

+

-

-

-

ƒ

„

‚

R

G

V

DD

•  dv/dt controlled by R

G

•  Driver same type as D.U.T.

•  I

SD

 controlled by Duty Factor "D"

•  D.U.T. - Device Under Test

D.U.T



**

*

*

 Use P-Channel Driver for P-Channel Measurements

**

 Reverse Polarity for P-Channel

DirectFET

®

 

 Board Footprint, SQ Outline

(Small Size Can, Q-Designation).

Please see DirectFET application note AN-1035 for all details regarding the assembly of DirectFET.
This includes all recommendations for stencil and  substrate designs.

G = GATE

D = DRAIN

S = SOURCE

D

D

D

D

G

S

Note: For the most current drawing please refer to IR website at: 

http://www.irf.com/package/

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             May 6, 2014

IRF8327SPbF

DirectFET

® 

Part Marking

DirectFET

®

 

 Outline Dimension, SQ Outline

(Small Size Can, Q-Designation).

Please see DirectFET application note AN-1035 for all details regarding the assembly of DirectFET. This includes

all recommendations for stencil and  substrate designs.

CODE

A
B

C
D

E
F

G

H

J

K

L

M

R

P

N/A

0.0031

0.007

0.038
0.083

0.112

0.032

0.018
0.020

MAX

0.191
0.156

N/A

0.020

0.08

0.93
2.00

2.75

0.78

0.35
0.48

MIN

4.75
3.70

N/A

0.080

0.17

0.97
2.10

2.85

0.82

0.45
0.52

MAX

4.85
3.95

N/A

0.003

0.0008

0.079

0.037

0.108

0.031

0.019

0.014

MIN

0.146

0.187

METRIC

IMPERIAL

DIMENSIONS

0.88

0.92

0.036

0.035

0.032

0.78

0.82

0.031

Dimensions are shown in
millimeters (inches)

0.028

0.59

0.70

0.023

GATE MARKING

PART NUMBER

LOGO

BATCH NUMBER

DATE CODE

Line above the last character of

the date code indicates "Lead-Free"

Note: For the most current drawing please refer to IR website at: 

http://www.irf.com/package/

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IRF8327SPbF

DirectFET

®

 

 Tape & Reel Dimension (Showing component orientation).

LOADED TAPE FEED DIRECTION

A

E

NOTE: CONTROLLING
DIMENSIONS IN MM

CODE

 A

 B

 C
 D

 E
 F

 G

 H

F

B

C

IMPERIAL

 MIN

0.311

0.154
0.469
0.215
0.158
0.197
0.059
0.059

 MAX

 8.10
 4.10

12.30

 5.55
 4.20
 5.20

 N.C

 1.60

 MIN

 7.90
 3.90

11.90

 5.45
 4.00
 5.00
 1.50
 1.50

METRIC

DIMENSIONS

 MAX

0.319

0.161

0.484
0.219
0.165
0.205

 N.C

0.063

D

H

G

Note: For the most current drawing please refer to IR website at: 

http://www.irf.com/package/

REEL DIMENSIONS

NOTE: Controlling dimensions in mm Std reel

quantity is 4800 parts. (ordered as IRF8327SPBF). 

B

C

 MAX

 N.C
 N.C

0.520

 N.C
 N.C

0.724
0.567
0.606

IMPERIAL

H

 MIN

330.0

 20.2
 12.8

  1.5

100.0

  N.C
 12.4
 11.9

STANDARD OPTION (QTY 4800)

CODE

  A
  B
  C
  D
  E
  F
  G
  H

 MAX

 N.C
 N.C

 13.2

 N.C
 N.C

 18.4
 14.4
 15.4

 MIN

12.992

0.795
0.504
0.059
3.937
 N.C
0.488
0.469

METRIC

G

E

F

A

D

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IRF8327SPbF

MSL

1

(per JEDEC J-STD-020D

†††

)

RoHS Compliant

Yes

Moisture Sensitivity Level

DFET

Comments: This family of products has passed JEDEC’s Industrial 
qualification. IR’s Consumer qualification level is granted by extension of 
the higher Industrial level.

Qualification Information

Qualification level

Consumer

 ††

(per JEDEC JESD47F

†††

 guidelines) 

†

Qualification standards can be found at International Rectifier’s web site

http://www.irf.com/product-info/reliability

††

 Higher qualification ratings may be available should the user have such requirements.
Please contact your International Rectifier sales representative for further information:

http://www.irf.com/whoto-call/salesrep/

†††

Applicable version of JEDEC standard at the time of product release.

IR WORLD HEADQUARTERS: 101 N. Sepulveda Blvd., El Segundo, California 90245, USA

To contact International Rectifier, please visit 

http://www.irf.com/whoto-call/

Date

Comments

• Updated ordering information to reflect the End-Of-life (EOL) of the mini-reel option  (EOL notice #264).
• Updated data sheet based on corporate template.

Revision History 

5/6/2014

Maker
Infineon Technologies