IRF7748L1TRPBF Product Datasheet

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        © 2012 International Rectifier  February 

18, 

2013 

Base part number 

Package Type 

Standard Pack 

Orderable Part Number 

 

 

Form 

Quantity 

  

IRF7748L1TRPbF 

DirectFET Large Can 

Tape and Reel 

4000 

IRF7748L1TRPbF 

 
Applications  


RoHS Compliant, Halogen Free 

 



Lead-Free (Qualified up to 260°C Reflow) 

 



Ideal for High Performance Isolated Converter  

     Primary Switch Socket 


Optimized for Synchronous Rectification 



Low Conduction Losses 



High Cdv/dt Immunity 



Low Profile (<0.7mm) 



Dual Sided Cooling Compatible 

 



Compatible with existing Surface Mount Techniques 

 



Industrial Qualified

 

DirectFET™ Power MOSFET

 

Fig 1.   Typical On-Resistance vs. Gate Voltage

 

DirectFET ISOMETRIC  

 

 

L6 

Ordering Information 

V

DSS 

V

GS 

R

DS(on)

  

60V min 

±20V max 

1.7m

@ 10V 

Q

g  tot 

Q

gd   

V

gs(th)   

146nC 40nC 

2.9V 

D

D

G

S

S

S

S

S

S

Applicable DirectFET Outline and  Substrate Outline 

 

SB 

SC 

  

  

M2  

M4 

  

L4 

L6 

L8 

  

Description 

The IRF7748L1TRPbF combines the latest HEXFET® Power MOSFET Silicon technology with the advanced DirectFETTM  packag-
ing to achieve the lowest on-state resistance in a package that has a footprint smaller than a D2PAK and only 0.7 mm profile.  The 
DirectFET package is compatible with existing layout geometries used in power applications, PCB assembly equipment and vapor 
phase, infra-red or convection soldering techniques, when 

application note AN-1035 

is followed regarding the manufacturing methods 

and processes. The DirectFET package allows dual sided cooling to maximize thermal transfer in power systems.   
The IRF7748L1TRPbF is optimized for high frequency switching and synchronous rectification applications. The reduced total losses 
in the device coupled with the high level of thermal performance enables high efficiency and low temperatures, which are key for sys-
tem reliability improvements, and makes this device ideal for high performance power converters. 

Absolute Maximum Ratings 

 

 

 

  

Parameter Max. 

Units 

V

DS 

Drain-to-Source Voltage 

60 

V     

V

GS 

Gate-to-Source Voltage 

 ±20 

I

D

 @ T

C

 = 25°C   

Continuous Drain Current, V

GS

 @ 10V (Silicon Limited) 148 

I

D

 @ T

C

 = 100°C 

Continuous Drain Current, V

GS

 @ 10V (Silicon Limited) 104 

      

I

D

 @ T

A

 = 25°C 

Continuous Drain Current, V

GS

 @ 10V (Silicon Limited) 28 

A  

I

DM 

Pulsed Drain Current 592 

 

E

AS 

Single Pulse Avalanche Energy  129 

mJ 

I

AR 

Avalanche Current  89 

Notes 

 Click on this section to link to the appropriate technical paper.  

 Click on this section to link to the DirectFET Website. 

 Surface mounted on 1 in. square Cu board, steady state.

 

 

 TC measured with thermocouple mounted to top (Drain) of part. 

 Repetitive rating;  pulse width limited by max. junction temperature. 

 Starting T

J

 = 25°C, L = 0.033mH, R

G

 = 50

, I

AS

 = 89A.  

0

25

50

75

100

125

150

175

200

ID, Drain Current (A)

1.0

1.5

2.0

2.5

3.0

T

yp

ic

al

  R

D

S

(o

n)

 

( m

V GS  = 7V

V GS  = 6V

V GS  = 10V

V GS  = 12V

Fig 2.   Typical On-Resistance vs. Drain Current 

 

2

4

6

8

10

12

14

16

18

20

V GS,  Gate -to -Source Voltage  (V)

0

2

4

6

8

R

D

S

(o

n

), 

 D

ra

in

-t

-S

o

ur

ce

 O

R

e

si

st

a

nc

(m

)

I D  = 89A

T J  = 25°C

T J  = 125°C

 

  

IRF7748L1TRPbF 

Typical values (unless otherwise specified) 

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IRF7748L1TRPbF 

Static @ T

J

 = 25°C (unless otherwise specified) 

  

Parameter Min. 

Typ. 

Max. 

Units 

Conditions 

BV

DSS 

Drain-to-Source Breakdown Voltage 

60 

–––  ––– 

V

GS

 = 0V, I

D

 = 250µA 

V

DSS

/

T

J  

Breakdown Voltage Temp. Coefficient 

–––  0.022  ––– 

V/°C  Reference to 25°C, I

D

 = 2mA  

R

DS(on) 

  

Static Drain-to-Source On-Resistance   

––– 

1.7 

2.2 

m

 V

GS

 = 10V, I

D

 = 89A 

V

GS(th) 

Gate Threshold Voltage 

2.0 

2.9 

4.0 

V

DS

 = V

GS

, I

D

 = 250µA 

I

DSS 

  

Drain-to-Source Leakage Current   

––– –––  20 

µA 

V

DS

 =60 V, V

GS

 = 0V 

––– ––– 250 

 

V

DS

 =60V,V

GS

 = 0V,T

J

 =125°C 

I

GSS 

  

Gate-to-Source Forward Leakage 

––– 

–––  100 

nA 

V

GS

 = 20V 

Gate-to-Source Reverse Leakage 

––– 

–––  -100 

V

GS

 = -20V 

gfs Forward 

Transconductance 

176 

––– 

––– 

V

DS

 = 10V, I

D

 =89A 

Q

Total Gate Charge  

––– 

146  220 

   

 

Q

gs1 

Pre– Vth Gate-to-Source Charge 

––– 

31 

–––   

V

DS

 = 30V 

Q

gs2 

Post– Vth Gate-to-Source Charge 

––– 

12 

––– 

nC 

V

GS

 = 10V 

Q

gd 

Gate-to-Drain Charge 

––– 

40 

–––   

I

D

 = 89A 

Q

godr 

Gate Charge Overdrive 

––– 

63 

–––   

See Fig.9 

Q

sw 

Switch Charge (Q

gs2 + 

Q

gd) 

––– 52 ––– 

 

 

Q

oss 

Output Charge 

––– 

82 

––– 

nC 

V

DS

 = 16V,V

GS

 = 0V 

R

Gate Resistance 

––– 

1.3 

––– 



 

t

d(on) 

Turn-On Delay Time 

––– 

19 

––– 

ns 

V

DD

 = 30V, V

GS

 = 10V 

t

Rise Time 

––– 

104  ––– 

I

D

 = 89A 

t

d(off) 

Turn-Off Delay Time 

––– 

54 

––– 

R

G

= 1.8



t

Fall Time 

––– 

77 

––– 

 

C

iss 

Input Capacitance 

–––  8075  ––– 

pF  

V

GS

 = 0V 

C

oss 

Output Capacitance 

–––  1150  ––– 

V

DS

 = 50V 

C

rss 

Reverse Transfer Capacitance 

––– 

540  ––– 

ƒ = 1.0MHz 

C

oss  

Output Capacitance  

–––  5390  ––– 

V

GS

=0V, V

DS

 = 1.0V,ƒ =1.0MHz 

C

oss  

Output Capacitance  

––– 

850  ––– 

V

GS

=0V, V

DS

 = 48V,ƒ =1.0MHz 

Diode Characteristics  

  

        Parameter 

Min.  Typ.  Max.  Units 

Conditions 

I

  

Continuous Source Current  

––– –––  85 

MOSFET symbol 

(Body Diode) 

showing  the 

I

SM 

  

Pulsed Source Current 

––– ––– 592 

integral reverse 

(Body Diode)

p-n junction diode. 

V

SD 

Diode Forward Voltage 

––– 

––– 

1.3 

T

J

 = 25°C,I

= 89A,V

GS

 = 0V 

t

rr  

Reverse Recovery Time  

––– 58 –––  ns   T

J

 = 25°C ,I

F

 = 89A,V

DD

 = 30V 

Q

rr  

Reverse Recovery Charge  

––– 113 –––  nC    di/dt = 100A/µs 

V

GS(th)

/

T

J  

Gate Threshold Voltage Temp. Coefficient 

–––   -9.9  –––  mV/°C   

Notes: 

 Repetitive rating;  pulse width limited by max. junction temperature. 

 Pulse width ≤ 400µs; duty cycle ≤ 2% 

 

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IRF7748L1TRPbF 

Notes: 
 

 Surface mounted on 1 in. square Cu board, steady state. 

 T

measured with thermocouple incontact with top (Drain) of part. 

 Repetitive rating;  pulse width limited by max. junction temperature.

 

Absolute Maximum Ratings 

 

 

 

Symbol Parameter 

Max. 

Units 

P

D

 @T

C

 = 25°C  Power Dissipation   

94 

 

P

D

 @T

C

 = 100°C  Power Dissipation   

47 

P

D

 @T

A

 = 25°C 

Power Dissipation   3.3 

 

T

Peak Soldering Temperature 

270 

 

T

J  

Operating Junction and 

-55  to + 175 

°C 

T

STG 

Storage Temperature Range 

  

Thermal Resistance 

 

 

 

Symbol Parameter Typ. 

Max. 

Units 

R

qJA

  

Junction-to-Ambient 

––– 45   

R

qJA

  

Junction-to-Ambient 

12.5 –––    

R

qJA

  

Junction-to-Ambient 

20 ––– 

°C/W 

R

qJC

  

Junction-to-Can 

––– 

1.6  

 

R

qJA-PCB

  

Junction-to-PCB Mounted 

––– 

0.5 

  

 Used double sided cooling, mounting pad with large heatsink.

 

 Mounted on minimum footprint full size board with metalized  

     back and with small clip heatsink. 

 R

 

is measured at T

J

 of approximately 90°C.

 

 Surface mounted on 1 in. square Cu  

     board  (still air). 

 Mounted on minimum footprint full size board with metalized 

     back and with small clip heatsink (still air) 

Fig 3.  Maximum Effec ve Transient Thermal Impedance, Junc on‐to‐Case  

1E-006

1E-005

0.0001

0.001

0.01

0.1

1

t1 , Rectangular Pulse Duration (sec)

0.001

0.01

0.1

1

10

T

he

rma

l R

es

po

ns

Z  

th

JC

 )

 °

C

/W

0.20

0.10

D = 0.50

0.02

0.01

0.05

SINGLE PULSE

( THERMAL RESPONSE )

Notes:

1. Duty Factor D = t1/t2

2. Peak Tj = P dm x Zthjc + Tc

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IRF7748L1TRPbF 

 

 

  

Fig 4.  Typical Output Characteristics 

Fig 7.  Normalized On-Resistance vs. Temperature 

Fig 8.  Typical Capacitance vs. Drain-to-Source Voltage 

Fig 9.  Typical Gate Charge vs. Gate-to-Source Voltage 

Fig 6.  Typical Transfer Characteristics 

Fig 5.  Typical Output Characteristics 

0.1

1

10

100

VDS, Drain-to-Source Voltage (V)

1

10

100

1000

I D

D

ra

in

-t

o-

S

ou

rc

C

ur

re

nt

 (

A

)

VGS

TOP           15V

10V

7.0V

6.0V

5.5V

5.0V

4.5V

BOTTOM

4.25V

60µs 

PULSE WIDTH

Tj = 25°C

4.25V

0.1

1

10

100

VDS, Drain-to-Source Voltage (V)

10

100

1000

I D

, D

ra

in

-t

o-

S

ou

rc

C

ur

re

nt

 (

A

)

4.25V

60µs 

PULSE WIDTH 

Tj = 175°C 

VGS

TOP           15V

10V

7.0V

6.0V

5.5V

5.0V

4.5V

BOTTOM

4.25V

2

3

4

5

6

7

VGS, Gate-to-Source Voltage (V)

0.1

1

10

100

1000

I D

, D

ra

in

-t

o-

S

ou

rc

C

ur

re

nt

 (A

)

TJ = 25°C

VDS = 25V

60µs PULSE WIDTH

TJ = 175°C

-60

-20

20

60

100

140

180

TJ , Junction Temperature (°C)

0.4

0.8

1.2

1.6

2.0

R

D

S

(o

n)

 , 

D

ra

in

-t

o-

S

ou

rc

O

R

es

is

ta

nc

   

   

   

   

   

   

   

 (

N

or

m

al

iz

ed

)

ID = 89A

VGS = 10V

1

10

100

VDS, Drain-to-Source Voltage (V)

100

1000

10000

100000

C

, C

ap

ac

ita

nc

(p

F

)

VGS   = 0V,       f = 1 MHZ

Ciss   = Cgs + Cgd,  Cds SHORTED
Crss   = Cgd 
Coss  = Cds + Cgd

Coss

Crss

Ciss

0

50

100

150

200

 QG,  Total Gate Charge (nC)

0

2

4

6

8

10

12

14

V

G

S

, G

at

e-

to

-S

ou

rc

V

ol

ta

ge

 (

V

)

VDS= 48V

VDS= 30V

VDS= 12V

ID= 89A

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IRF7748L1TRPbF 

Fig 11.  Maximum Safe Operating Area  

25

50

75

100

125

150

175

Starting TJ , Junction Temperature (°C)

0

100

200

300

400

500

600

E

A

S

 ,

 S

in

gl

P

ul

se

 A

va

la

nc

he

 E

ne

rg

(m

J)

ID

TOP         11.4A
                19.1A
BOTTOM    89A

Fig 14.  Maximum Avalanche Energy vs. Drain Current  

-75 -50 -25 0

25 50 75 100 125 150 175

TJ , Temperature ( °C )

0.5

1.0

1.5

2.0

2.5

3.0

3.5

4.0

4.5

V

G

S

(t

h)

,  

G

at

th

re

sh

ol

V

ol

ta

ge

 (

V

)

ID = 1.0A

ID = 10mA

ID = 1.0mA

ID = 250µA

Fig 13.  Typical Threshold Voltage vs. Junction Temperature 

Fig 10.  Typical Source-Drain Diode Forward Voltage 

25

50

75

100

125

150

175

 TC , Case Temperature (°C)

0

40

80

120

160

I D

,  

 D

ra

in

 C

ur

re

nt

 (

A

)

Fig 12.  Maximum Drain Current vs. Case Temperature 

0.2

0.4

0.6

0.8

1.0

1.2

1.4

VSD, Source-to-Drain Voltage (V)

0.1

1

10

100

1000

I S

D

, R

ev

er

se

 D

ra

in

 C

ur

re

nt

 (

A

)

TJ = 175°C

VGS = 0V

TJ = 25°C

0.1

1

10

100

VDS, Drain-to-Source Voltage (V)

0.1

1

10

100

1000

10000

I D

,  

D

ra

in

-t

o-

S

ou

rc

C

ur

re

nt

 (

A

)

Tc = 25°C

Tj = 175°C

Single Pulse

10msec

1msec

OPERATION IN THIS AREA 
LIMITED BY RDS(on)

100µsec

DC

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IRF7748L1TRPbF 

Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET

® 

Power MOSFETs 

25

50

75

100

125

150

175

Starting TJ , Junction Temperature (°C)

0

20

40

60

80

100

120

140

E

A

R

 ,

 A

va

la

nc

he

 E

ne

rg

(m

J)

TOP          Single Pulse                
BOTTOM   1.0% Duty Cycle
ID = 89A

Fig 15. Typical Avalanche Current vs. Pulse width

 

Notes on Repetitive Avalanche Curves , Figures 15, 16: 
(For further info, see 

AN-1005 

1.Avalanche failures assumption:  
   Purely a thermal phenomenon and failure occurs at a  
   temperature far in excess of T

jmax

. This is validated for every  

   part type. 
2. Safe operation in Avalanche is allowed as long asT

jmax

 is not  

   exceeded. 
3. Equation below based on circuit and waveforms shown in Figures  
    19a, 19b. 
4. P

D (ave) 

= Average power dissipation per single avalanche pulse. 

5. BV = Rated breakdown voltage (1.3 factor accounts for voltage 
    increase during avalanche). 
6. I

av

 = Allowable avalanche current. 

7. 

T = Allowable rise in junction temperature, not to exceed  

    T

jmax 

(assumed as 25°C in Figure 15, 16).  

     t

av

 = Average time in avalanche. 

     D = Duty cycle in avalanche =  tav ·f 
     Z

thJC

(D, t

av

) = Transient thermal resistance, see Figures 3) 

 

 

 

 

 

PD (ave) = 1/2 ( 1.3·BV·I

av

) = 

T/ Z

thJC

 

 

 

 

I

av

 = 2

T/ [1.3·BV·Z

th

 

 

 

E

AS (AR) 

= P

D (ave)·

t

av

  

Fig 16.

 Maximum Avalanche Energy vs. Temperature 

1.0E-06

1.0E-05

1.0E-04

1.0E-03

1.0E-02

1.0E-01

tav (sec)

0.1

1

10

100

1000

A

va

la

nc

he

 C

ur

re

nt

 (

A

)

Allowed avalanche Current vs avalanche 
pulsewidth, tav, assuming 



j = 25°C and 

Tstart = 150°C.

Allowed avalanche Current vs avalanche 
pulsewidth, tav, assuming 

Tj = 150°C and 

Tstart =25°C (Single Pulse)

0.10

0.01

0.05

Duty Cycle = Single Pulse

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IRF7748L1TRPbF 

Fig 19a.  Unclamped Inductive Test Circuit 

RG

I

AS

0.01

tp

D.U.T

L

VDS

+

- VDD

DRIVER

A

15V

20V

Fig 20a.  Switching Time Test Circuit 

Fig 18a.  Gate Charge Test Circuit 

tp

V

(BR)DSS

I

AS

Fig 19b.  Unclamped Inductive Waveforms 

Fig 20b.  Switching Time Waveforms 

Vds

Vgs

Id

Vgs(th)

Qgs1 Qgs2

Qgd

Qgodr

Fig 18b.   Gate Charge Waveform 

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IRF7748L1TRPbF 

Note: For the most current drawing please refer to IR website at 

http://www.irf.com/package/ 

DirectFET™Board Footprint, L6 Outline 

 

(Large Size Can, 6-Source Pads). 

Please see DirectFET application note 

AN-1035 

for all details regarding the assembly of DirectFET.  

This includes all recommendations for stencil and  substrate designs.

  

 

G = GATE
D = DRAIN
S = SOURCE

G

D

S

D

D

D

D

D

S

S

S

S

S

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background image

www.irf.com

        © 2012 International Rectifier  February 

18, 

2013 

 

IRF7748L1TRPbF 

DirectFET

®

  Outline Dimension, L6 Outline 

(Large Size Can, 6-Source Pads). 
 
Please see DirectFET application note 

AN-1035 

for all details regarding the assembly of DirectFET.  

This includes all recommendations for stencil and  substrate designs. 

DirectFET

® 

 Part Marking 

CODE

A
B
C
D
E
F

G
H

J

K

L

M

R

P

0.017

0.029

0.003

0.007

0.057
0.104

0.236

0.048

0.026
0.024

MAX

0.360
0.280

0.38

0.68

0.02

0.09

1.35
2.55

5.90

1.18

0.55
0.58

MIN

9.05
6.85

0.42

0.74

0.08

0.17

1.45
2.65

6.00

1.22

0.65
0.62

MAX

9.15
7.10

0.015

0.027
0.003
0.001

0.100

0.053

0.232

0.046

0.023

0.022

MIN

0.270

0.356

METRIC

IMPERIAL

DIMENSIONS

0.98

1.02

0.73

0.77

0.040

0.039

0.030

0.029

L1

0.159

3.95

4.05

0.155

L2

0.214

5.35

5.45

0.210

Dimensions are shown in
millimeters (inches)

GATE MARKING

PART NUMBER

LOGO

BATCH NUMBER

DATE CODE

Line above the last character of

the date code indicates "Lead-Free"

+

Note: For the most current drawing please refer to IR website at 

http://www.irf.com/package/ 

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background image

10 

www.irf.com

        © 2012 International Rectifier  February 

18, 

2013 

 

IRF7748L1TRPbF 

DirectFET

® 

 Tape & Reel Dimension (Showing component orientation).  

Qualification Information

† 

 

Qualification Level  

Industrial

†† 

*

 

 

Moisture Sensitivity Level  

DirectFET  

MSL1 

(per JEDEC J-STD-020D

†††)

 

RoHS Compliant 

Yes 

 

†        Qualification standards can be found at International Rectifier’s web site 

 

            

http://www.irf.com/product-info/reliability

 

††      Higher qualification ratings may be available should the user have such requirements. 
            Please contact your International Rectifier sales representative for further information:  

           http://www.irf.com/whoto-call/salesrep/

 

†††    Applicable version of JEDEC standard at the time of product release. 

*

 

Industrial qualification standards except autoclave test conditions

IR WORLD HEADQUARTERS: 101N Sepulveda Blvd, El Segundo, California 90245, USA 

To contact Interna onal Rec fier, please visit 

h p://www.irf.com/whoto‐call/

 

  

LOADED TAPE FEED DIRECTION

NOTE: CONTROLLING
DIMENSIONS IN MM

CODE

A
B

C
D
E

F

G
H

IMPERIAL

MIN

4.69

0.154
0.623

0.291

0.283
0.390
0.059
0.059

MAX

12.10

4.10

16.30

7.60
7.40

10.10

N.C

 1.60

MIN

11.90

3.90

15.90

7.40
7.20
9.90

1.50
1.50

METRIC

DIMENSIONS

MAX

0.476

0.161

0.642
0.299

0.291

0.398

N.C

0.063

+

NOTE:

Controlling dimensions in mm

Std reel quantity is 4000 parts. (ordered as IRF7748L1TRPBF).

REEL DIMENSIONS

MAX

N.C
N.C

0.520

N.C

3.940
0.880
0.720
0.760

IMPERIAL

MIN

330.00

20.20

12.80

1.50

99.00

N.C

16.40
15.90

STANDARD OPTION (QTY 4000)

CODE

  A
  B
  C
  D
  E

  F

  G

  H

MAX

N.C
N.C

13.20

N.C

100.00

22.40
18.40
19.40

MIN

12.992

0.795
0.504
0.059
3.900

N.C

0.650
0.630

METRIC

Note: For the most current drawing please refer to IR website at 

http://www.irf.com/package/ 

Date Comments 

2/13/13  TR1 option removed and Tape & Reel Info updated accordingly. Hyperlinks added throw-out the document 

Revision History  

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        © 2012 International Rectifier  February 

18, 

2013 

Base part number 

Package Type 

Standard Pack 

Orderable Part Number 

 

 

Form 

Quantity 

  

IRF7748L1TRPbF 

DirectFET Large Can 

Tape and Reel 

4000 

IRF7748L1TRPbF 

 
Applications  


RoHS Compliant, Halogen Free 

 



Lead-Free (Qualified up to 260°C Reflow) 

 



Ideal for High Performance Isolated Converter  

     Primary Switch Socket 


Optimized for Synchronous Rectification 



Low Conduction Losses 



High Cdv/dt Immunity 



Low Profile (<0.7mm) 



Dual Sided Cooling Compatible 

 



Compatible with existing Surface Mount Techniques 

 



Industrial Qualified

 

DirectFET™ Power MOSFET

 

Fig 1.   Typical On-Resistance vs. Gate Voltage

 

DirectFET ISOMETRIC  

 

 

L6 

Ordering Information 

V

DSS 

V

GS 

R

DS(on)

  

60V min 

±20V max 

1.7m

@ 10V 

Q

g  tot 

Q

gd   

V

gs(th)   

146nC 40nC 

2.9V 

D

D

G

S

S

S

S

S

S

Applicable DirectFET Outline and  Substrate Outline 

 

SB 

SC 

  

  

M2  

M4 

  

L4 

L6 

L8 

  

Description 

The IRF7748L1TRPbF combines the latest HEXFET® Power MOSFET Silicon technology with the advanced DirectFETTM  packag-
ing to achieve the lowest on-state resistance in a package that has a footprint smaller than a D2PAK and only 0.7 mm profile.  The 
DirectFET package is compatible with existing layout geometries used in power applications, PCB assembly equipment and vapor 
phase, infra-red or convection soldering techniques, when 

application note AN-1035 

is followed regarding the manufacturing methods 

and processes. The DirectFET package allows dual sided cooling to maximize thermal transfer in power systems.   
The IRF7748L1TRPbF is optimized for high frequency switching and synchronous rectification applications. The reduced total losses 
in the device coupled with the high level of thermal performance enables high efficiency and low temperatures, which are key for sys-
tem reliability improvements, and makes this device ideal for high performance power converters. 

Absolute Maximum Ratings 

 

 

 

  

Parameter Max. 

Units 

V

DS 

Drain-to-Source Voltage 

60 

V     

V

GS 

Gate-to-Source Voltage 

 ±20 

I

D

 @ T

C

 = 25°C   

Continuous Drain Current, V

GS

 @ 10V (Silicon Limited) 148 

I

D

 @ T

C

 = 100°C 

Continuous Drain Current, V

GS

 @ 10V (Silicon Limited) 104 

      

I

D

 @ T

A

 = 25°C 

Continuous Drain Current, V

GS

 @ 10V (Silicon Limited) 28 

A  

I

DM 

Pulsed Drain Current 592 

 

E

AS 

Single Pulse Avalanche Energy  129 

mJ 

I

AR 

Avalanche Current  89 

Notes 

 Click on this section to link to the appropriate technical paper.  

 Click on this section to link to the DirectFET Website. 

 Surface mounted on 1 in. square Cu board, steady state.

 

 

 TC measured with thermocouple mounted to top (Drain) of part. 

 Repetitive rating;  pulse width limited by max. junction temperature. 

 Starting T

J

 = 25°C, L = 0.033mH, R

G

 = 50

, I

AS

 = 89A.  

0

25

50

75

100

125

150

175

200

ID, Drain Current (A)

1.0

1.5

2.0

2.5

3.0

T

yp

ic

al

  R

D

S

(o

n)

 

( m

V GS  = 7V

V GS  = 6V

V GS  = 10V

V GS  = 12V

Fig 2.   Typical On-Resistance vs. Drain Current 

 

2

4

6

8

10

12

14

16

18

20

V GS,  Gate -to -Source Voltage  (V)

0

2

4

6

8

R

D

S

(o

n

), 

 D

ra

in

-t

-S

o

ur

ce

 O

R

e

si

st

a

nc

(m

)

I D  = 89A

T J  = 25°C

T J  = 125°C

 

  

IRF7748L1TRPbF 

Typical values (unless otherwise specified) 

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2013 

 

IRF7748L1TRPbF 

Static @ T

J

 = 25°C (unless otherwise specified) 

  

Parameter Min. 

Typ. 

Max. 

Units 

Conditions 

BV

DSS 

Drain-to-Source Breakdown Voltage 

60 

–––  ––– 

V

GS

 = 0V, I

D

 = 250µA 

V

DSS

/

T

J  

Breakdown Voltage Temp. Coefficient 

–––  0.022  ––– 

V/°C  Reference to 25°C, I

D

 = 2mA  

R

DS(on) 

  

Static Drain-to-Source On-Resistance   

––– 

1.7 

2.2 

m

 V

GS

 = 10V, I

D

 = 89A 

V

GS(th) 

Gate Threshold Voltage 

2.0 

2.9 

4.0 

V

DS

 = V

GS

, I

D

 = 250µA 

I

DSS 

  

Drain-to-Source Leakage Current   

––– –––  20 

µA 

V

DS

 =60 V, V

GS

 = 0V 

––– ––– 250 

 

V

DS

 =60V,V

GS

 = 0V,T

J

 =125°C 

I

GSS 

  

Gate-to-Source Forward Leakage 

––– 

–––  100 

nA 

V

GS

 = 20V 

Gate-to-Source Reverse Leakage 

––– 

–––  -100 

V

GS

 = -20V 

gfs Forward 

Transconductance 

176 

––– 

––– 

V

DS

 = 10V, I

D

 =89A 

Q

Total Gate Charge  

––– 

146  220 

   

 

Q

gs1 

Pre– Vth Gate-to-Source Charge 

––– 

31 

–––   

V

DS

 = 30V 

Q

gs2 

Post– Vth Gate-to-Source Charge 

––– 

12 

––– 

nC 

V

GS

 = 10V 

Q

gd 

Gate-to-Drain Charge 

––– 

40 

–––   

I

D

 = 89A 

Q

godr 

Gate Charge Overdrive 

––– 

63 

–––   

See Fig.9 

Q

sw 

Switch Charge (Q

gs2 + 

Q

gd) 

––– 52 ––– 

 

 

Q

oss 

Output Charge 

––– 

82 

––– 

nC 

V

DS

 = 16V,V

GS

 = 0V 

R

Gate Resistance 

––– 

1.3 

––– 



 

t

d(on) 

Turn-On Delay Time 

––– 

19 

––– 

ns 

V

DD

 = 30V, V

GS

 = 10V 

t

Rise Time 

––– 

104  ––– 

I

D

 = 89A 

t

d(off) 

Turn-Off Delay Time 

––– 

54 

––– 

R

G

= 1.8



t

Fall Time 

––– 

77 

––– 

 

C

iss 

Input Capacitance 

–––  8075  ––– 

pF  

V

GS

 = 0V 

C

oss 

Output Capacitance 

–––  1150  ––– 

V

DS

 = 50V 

C

rss 

Reverse Transfer Capacitance 

––– 

540  ––– 

ƒ = 1.0MHz 

C

oss  

Output Capacitance  

–––  5390  ––– 

V

GS

=0V, V

DS

 = 1.0V,ƒ =1.0MHz 

C

oss  

Output Capacitance  

––– 

850  ––– 

V

GS

=0V, V

DS

 = 48V,ƒ =1.0MHz 

Diode Characteristics  

  

        Parameter 

Min.  Typ.  Max.  Units 

Conditions 

I

  

Continuous Source Current  

––– –––  85 

MOSFET symbol 

(Body Diode) 

showing  the 

I

SM 

  

Pulsed Source Current 

––– ––– 592 

integral reverse 

(Body Diode)

p-n junction diode. 

V

SD 

Diode Forward Voltage 

––– 

––– 

1.3 

T

J

 = 25°C,I

= 89A,V

GS

 = 0V 

t

rr  

Reverse Recovery Time  

––– 58 –––  ns   T

J

 = 25°C ,I

F

 = 89A,V

DD

 = 30V 

Q

rr  

Reverse Recovery Charge  

––– 113 –––  nC    di/dt = 100A/µs 

V

GS(th)

/

T

J  

Gate Threshold Voltage Temp. Coefficient 

–––   -9.9  –––  mV/°C   

Notes: 

 Repetitive rating;  pulse width limited by max. junction temperature. 

 Pulse width ≤ 400µs; duty cycle ≤ 2% 

 

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18, 

2013 

 

IRF7748L1TRPbF 

Notes: 
 

 Surface mounted on 1 in. square Cu board, steady state. 

 T

measured with thermocouple incontact with top (Drain) of part. 

 Repetitive rating;  pulse width limited by max. junction temperature.

 

Absolute Maximum Ratings 

 

 

 

Symbol Parameter 

Max. 

Units 

P

D

 @T

C

 = 25°C  Power Dissipation   

94 

 

P

D

 @T

C

 = 100°C  Power Dissipation   

47 

P

D

 @T

A

 = 25°C 

Power Dissipation   3.3 

 

T

Peak Soldering Temperature 

270 

 

T

J  

Operating Junction and 

-55  to + 175 

°C 

T

STG 

Storage Temperature Range 

  

Thermal Resistance 

 

 

 

Symbol Parameter Typ. 

Max. 

Units 

R

qJA

  

Junction-to-Ambient 

––– 45   

R

qJA

  

Junction-to-Ambient 

12.5 –––    

R

qJA

  

Junction-to-Ambient 

20 ––– 

°C/W 

R

qJC

  

Junction-to-Can 

––– 

1.6  

 

R

qJA-PCB

  

Junction-to-PCB Mounted 

––– 

0.5 

  

 Used double sided cooling, mounting pad with large heatsink.

 

 Mounted on minimum footprint full size board with metalized  

     back and with small clip heatsink. 

 R

 

is measured at T

J

 of approximately 90°C.

 

 Surface mounted on 1 in. square Cu  

     board  (still air). 

 Mounted on minimum footprint full size board with metalized 

     back and with small clip heatsink (still air) 

Fig 3.  Maximum Effec ve Transient Thermal Impedance, Junc on‐to‐Case  

1E-006

1E-005

0.0001

0.001

0.01

0.1

1

t1 , Rectangular Pulse Duration (sec)

0.001

0.01

0.1

1

10

T

he

rma

l R

es

po

ns

Z  

th

JC

 )

 °

C

/W

0.20

0.10

D = 0.50

0.02

0.01

0.05

SINGLE PULSE

( THERMAL RESPONSE )

Notes:

1. Duty Factor D = t1/t2

2. Peak Tj = P dm x Zthjc + Tc

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2013 

 

IRF7748L1TRPbF 

 

 

  

Fig 4.  Typical Output Characteristics 

Fig 7.  Normalized On-Resistance vs. Temperature 

Fig 8.  Typical Capacitance vs. Drain-to-Source Voltage 

Fig 9.  Typical Gate Charge vs. Gate-to-Source Voltage 

Fig 6.  Typical Transfer Characteristics 

Fig 5.  Typical Output Characteristics 

0.1

1

10

100

VDS, Drain-to-Source Voltage (V)

1

10

100

1000

I D

D

ra

in

-t

o-

S

ou

rc

C

ur

re

nt

 (

A

)

VGS

TOP           15V

10V

7.0V

6.0V

5.5V

5.0V

4.5V

BOTTOM

4.25V

60µs 

PULSE WIDTH

Tj = 25°C

4.25V

0.1

1

10

100

VDS, Drain-to-Source Voltage (V)

10

100

1000

I D

, D

ra

in

-t

o-

S

ou

rc

C

ur

re

nt

 (

A

)

4.25V

60µs 

PULSE WIDTH 

Tj = 175°C 

VGS

TOP           15V

10V

7.0V

6.0V

5.5V

5.0V

4.5V

BOTTOM

4.25V

2

3

4

5

6

7

VGS, Gate-to-Source Voltage (V)

0.1

1

10

100

1000

I D

, D

ra

in

-t

o-

S

ou

rc

C

ur

re

nt

 (A

)

TJ = 25°C

VDS = 25V

60µs PULSE WIDTH

TJ = 175°C

-60

-20

20

60

100

140

180

TJ , Junction Temperature (°C)

0.4

0.8

1.2

1.6

2.0

R

D

S

(o

n)

 , 

D

ra

in

-t

o-

S

ou

rc

O

R

es

is

ta

nc

   

   

   

   

   

   

   

 (

N

or

m

al

iz

ed

)

ID = 89A

VGS = 10V

1

10

100

VDS, Drain-to-Source Voltage (V)

100

1000

10000

100000

C

, C

ap

ac

ita

nc

(p

F

)

VGS   = 0V,       f = 1 MHZ

Ciss   = Cgs + Cgd,  Cds SHORTED
Crss   = Cgd 
Coss  = Cds + Cgd

Coss

Crss

Ciss

0

50

100

150

200

 QG,  Total Gate Charge (nC)

0

2

4

6

8

10

12

14

V

G

S

, G

at

e-

to

-S

ou

rc

V

ol

ta

ge

 (

V

)

VDS= 48V

VDS= 30V

VDS= 12V

ID= 89A

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18, 

2013 

 

IRF7748L1TRPbF 

Fig 11.  Maximum Safe Operating Area  

25

50

75

100

125

150

175

Starting TJ , Junction Temperature (°C)

0

100

200

300

400

500

600

E

A

S

 ,

 S

in

gl

P

ul

se

 A

va

la

nc

he

 E

ne

rg

(m

J)

ID

TOP         11.4A
                19.1A
BOTTOM    89A

Fig 14.  Maximum Avalanche Energy vs. Drain Current  

-75 -50 -25 0

25 50 75 100 125 150 175

TJ , Temperature ( °C )

0.5

1.0

1.5

2.0

2.5

3.0

3.5

4.0

4.5

V

G

S

(t

h)

,  

G

at

th

re

sh

ol

V

ol

ta

ge

 (

V

)

ID = 1.0A

ID = 10mA

ID = 1.0mA

ID = 250µA

Fig 13.  Typical Threshold Voltage vs. Junction Temperature 

Fig 10.  Typical Source-Drain Diode Forward Voltage 

25

50

75

100

125

150

175

 TC , Case Temperature (°C)

0

40

80

120

160

I D

,  

 D

ra

in

 C

ur

re

nt

 (

A

)

Fig 12.  Maximum Drain Current vs. Case Temperature 

0.2

0.4

0.6

0.8

1.0

1.2

1.4

VSD, Source-to-Drain Voltage (V)

0.1

1

10

100

1000

I S

D

, R

ev

er

se

 D

ra

in

 C

ur

re

nt

 (

A

)

TJ = 175°C

VGS = 0V

TJ = 25°C

0.1

1

10

100

VDS, Drain-to-Source Voltage (V)

0.1

1

10

100

1000

10000

I D

,  

D

ra

in

-t

o-

S

ou

rc

C

ur

re

nt

 (

A

)

Tc = 25°C

Tj = 175°C

Single Pulse

10msec

1msec

OPERATION IN THIS AREA 
LIMITED BY RDS(on)

100µsec

DC

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background image

www.irf.com

        © 2012 International Rectifier  February 

18, 

2013 

 

IRF7748L1TRPbF 

Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET

® 

Power MOSFETs 

25

50

75

100

125

150

175

Starting TJ , Junction Temperature (°C)

0

20

40

60

80

100

120

140

E

A

R

 ,

 A

va

la

nc

he

 E

ne

rg

(m

J)

TOP          Single Pulse                
BOTTOM   1.0% Duty Cycle
ID = 89A

Fig 15. Typical Avalanche Current vs. Pulse width

 

Notes on Repetitive Avalanche Curves , Figures 15, 16: 
(For further info, see 

AN-1005 

1.Avalanche failures assumption:  
   Purely a thermal phenomenon and failure occurs at a  
   temperature far in excess of T

jmax

. This is validated for every  

   part type. 
2. Safe operation in Avalanche is allowed as long asT

jmax

 is not  

   exceeded. 
3. Equation below based on circuit and waveforms shown in Figures  
    19a, 19b. 
4. P

D (ave) 

= Average power dissipation per single avalanche pulse. 

5. BV = Rated breakdown voltage (1.3 factor accounts for voltage 
    increase during avalanche). 
6. I

av

 = Allowable avalanche current. 

7. 

T = Allowable rise in junction temperature, not to exceed  

    T

jmax 

(assumed as 25°C in Figure 15, 16).  

     t

av

 = Average time in avalanche. 

     D = Duty cycle in avalanche =  tav ·f 
     Z

thJC

(D, t

av

) = Transient thermal resistance, see Figures 3) 

 

 

 

 

 

PD (ave) = 1/2 ( 1.3·BV·I

av

) = 

T/ Z

thJC

 

 

 

 

I

av

 = 2

T/ [1.3·BV·Z

th

 

 

 

E

AS (AR) 

= P

D (ave)·

t

av

  

Fig 16.

 Maximum Avalanche Energy vs. Temperature 

1.0E-06

1.0E-05

1.0E-04

1.0E-03

1.0E-02

1.0E-01

tav (sec)

0.1

1

10

100

1000

A

va

la

nc

he

 C

ur

re

nt

 (

A

)

Allowed avalanche Current vs avalanche 
pulsewidth, tav, assuming 



j = 25°C and 

Tstart = 150°C.

Allowed avalanche Current vs avalanche 
pulsewidth, tav, assuming 

Tj = 150°C and 

Tstart =25°C (Single Pulse)

0.10

0.01

0.05

Duty Cycle = Single Pulse

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background image

www.irf.com

        © 2012 International Rectifier  February 

18, 

2013 

 

IRF7748L1TRPbF 

Fig 19a.  Unclamped Inductive Test Circuit 

RG

I

AS

0.01

tp

D.U.T

L

VDS

+

- VDD

DRIVER

A

15V

20V

Fig 20a.  Switching Time Test Circuit 

Fig 18a.  Gate Charge Test Circuit 

tp

V

(BR)DSS

I

AS

Fig 19b.  Unclamped Inductive Waveforms 

Fig 20b.  Switching Time Waveforms 

Vds

Vgs

Id

Vgs(th)

Qgs1 Qgs2

Qgd

Qgodr

Fig 18b.   Gate Charge Waveform 

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background image

www.irf.com

        © 2012 International Rectifier  February 

18, 

2013 

 

IRF7748L1TRPbF 

Note: For the most current drawing please refer to IR website at 

http://www.irf.com/package/ 

DirectFET™Board Footprint, L6 Outline 

 

(Large Size Can, 6-Source Pads). 

Please see DirectFET application note 

AN-1035 

for all details regarding the assembly of DirectFET.  

This includes all recommendations for stencil and  substrate designs.

  

 

G = GATE
D = DRAIN
S = SOURCE

G

D

S

D

D

D

D

D

S

S

S

S

S

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background image

www.irf.com

        © 2012 International Rectifier  February 

18, 

2013 

 

IRF7748L1TRPbF 

DirectFET

®

  Outline Dimension, L6 Outline 

(Large Size Can, 6-Source Pads). 
 
Please see DirectFET application note 

AN-1035 

for all details regarding the assembly of DirectFET.  

This includes all recommendations for stencil and  substrate designs. 

DirectFET

® 

 Part Marking 

CODE

A
B
C
D
E
F

G
H

J

K

L

M

R

P

0.017

0.029

0.003

0.007

0.057
0.104

0.236

0.048

0.026
0.024

MAX

0.360
0.280

0.38

0.68

0.02

0.09

1.35
2.55

5.90

1.18

0.55
0.58

MIN

9.05
6.85

0.42

0.74

0.08

0.17

1.45
2.65

6.00

1.22

0.65
0.62

MAX

9.15
7.10

0.015

0.027
0.003
0.001

0.100

0.053

0.232

0.046

0.023

0.022

MIN

0.270

0.356

METRIC

IMPERIAL

DIMENSIONS

0.98

1.02

0.73

0.77

0.040

0.039

0.030

0.029

L1

0.159

3.95

4.05

0.155

L2

0.214

5.35

5.45

0.210

Dimensions are shown in
millimeters (inches)

GATE MARKING

PART NUMBER

LOGO

BATCH NUMBER

DATE CODE

Line above the last character of

the date code indicates "Lead-Free"

+

Note: For the most current drawing please refer to IR website at 

http://www.irf.com/package/ 

/var/www/html/datasheet/sites/default/files/pdfhtml_dummy/irf7748l1pbf-html.html
background image

10 

www.irf.com

        © 2012 International Rectifier  February 

18, 

2013 

 

IRF7748L1TRPbF 

DirectFET

® 

 Tape & Reel Dimension (Showing component orientation).  

Qualification Information

† 

 

Qualification Level  

Industrial

†† 

*

 

 

Moisture Sensitivity Level  

DirectFET  

MSL1 

(per JEDEC J-STD-020D

†††)

 

RoHS Compliant 

Yes 

 

†        Qualification standards can be found at International Rectifier’s web site 

 

            

http://www.irf.com/product-info/reliability

 

††      Higher qualification ratings may be available should the user have such requirements. 
            Please contact your International Rectifier sales representative for further information:  

           http://www.irf.com/whoto-call/salesrep/

 

†††    Applicable version of JEDEC standard at the time of product release. 

*

 

Industrial qualification standards except autoclave test conditions

IR WORLD HEADQUARTERS: 101N Sepulveda Blvd, El Segundo, California 90245, USA 

To contact Interna onal Rec fier, please visit 

h p://www.irf.com/whoto‐call/

 

  

LOADED TAPE FEED DIRECTION

NOTE: CONTROLLING
DIMENSIONS IN MM

CODE

A
B

C
D
E

F

G
H

IMPERIAL

MIN

4.69

0.154
0.623

0.291

0.283
0.390
0.059
0.059

MAX

12.10

4.10

16.30

7.60
7.40

10.10

N.C

 1.60

MIN

11.90

3.90

15.90

7.40
7.20
9.90

1.50
1.50

METRIC

DIMENSIONS

MAX

0.476

0.161

0.642
0.299

0.291

0.398

N.C

0.063

+

NOTE:

Controlling dimensions in mm

Std reel quantity is 4000 parts. (ordered as IRF7748L1TRPBF).

REEL DIMENSIONS

MAX

N.C
N.C

0.520

N.C

3.940
0.880
0.720
0.760

IMPERIAL

MIN

330.00

20.20

12.80

1.50

99.00

N.C

16.40
15.90

STANDARD OPTION (QTY 4000)

CODE

  A
  B
  C
  D
  E

  F

  G

  H

MAX

N.C
N.C

13.20

N.C

100.00

22.40
18.40
19.40

MIN

12.992

0.795
0.504
0.059
3.900

N.C

0.650
0.630

METRIC

Note: For the most current drawing please refer to IR website at 

http://www.irf.com/package/ 

Date Comments 

2/13/13  TR1 option removed and Tape & Reel Info updated accordingly. Hyperlinks added throw-out the document 

Revision History  

Maker
Infineon Technologies