IRF7739L1TRPbF Product Datasheet

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DirectFET

™ Power MOSFET

 

‚

Typical values (unless otherwise specified)

Applicable DirectFET Outline and  Substrate Outline

 



l

 

RoHS Compliant, Halogen Free

 

‚

l

 

Lead-Free (Qualified up to 260°C Reflow)



l

Ideal for High Performance Isolated Converter

   Primary Switch Socket

l

 

Optimized for Synchronous Rectification

l

 

Low Conduction Losses

l

 

High Cdv/dt Immunity

l

 

Low Profile (<0.7mm)

l

 

Dual Sided Cooling Compatible

 



l

 

Compatible with existing Surface Mount Techniques 



l

 

Industrial Qualified

Fig 1.   Typical On-Resistance vs. Gate Voltage

 Click on the hyperlink (to the relevant technical document) for more details.
‚ Click on the hyperlink (to the DirectFET website) for more details
ƒ Surface mounted on 1 in. square Cu board, steady state.

„ T

C

 measured with thermocouple mounted to top (Drain) of part.

…  Repetitive rating;  pulse width limited by max. junction temperature.
† Starting T

= 25°C, L = 0.021mH, R

= 25

Ω, I

AS 

= 160A.

Notes:

Fig 2.   Typical On-Resistance vs. Drain Current

SB

SC

M2 M4

L4

L6

L8

DirectFET

™ ISOMETRIC

L8

Description

The IRF7739L1TRPbF combines the latest HEXFET® Power MOSFET Silicon technology with the advanced DirectFET

TM

  packaging to achieve

the lowest on-state resistance in a package that has a footprint smaller than a D

2

PAK and only 0.7 mm profile.  The DirectFET package is compatible

with existing layout geometries used in power applications, PCB assembly equipment and vapor phase, infra-red or convection soldering techniques,

when 

application note AN-1035 

is followed regarding the manufacturing methods and processes. The DirectFET package allows dual sided cooling

to maximize thermal transfer in power systems.

The IRF7739L1TRPbF is optimized for high frequency switching and synchronous rectification applications. The reduced total losses in the

device coupled with the high level of thermal performance enables high efficiency and low temperatures, which are key for system reliability

improvements, and makes this device ideal for high performance power converters.

V

DSS

V

GS

R

DS(on) 

40V min ±20V max 0.70mΩ@ 10V

Q

g  tot

Q

gd  

V

gs(th)  

220nC

81nC

2.8V

Absolute Maximum Ratings

Parameter

Units

V

DS

Drain-to-Source Voltage

V

V

GS

Gate-to-Source Voltage

I

D

 @ T

C

 = 25°C  

Continuous Drain Current, V

GS

 @ 10V 

(Silicon Limited)

f

I

D

 @ T

C

 = 100°C

Continuous Drain Current, V

GS

 @ 10V 

(Silicon Limited)

f

A

I

D

 @ T

A

 = 25°C

Continuous Drain Current, V

GS

 @ 10V 

(Silicon Limited)

e

I

D

 @ T

C

 = 25°C  

Continuous Drain Current, V

GS

 @ 10V 

(Package Limited) 

f

I

DM

Pulsed Drain Current 

g

E

AS

Single Pulse Avalanche Energy 

h

mJ

I

AR

Avalanche Current

g

A

160

375

270

Max.

190

46

1070

 ±20

40

270

5.0

5.5

6.0

6.5

7.0

7.5

8.0

VGS, Gate -to -Source Voltage  (V)

0

2

4

6

8

10

T

yp

ic

al

 R

D

S

(o

n)

 (

m

Ω

)

ID = 160A

TJ = 125°C

TJ = 25°C

0

40

80

120

160

200

ID , Drain Current (A)

0.85

0.86

0.87

0.88

0.89

0.90

0.91

0.92

0.93

T

yp

ic

al

 R

D

S

 (

on

(m

Ω

)

VGS = 10V

D

D

G

S

S

S

S

S

S

S

S

IRF7739L1TRPbF

Applications

  

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© 

2012 International Rectifier                                                        February 13 ,2013

Ordering Information

Base part number

Package Type

Orderable Part Number

Form

Quantity

IRF7739L1TRPbF

DirectFET Large Can

Tape and Reel

4000

IRF7739L1TRPbF

Standard Pack

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IRF7739L1TRPbF

Notes:

…

 Repetitive rating;  pulse width limited by max. junction temperature.

‡

 Pulse width ≤ 400μs; duty cycle ≤ 2%.

Static @ T

J

 = 25°C (unless otherwise specified)

Parameter

Min. Typ. Max. Units

BV

DSS

Drain-to-Source Breakdown Voltage

40

–––

–––

V

ΔΒV

DSS

/

ΔT

Breakdown Voltage Temp. Coefficient

–––

0.008

–––

V/°C

R

DS(on)

Static Drain-to-Source On-Resistance

–––

0.70

1.0

V

GS(th)

Gate Threshold Voltage

2.0

2.8

4.0

V

ΔV

GS(th)

/ΔT

J

Gate Threshold Voltage Coefficient

–––

-6.7

––– mV/°C

I

DSS

Drain-to-Source Leakage Current

–––

–––

20

μA

–––

–––

250

I

GSS

Gate-to-Source Forward Leakage

–––

–––

100

nA

Gate-to-Source Reverse Leakage

–––

–––

-100

gfs

Forward Transconductance

280

–––

–––

S

Q

g

Total Gate Charge 

–––

220

330

Q

gs1

Pre-Vth Gate-to-Source Charge

–––

46

–––

Q

gs2

Post-Vth Gate-to-Source Charge

–––

19

–––

nC

Q

gd

Gate-to-Drain Charge

–––

81

120

Q

godr

Gate Charge Overdrive

–––

74

–––

See Fig. 9

Q

sw

Switch Charge (Q

gs2

 + Q

gd

)

–––

100

–––

Q

oss

Output Charge

–––

83

–––

nC

R

G

Gate Resistance

–––

1.5

–––

Ω

t

d(on)

Turn-On Delay Time

–––

21

–––

t

r

Rise  Time

–––

71

–––

t

d(off)

Turn-Off Delay Time

–––

56

–––

ns

t

f

Fall Time

–––

42

–––

C

iss

Input Capacitance

–––

11880 –––

C

oss

Output Capacitance

–––

2510

–––

pF

C

rss

Reverse Transfer Capacitance

–––

1240

–––

C

oss

Output Capacitance

–––

8610

–––

C

oss

Output Capacitance

–––

2230

–––

Diode Characteristics

        Parameter

Min. Typ. Max. Units

I

S

Continuous Source Current 

–––

–––

110

(Body Diode)

A

I

SM

Pulsed Source Current

–––

–––

1070

(Body Diode)

g

V

SD

Diode Forward Voltage

–––

–––

1.3

V

t

rr

Reverse Recovery Time

–––

87

130

ns

Q

rr

Reverse Recovery Charge

–––

250

380

nC

MOSFET symbol

R

G

=1.8

Ω

V

DS

 = 25V

Conditions

V

GS

 = 0V, V

DS

 = 32V, f=1.0MHz

V

GS

 = 0V, V

DS

 = 1.0V, f=1.0MHz

V

DS

 = 16V, V

GS

 = 0V

V

DD

 = 20V, V

GS

 = 10V

i

V

GS

 = 0V

ƒ = 1.0MHz

I

D

 = 160A

V

DS

 = V

GS

, I

D

 = 250μA 

V

DS

 = 40V, V

GS

 = 0V

Conditions

V

GS

 = 0V, I

D

 = 250μA

Reference to 25°C, I

D

 = 1.0mA 

V

GS

 = 10V, I

D

 = 160A 

i

T

J

 = 25°C, I

F

 = 160A, V

DD

 = 20V

di/dt = 100A/μs 

i

T

J

 = 25°C, I

S

 = 160A, V

GS

 = 0V 

i

showing  the
integral reverse
p-n junction diode.

I

D

 = 160A

V

DS

 = 32V, V

GS

 = 0V, T

J

 = 125°C

V

GS

 = 20V

V

GS

 = -20V

V

GS

 = 10V 

V

DS

 = 10V, I

D

 = 160A

V

DS

 = 20V

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2012 International Rectifier                                                          February 13 ,2013

IRF7739L1TRPbF

Fig 3.  Maximum Effective Transient Thermal Impedance, Junction-to-Case 

„

ƒ

 Surface mounted on 1 in. square Cu board, steady state.

„

  T

C

 measured with thermocouple incontact with top (Drain) of part.

ˆ

 Used double sided cooling, mounting pad with large heatsink.

Notes:

‰

 Mounted on minimum footprint full size board with metalized

  back and with small clip heatsink.

Š

 R

θ

 

is measured at T

J

 of approximately 90°C.

ƒ Surface mounted on 1 in. square Cu

board  (still air).

‰ Mounted on minimum footprint full size board with metalized

     back and with small clip heatsink. (still air)

1E-006

1E-005

0.0001

0.001

0.01

0.1

1

t1 , Rectangular Pulse Duration (sec)

0.0001

0.001

0.01

0.1

1

10

T

he

rm

al

 R

es

po

ns

Z

 th

JC

 )

 °

C

/W

0.20

0.10

D = 0.50

0.02

0.01

0.05

SINGLE PULSE

( THERMAL RESPONSE )

Notes:

1. Duty Factor D = t1/t2

2. Peak Tj = P dm x Zthjc + Tc

τ

J

τ

J

τ

1

τ

1

τ

2

τ

2

τ

3

τ

3

R

1

R

1

R

2

R

2

R

3

R

3

Ci   i

/Ri

Ci= 

τi/Ri

τ

τ

C

τ

4

τ

4

R

4

R

4

Ri (°C/W)   

 τi (sec)

0.1080         0.000171
0.6140         0.053914
0.4520         0.006099
1.47e-05      0.036168

Absolute Maximum Ratings

Parameter

Units

P

D

 @T

C

 = 25°C

Power Dissipation 

f

W

P

D

 @T

C

 = 100°C

Power Dissipation 

f

P

D

 @T

A

 = 25°C

Power Dissipation 

c

T

Peak Soldering Temperature

°C

T

Operating Junction and

T

STG

Storage Temperature Range

Thermal Resistance

Parameter

Typ.

Max.

Units

R

θJA 

Junction-to-Ambient 

e

–––

40

R

θJA 

Junction-to-Ambient  

j

12.5

–––

R

θJA 

Junction-to-Ambient  

k

20

–––

°C/W

R

θJ-Can 

Junction-to-Can 

fl

–––

1.2

R

θJ-PCB 

Junction-to-PCB Mounted

–––

0.4

270

-55  to + 175

Max.

3.8

125

63

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2012 International Rectifier                                                          February 13 ,2013

IRF7739L1TRPbF

Fig 5.  Typical Output Characteristics

Fig 4.  Typical Output Characteristics

Fig 6.  Typical Transfer Characteristics

Fig 7.  Normalized On-Resistance vs. Temperature

Fig 8.  Typical Capacitance vs. Drain-to-Source Voltage

Fig 9.   Typical  Total Gate Charge vs.

Gate-to-Source Voltage

0.1

1

10

100

1000

VDS, Drain-to-Source Voltage (V)

0.1

1

10

100

1000

I D

, D

ra

in

-t

o-

S

ou

rc

C

ur

re

nt

 (

A

)

VGS

TOP          

15V
10V

8.0V

7.0V

6.0V

5.5V

5.0V

BOTTOM

4.5V

≤60μs PULSE WIDTH

Tj = 25°C

4.5V

0.1

1

10

100

1000

VDS, Drain-to-Source Voltage (V)

10

100

1000

I D

, D

ra

in

-t

o-

S

ou

rc

C

ur

re

nt

 (

A

)

4.5V

≤60μs PULSE WIDTH

Tj = 175°C

VGS

TOP          

15V
10V

8.0V

7.0V

6.0V

5.5V

5.0V

BOTTOM

4.5V

2

3

4

5

6

7

8

VGS, Gate-to-Source Voltage (V)

0.1

1

10

100

1000

I D

, D

ra

in

-t

o-

S

ou

rc

C

ur

re

nt

 (

A

)

TJ = 25°C

TJ = 175°C

VDS = 25V
≤60μs PULSE WIDTH

-60 -40 -20 0 20 40 60 80 100120140160180

TJ , Junction Temperature (°C)

0.5

1.0

1.5

2.0

R

D

S

(o

n)

 ,

 D

ra

in

-t

o-

S

ou

rc

O

R

es

is

ta

nc

   

   

   

   

   

   

   

 (

N

or

m

al

iz

ed

)

ID = 160A

VGS = 10V

1

10

100

VDS, Drain-to-Source Voltage (V)

1000

10000

100000

C

, C

ap

ac

ita

nc

(p

F

)

VGS   = 0V,       f = 1 MHZ

Ciss   = Cgs + Cgd,  C ds SHORTED
Crss   = Cgd 

Coss  = Cds + Cgd

Coss

Crss

Ciss

0

50

100

150

200

250

300

 QG,  Total Gate Charge (nC)

0.0

2.0

4.0

6.0

8.0

10.0

12.0

14.0

V

G

S

, G

at

e-

to

-S

ou

rc

V

ol

ta

ge

 (

V

)

VDS= 32V

VDS= 20V

ID= 160A

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IRF7739L1TRPbF

Fig 13.  Typical Threshold Voltage vs.

Junction Temperature

Fig 12.  Maximum Drain Current vs. Case Temperature

Fig 10.  Typical Source-Drain Diode Forward Voltage

Fig11.  Maximum Safe Operating Area

Fig 14.  Maximum Avalanche Energy vs. Drain Current

0.0

0.5

1.0

1.5

2.0

2.5

3.0

VSD, Source-to-Drain Voltage (V)

1.0

10

100

1000

I S

D

, R

ev

er

se

 D

ra

in

 C

ur

re

nt

 (

A

)

TJ = 25°C

TJ = 175°C

VGS = 0V

0

1

10

100

VDS, Drain-to-Source Voltage (V)

1

10

100

1000

10000

I D

,  

D

ra

in

-t

o-

S

ou

rc

C

ur

re

nt

 (

A

)

OPERATION IN THIS AREA 

LIMITED BY R DS(on)

Tc = 25°C

Tj = 175°C

Single Pulse

100μsec

1msec

10msec

DC

25

50

75

100

125

150

175

 TC , Case Temperature (°C)

0

50

100

150

200

250

300

I D

,   

D

ra

in

 C

ur

re

nt

 (

A

)

-75 -50 -25 0 25 50 75 100 125 150 175 200

TJ , Temperature ( °C )

1.0

1.5

2.0

2.5

3.0

3.5

4.0

4.5

5.0

V

G

S

(t

h)

,  G

at

th

re

sh

ol

V

ol

ta

ge

 (

V

)

ID = 250μA

ID = 1.0mA

ID = 1.0A

25

50

75

100

125

150

175

Starting TJ , Junction Temperature (°C)

0

100

200

300

400

500

600

700

800

900

1000

1100

E

A

S

 , 

S

in

gl

P

ul

se

 A

va

la

nc

he

 E

ne

rg

(m

J)

ID

TOP         29A

46A

BOTTOM 160A

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IRF7739L1TRPbF

Fig 17. 

Diode Reverse Recovery Test Circuit for N-Channel HEXFET

®

 Power MOSFETs

Fig 15.  Typical Avalanche Current vs. Pulsewidth

Fig 16.  Maximum Avalanche Energy vs. Temperature

Notes on Repetitive Avalanche Curves , Figures 15, 16:
(For further info, see 

AN-1005

 )

1. Avalanche failures assumption:

  Purely a thermal phenomenon and failure occurs at a

    temperature far in excess of T

jmax

. This is validated for

    every part type.
2. Safe operation in Avalanche is allowed as long asT

jmax

 is

  not exceeded.

3. Equation below based on circuit and waveforms shown in

  Figures 19a, 19b.

4. P

D (ave) 

= Average power dissipation per single

    avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for
    voltage increase during avalanche).
6. I

av 

= Allowable avalanche current.

7. 

ΔT

 = 

Allowable rise in junction temperature, not to exceed

    T

jmax 

(assumed as 25°C in Figure 15, 16).

  t

av = 

Average time in avalanche.

  D = Duty cycle in avalanche =  t

av 

·f

  Z

thJC

(D, t

av

) = Transient thermal resistance, see figure 11)

P

D (ave)

 = 1/2 ( 1.3·BV·I

av

) =

 DT/ Z

thJC

I

av 

=

 

2

DT/ [1.3·BV·Z

th

]

E

AS (AR)

 = P

D (ave)

·t

a

P.W.

Period

di/dt

Diode Recovery

dv/dt

Ripple 

≤ 5%

Body Diode  Forward Drop

Re-Applied

Voltage

Reverse

Recovery

Current

Body Diode Forward

Current

V

GS

=10V

V

DD

I

SD

Driver Gate Drive

D.U.T. I

SD

Waveform

D.U.T. V

DS

Waveform

Inductor Curent

D = 

P.W.

Period

*

 V

GS

 = 5V for Logic Level Devices

*

Inductor Current

Circuit Layout Considerations

   •  Low Stray Inductance

   •  Ground Plane

   •  Low Leakage Inductance

      Current Transformer

•  di/dt controlled by R

G

•  Driver same type as D.U.T.

•  I

SD

 controlled by Duty Factor "D"

•  D.U.T. - Device Under Test

+

-

+

+

+

-

-

-

ƒ

„

‚

R

G

V

DD

D.U.T



1.0E-06

1.0E-05

1.0E-04

1.0E-03

1.0E-02

1.0E-01

tav (sec)

0.1

1

10

100

1000

A

va

la

nc

he

 C

ur

re

nt

 (

A

)

0.05

Duty Cycle = Single Pulse

0.10

Allowed avalanche Current vs avalanche 
pulsewidth, tav, assuming 

ΔΤj = 25°C and 

Tstart = 150°C.

0.01

Allowed avalanche Current vs avalanche 
pulsewidth, tav, assuming 

ΔTj = 150°C and 

Tstart =25°C (Single Pulse)

25

50

75

100

125

150

175

Starting TJ , Junction Temperature (°C)

0

50

100

150

200

250

300

E

A

R

 , 

A

va

la

nc

he

 E

ne

rg

(m

J)

TOP          Single Pulse                
BOTTOM   1.0% Duty  Cy cle
ID = 160A

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background image

  

   7

   

      www.irf.com      

© 

2012 International Rectifier                                                          February 13 ,2013

IRF7739L1TRPbF

Fig 18a.  Gate Charge Test Circuit

Fig 18b.   Gate Charge Waveform

Fig 19b.  Unclamped Inductive Waveforms

tp

V

(BR)DSS

I

AS

Fig 19a.  Unclamped Inductive Test Circuit

Fig 20b.  Switching Time Waveforms

Fig 20a.  Switching Time Test Circuit

R G

IAS

0.01

Ω

tp

D.U.T

L

VDS

+

- VDD

DRIVER

A

15V

20V

V

GS

Vds

Vgs

Id

Vgs(th)

Qgs1

Qgs2

Qgd

Qgodr

1K

VCC

DUT

0

L

S

20K

V

DS

90%

10%
V

GS

t

d(on)

t

r

t

d(off)

t

f

V

DS

Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %

R

D

V

GS

R

G

D.U.T.

10V

+

-

V

DD

V

GS

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background image

  

   8

   

      www.irf.com      

© 

2012 International Rectifier                                                          February 13 ,2013

IRF7739L1TRPbF

DirectFET™

 

 Board Footprint, L8 (Large Size Can).

Please see 

AN-1035 

for DirectFET assembly details and stencil and substrate design recommendations

G = GATE
D = DRAIN

S = SOURCE

G

D

S

D

D

D

D

D

S

S

S

S

S

S

S

Note: For the most current drawing please refer to IR website at

 http://www.irf.com/package/

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background image

  

   9

   

      www.irf.com      

© 

2012 International Rectifier                                                          February 13 ,2013

IRF7739L1TRPbF

DirectFET

™

 

 Part Marking

DirectFET™

 

 Outline Dimension, L8 Outline (LargeSize Can).

Please see 

AN-1035 

for DirectFET assembly details and stencil and substrate design recommendations

Note: For the most current drawing please refer to IR website at 

http://www.irf.com/package/

PART NUMBER

LOGO

BATCH NUMBER

DATE CODE

Line above the last character of

the date code indicates "Lead-Free"

GATE MARKING

+

CODE

A
B

C
D

E

F

G
H

J

K

L

M

R

P

0.017

0.029

0.003

0.007

0.057
0.104

0.236

0.048

0.026
0.024

MAX

0.360
0.280

0.38

0.68

0.02

0.09

1.35
2.55

5.90

1.18

0.55
0.58

MIN

9.05
6.85

0.42

0.74

0.08

0.17

1.45
2.65

6.00

1.22

0.65
0.62

MAX

9.15
7.10

0.015

0.027
0.003
0.001

0.100

0.053

0.232

0.046

0.023

0.022

MIN

0.270

0.356

METRIC

IMPERIAL

DIMENSIONS

0.98

1.02

0.73

0.77

0.040

0.039

0.030

0.029

L1

0.215

5.35

5.45

0.211

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background image

  

   10

   

      www.irf.com      

© 

2012 International Rectifier                                                          February 13 ,2013

IRF7739L1TRPbF

DirectFET

™

 

 Tape & Reel Dimension (Showing component orientation).

Note: For the most current drawing please refer to IR website at 

http://www.irf.com/package/

LOADED TAPE FEED DIRECTION

NOTE: CONTROLLING
DIMENSIONS IN MM

CODE

A
B

C
D

E
F

G
H

IMPERIAL

MIN

4.69

0.154
0.623

0.291

0.283
0.390
0.059
0.059

MAX

12.10

4.10

16.30

7.60
7.40

10.10

N.C

 1.60

MIN

11.90

3.90

15.90

7.40
7.20

9.90

1.50
1.50

METRIC

DIMENSIONS

MAX

0.476

0.161

0.642
0.299

0.291

0.398

N.C

0.063

+

† 

     Qualification standards can be found at International Rectifier’s web site

         http://www.irf.com/product-info/reliability

†† 

    Higher qualification ratings may be available should the user have such requirements.

          Please contact your International Rectifier sales representative for further information:

           http://www.irf.com/whoto-call/salesrep/

††† 

   Applicable version of JEDEC standard at the time of product release.

*

 

Industrial qualification standards except autoclave test conditions

IR WORLD HEADQUARTERS: 101N Sepulveda Blvd, El Segundo, California 90245, USA

To contact International Rectifier, please visit 

http://www.irf.com/whoto-call/

REEL DIMENSIONS

NOTE:

Controlling dimensions in mm

Std reel quantity is 4000 parts. (ordered as IRF7739L1TRPBF).

MAX

N.C
N.C

0.520

N.C

3.940
0.880
0.720
0.760

IMPERIAL

MIN

330.00

20.20

12.80

1.50

99.00

N.C

16.40
15.90

STANDARD OPTION  (QTY 4000)

CODE

  A
  B
  C
  D
  E

  F

  G

  H

MAX

N.C
N.C

13.20

N.C

100.00

22.40

18.40
19.40

MIN

12.992

0.795
0.504
0.059
3.900

N.C

0.650
0.630

METRIC

Qualification level

MSL

1

(per JEDEC J-STD-020D

†††

)

RoHS Compliant

Yes

Moisture Sensitivity Level

DirectFET

Qualification Information

Industrial

 †† * 

Revision History 

Date

Comments

2/12/2013

TR1 option removed and Tape & Reel Info updated accordingly. Hyperlinks added throw-out the document

Maker
Infineon Technologies