07/06/10
www.irf.com
1
HEXFET
®
Power MOSFET
V
DSS
= 55V
R
DS(on)
= 7.5m
Ω
I
D
= 75A
This HEXFET
®
Power MOSFET utilizes the latest
processing techniques to achieve extremely low
on-resistance per silicon area. Additional features
of this design are a 175°C junction operating
temperature, fast switching speed and improved
repetitive avalanche rating . These features
combine to make this design an extremely efficient
and reliable device for use in a wide variety of
applications.
S
D
G
Description
l
Advanced Process Technology
l
Ultra Low On-Resistance
l
175°C Operating Temperature
l
Fast Switching
l
Repetitive Avalanche Allowed up to Tjmax
l
Lead-Free
Features
IRF1010ZPbF
IRF1010ZSPbF
IRF1010ZLPbF
D
2
Pak
IRF1010ZSPbF
TO-220AB
IRF1010ZPbF
TO-262
IRF1010ZLPbF
Absolute Maximum Ratings
Parameter
Units
I
D
@ T
C
= 25°C Continuous Drain Current, V
GS
@ 10V
(Silicon Limited)
I
D
@ T
C
= 100°C Continuous Drain Current, V
GS
@ 10V
A
I
D
@ T
C
= 25°C Continuous Drain Current, V
GS
@ 10V
(Package Limited)
I
DM
Pulsed Drain Current
c
P
D
@T
C
= 25°C Power Dissipation
W
Linear Derating Factor
W/°C
V
GS
Gate-to-Source Voltage
V
E
AS (Thermally limited)
Single Pulse Avalanche Energy
d
mJ
E
AS
(Tested )
Single Pulse Avalanche Energy Tested Value
h
I
AR
Avalanche Current
c
A
E
AR
Repetitive Avalanche Energy
g
mJ
T
J
Operating Junction and
T
STG
Storage Temperature Range
°C
Soldering Temperature, for 10 seconds
Mounting Torque, 6-32 or M3 screw
i
Thermal Resistance
Parameter
Typ.
Max.
Units
R
θJC
Junction-to-Case
–––
1.11
°C/W
R
θCS
Case-to-Sink, Flat Greased Surface
i
0.50
–––
R
θJA
Junction-to-Ambient
i
–––
62
R
θJA
Junction-to-Ambient (PCB Mount)
j
–––
40
180
130
See Fig.12a, 12b, 15, 16
140
0.90
± 20
Max.
94
66
360
75
-55 to + 175
300 (1.6mm from case )
10 lbf
yin (1.1Nym)
PD - 95361A
IRF1010Z/S/LPbF
2
www.irf.com
Electrical Characteristics @ T
J
= 25°C (unless otherwise specified)
Parameter
Min. Typ. Max. Units
V
(BR)DSS
Drain-to-Source Breakdown Voltage
55
–––
–––
V
∆V
(BR)DSS
/
∆T
J
Breakdown Voltage Temp. Coefficient
–––
0.049
–––
V/°C
R
DS(on)
Static Drain-to-Source On-Resistance
–––
5.8
7.5
m
Ω
V
GS(th)
Gate Threshold Voltage
2.0
–––
4.0
V
gfs
Forward Transconductance
33
–––
–––
S
I
DSS
Drain-to-Source Leakage Current
–––
–––
20
µA
–––
–––
250
I
GSS
Gate-to-Source Forward Leakage
–––
–––
200
nA
Gate-to-Source Reverse Leakage
–––
–––
-200
Q
g
Total Gate Charge
–––
63
95
Q
gs
Gate-to-Source Charge
–––
19
–––
nC
Q
gd
Gate-to-Drain ("Miller") Charge
–––
24
–––
t
d(on)
Turn-On Delay Time
–––
18
–––
t
r
Rise Time
–––
150
–––
t
d(off)
Turn-Off Delay Time
–––
36
–––
ns
t
f
Fall Time
–––
92
–––
L
D
Internal Drain Inductance
–––
4.5
–––
Between lead,
nH
6mm (0.25in.)
L
S
Internal Source Inductance
–––
7.5
–––
from package
and center of die contact
C
iss
Input Capacitance
–––
2840
–––
C
oss
Output Capacitance
–––
420
–––
C
rss
Reverse Transfer Capacitance
–––
250
–––
pF
C
oss
Output Capacitance
–––
1630
–––
C
oss
Output Capacitance
–––
360
–––
C
oss
eff.
Effective Output Capacitance
–––
560
–––
Source-Drain Ratings and Characteristics
Parameter
Min. Typ. Max. Units
I
S
Continuous Source Current
–––
–––
75
(Body Diode)
A
I
SM
Pulsed Source Current
–––
–––
360
(Body Diode)
c
V
SD
Diode Forward Voltage
–––
–––
1.3
V
t
rr
Reverse Recovery Time
–––
22
33
ns
Q
rr
Reverse Recovery Charge
–––
15
23
nC
t
on
Forward Turn-On Time
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
V
GS
= 0V, V
DS
= 1.0V, ƒ = 1.0MHz
V
GS
= 0V, V
DS
= 44V, ƒ = 1.0MHz
V
GS
= 0V, V
DS
= 0V to 44V
f
V
GS
= 10V
e
V
DD
= 28V
I
D
= 75A
R
G
= 6.8
Ω
T
J
= 25°C, I
S
= 75A, V
GS
= 0V
e
T
J
= 25°C, I
F
= 75A, V
DD
= 25V
di/dt = 100A/µs
e
Conditions
V
GS
= 0V, I
D
= 250µA
Reference to 25°C, I
D
= 1mA
V
GS
= 10V, I
D
= 75A
e
V
DS
= V
GS
, I
D
= 250µA
V
DS
= 55V, V
GS
= 0V
V
DS
= 55V, V
GS
= 0V, T
J
= 125°C
MOSFET symbol
showing the
integral reverse
p-n junction diode.
V
DS
= 25V, I
D
= 75A
I
D
= 75A
V
DS
= 44V
Conditions
V
GS
= 10V
e
V
GS
= 0V
V
DS
= 25V
ƒ = 1.0MHz
V
GS
= 20V
V
GS
= -20V
IRF1010Z/S/LPbF
www.irf.com
3
Fig 2. Typical Output Characteristics
Fig 1. Typical Output Characteristics
Fig 3. Typical Transfer Characteristics
Fig 4. Typical Forward Transconductance
Vs. Drain Current
0.1
1
10
100
VDS, Drain-to-Source Voltage (V)
1
10
100
1000
I D
, D
ra
in
-t
o-
S
ou
rc
e
C
ur
re
nt
(
A
)
4.5V 20µs PULSE WIDTH
Tj = 25°C
V
GS
TOP 15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
0.1
1
10
100
VDS, Drain-to-Source Voltage (V)
10
100
1000
I D
, D
ra
in
-t
o-
S
ou
rc
e
C
ur
re
nt
(
A
)
4.5V
20µs PULSE WIDTH
Tj = 175°C
V
GS
TOP 15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
4.0
5.0
6.0
7.0
8.0
9.0
10.0
11.0
VGS, Gate-to-Source Voltage (V)
1
10
100
1000
I D
, D
ra
in
-t
o-
S
ou
rc
e
C
ur
re
nt
( A
)
TJ = 25°C
TJ = 175°C
VDS = 25V
20µs PULSE WIDTH
0
20
40
60
80
ID, Drain-to-Source Current (A)
0
20
40
60
80
100
G
fs
, F
or
w
ar
d
T
ra
ns
co
nd
uc
ta
nc
e
(S
)
TJ = 25°C
TJ = 175°C
VDS = 10V
20µs PULSE WIDTH
IRF1010Z/S/LPbF
4
www.irf.com
Fig 8. Maximum Safe Operating Area
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 7. Typical Source-Drain Diode
Forward Voltage
1
10
100
VDS, Drain-to-Source Voltage (V)
0
1000
2000
3000
4000
5000
C
, C
ap
ac
ita
nc
e
(p
F
)
Coss
Crss
Ciss
VGS = 0V, f = 1 MHZ
Ciss = Cgs + Cgd, C ds SHORTED
Crss = Cgd
Coss = Cds + Cgd
0
20
40
60
80
100
QG Total Gate Charge (nC)
0
4
8
12
16
20
V
G
S
, G
at
e-
to
-S
ou
rc
e
V
ol
ta
ge
(
V
)
VDS= 44V
VDS= 28V
ID= 75A
0.2
0.6
1.0
1.4
1.8
VSD, Source-toDrain Voltage (V)
0.1
1.0
10.0
100.0
1000.0
I S
D
, R
ev
er
se
D
ra
in
C
ur
re
nt
(
A
)
TJ = 25°C
TJ = 175°C
VGS = 0V
1
10
100
1000
VDS , Drain-toSource Voltage (V)
0.1
1
10
100
1000
10000
I D
,
D
ra
in
-t
o-
S
ou
rc
e
C
ur
re
nt
(
A
)
Tc = 25°C
Tj = 175°C
Single Pulse
1msec
10msec
OPERATION IN THIS AREA
LIMITED BY R DS(on)
100µsec
IRF1010Z/S/LPbF
www.irf.com
5
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Fig 9. Maximum Drain Current Vs.
Case Temperature
Fig 10. Normalized On-Resistance
Vs. Temperature
25
50
75
100
125
150
175
TC , Case Temperature (°C)
0
20
40
60
80
100
I D
,
D
ra
in
C
ur
re
nt
(
A
)
LIMITED BY PACKAGE
-60 -40 -20 0
20 40 60 80 100 120 140 160 180
TJ , Junction Temperature (°C)
0.5
1.0
1.5
2.0
2.5
R
D
S
(o
n)
,
D
ra
in
-t
o-
S
ou
rc
e
O
n
R
es
is
ta
nc
e
(
N
or
m
al
iz
ed
)
ID = 75A
VGS = 10V
1E-006
1E-005
0.0001
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
0.001
0.01
0.1
1
10
T
he
rm
al
R
es
po
ns
e
(
Z
th
JC
)
0.20
0.10
D = 0.50
0.02
0.01
0.05
SINGLE PULSE
( THERMAL RESPONSE )
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
IRF1010Z/S/LPbF
6
www.irf.com
Q
G
Q
GS
Q
GD
V
G
Charge
10 V
Fig 13b. Gate Charge Test Circuit
Fig 13a. Basic Gate Charge Waveform
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
Fig 12b. Unclamped Inductive Waveforms
Fig 12a. Unclamped Inductive Test Circuit
tp
V
(BR)DSS
I
AS
Fig 14. Threshold Voltage Vs. Temperature
RG
IAS
0.01
Ω
tp
D.U.T
L
VDS
+
- VDD
DRIVER
A
15V
20V
V
GS
25
50
75
100
125
150
175
Starting TJ, Junction Temperature (°C)
0
50
100
150
200
250
E
A
S
, S
in
gl
e
P
ul
se
A
va
la
nc
he
E
ne
rg
y
(m
J)
I
D
TOP 31A
53A
BOTTOM 75A
-75 -50 -25
0
25
50
75 100 125 150 175
TJ , Temperature ( °C )
1.0
2.0
3.0
4.0
V
G
S
(t
h)
G
at
e
th
re
sh
ol
d
V
ol
ta
ge
(
V
)
ID = 250µA
1K
VCC
DUT
0
L
IRF1010Z/S/LPbF
www.irf.com
7
Fig 15. Typical Avalanche Current Vs.Pulsewidth
Fig 16. Maximum Avalanche Energy
Vs. Temperature
Notes on Repetitive Avalanche Curves , Figures 15, 16:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of T
jmax
. This is validated for
every part type.
2. Safe operation in Avalanche is allowed as long asT
jmax
is
not exceeded.
3. Equation below based on circuit and waveforms shown in
Figures 12a, 12b.
4. P
D (ave)
= Average power dissipation per single
avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for
voltage increase during avalanche).
6. I
av
= Allowable avalanche current.
7.
∆T
=
Allowable rise in junction temperature, not to exceed
T
jmax
(assumed as 25°C in Figure 15, 16).
t
av =
Average time in avalanche.
D = Duty cycle in avalanche = t
av
·f
Z
thJC
(D, t
av
) = Transient thermal resistance, see figure 11)
P
D (ave)
= 1/2 ( 1.3·BV·I
av
) =
DT/ Z
thJC
I
av
=
2
DT/ [1.3·BV·Z
th
]
E
AS (AR)
= P
D (ave)
·t
av
25
50
75
100
125
150
175
Starting TJ , Junction Temperature (°C)
0
20
40
60
80
100
120
140
E
A
R
,
A
va
la
nc
he
E
ne
rg
y
(m
J)
TOP Single Pulse
BOTTOM 10% Duty Cycle
ID = 75A
1.0E-08
1.0E-07
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
0.1
1
10
100
1000
A
va
la
nc
he
C
ur
re
nt
(
A
)
0.05
Duty Cycle = Single Pulse
0.10
Allowed avalanche Current vs
avalanche pulsewidth, tav
assuming
∆ Tj = 25°C due to
avalanche losses. Note: In no
case should Tj be allowed to
exceed Tjmax
0.01
IRF1010Z/S/LPbF
8
www.irf.com
Fig 17.
Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET
®
Power MOSFETs
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
P.W.
Period
di/dt
Diode Recovery
dv/dt
Ripple
≤ 5%
Body Diode Forward Drop
Re-Applied
Voltage
Reverse
Recovery
Current
Body Diode Forward
Current
V
GS
=10V
V
DD
I
SD
Driver Gate Drive
D.U.T. I
SD
Waveform
D.U.T. V
DS
Waveform
Inductor Curent
D =
P.W.
Period
*
V
GS
= 5V for Logic Level Devices
*
+
-
+
+
+
-
-
-
R
G
V
DD
• dv/dt controlled by R
G
• Driver same type as D.U.T.
• I
SD
controlled by Duty Factor "D"
• D.U.T. - Device Under Test
D.U.T
V
DS
90%
10%
V
GS
t
d(on)
t
r
t
d(off)
t
f
V
DS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
R
D
V
GS
R
G
D.U.T.
10V
+
-
V
DD
Fig 18a. Switching Time Test Circuit
Fig 18b. Switching Time Waveforms
IRF1010Z/S/LPbF
www.irf.com
9
TO-220AB Part Marking Information
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
INTERNATIONAL
PART NUMBER
RECTIFIER
LOT CODE
ASS EMBLY
LOGO
YEAR 0 = 2000
DAT E CODE
WEEK 19
LINE C
LOT CODE 1789
EXAMPLE: T HIS IS AN IRF1010
Note: "P" in assembly line position
indicates "Lead - Free"
IN THE AS SEMBLY LINE "C"
ASSEMBLED ON WW 19, 2000
Notes:
1. For an Automotive Qualified version of this part please see http://www.irf.com/product-info/datasheets/data/auirf1010z.pdf
2. For the most current drawing please refer to IR website at http://www.irf.com/package/
IRF1010Z/S/LPbF
10
www.irf.com
D
2
Pak (TO-263AB) Part Marking Information
DATE CODE
YEAR 0 = 2000
WEEK 02
A = ASSEMBLY SITE CODE
RECTIFIER
INTERNATIONAL
PART NUMBER
P = DESIGNATES LEAD - FREE
PRODUCT (OPTIONAL)
F530S
IN THE ASSEMBLY LINE "L"
AS SEMBLED ON WW 02, 2000
THIS IS AN IRF530S WITH
LOT CODE 8024
INTERNATIONAL
LOGO
RECTIFIER
LOT CODE
ASSEMBLY
YEAR 0 = 2000
PART NUMBER
DATE CODE
LINE L
WEEK 02
OR
F530S
LOGO
ASSEMBLY
LOT CODE
D
2
Pak (TO-263AB) Package Outline
Dimensions are shown in millimeters (inches)
Notes:
1. For an Automotive Qualified version of this part please see http://www.irf.com/product-info/datasheets/data/auirf1010z.pdf
2. For the most current drawing please refer to IR website at http://www.irf.com/package/