Rev 16.0
1
PD-97660
IR3831WMPbF
Features
•
Wide Input Voltage Range 1.0V to 16V
•
Wide Output Voltage Range 0.6V to 0.9*Vin
•
Continuous 8A Load Capability
•
Integrated Bootstrap-diode
•
High Bandwidth E/A for excellent transient
performance
•
Programmable Switching Frequency up to 1.5 MHz
•
Programmable Over Current Protection
•
PGood output
•
Hiccup Current Limit
•
Programmable Soft-Start
•
Enable Input with Voltage Monitoring Capability
•
Enhanced Pre-Bias Start-up
•
Vp input for DDR Tracking applications
•
-40
o
C to 125
o
C operating junction temperature
•
Thermal Protection
•
5mm x 6mm Power QFN Package, 0.9 mm height
•
Lead-free, halogen-free and RoHS compliant
Applications
•
Server Applications
•
Storage Applications
•
Embedded Telecom Systems
Fig. 1. Typical application diagram
HIGHLY EFFICIENT INTEGRATED
SYNCHRONOUS BUCK REGULATOR FOR DDR APPLICATIONS
SupIRBuck
TM
Boot
Vcc
Fb
Comp
Gnd
PGnd
SW
OCSet
SS/ SD
4.5V <Vcc<5.5V
Vo
PGood
PGood
Enable
Rt
1.0V <Vin<16V
Vin
Vp
VDDQ
Description
The IR3831W SupIRBuck
TM
is an easy-to-use,
fully integrated and highly efficient DC/DC
regulator. The MOSFETS co-packaged with the
on-chip PWM controller make IR3831W a space-
efficient solution, providing accurate power
delivery for DDR memory applications.
IR3831W is configured to generate termination
voltage (VTT) for DDR memory applications.
IR3831W offers programmability of start up time,
switching frequency and current limit while
operating in wide input and output voltage range.
The switching frequency is programmable from
250kHz to 1.5MHz for an optimum solution.
It also features important protection functions,
such as Pre-Bias startup, hiccup current limit and
thermal shutdown to give required system level
security in the event of fault conditions.
•
Distributed Point of Load Power Architectures
•
Netcom Applications
Rev 16.0
2
PD-97660
IR3831WMPbF
14
13
ABSOLUTE MAXIMUM RATINGS
(Voltages referenced to GND unless otherwise specified)
•
Vin ……………………………………………………. -0.3V to 25V
•
Vcc ……………….….…………….……..……….…… -0.3V to 8V (Note2)
•
Boot ……………………………………..……….…. -0.3V to 33V
•
SW …………………………………………..……… -0.3V to 25V(DC), -4V to 25V(AC, 100ns)
•
Boot to SW ……..…………………………….…..….. -0.3V to Vcc+0.3V (Note1)
•
OCSet ………………………………………….……. -0.3V to 30V, 30mA
•
Input / output Pins ……………………………….. ... -0.3V to Vcc+0.3V (Note1)
•
PGND to GND ……………...………………………….. -0.3V to +0.3V
•
Storage Temperature Range ................................... -55°C To 150°C
•
Junction Temperature Range ................................... -40°C To 150°C (Note2)
•
ESD Classification …………………………… ……… JEDEC Class 1C
•
Moisture sensitivity level………………...………………JEDEC Level 2@260 °C (Note5)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the
device. These are stress ratings only and functional operation of the device at these or any other
conditions beyond those indicated in the operational sections of the specifications are not implied.
Note1:
Must not exceed 8V
Note2:
Vcc must not exceed 7.5V for Junction Temperature between -10
o
C and -40
o
C
W
/
C
2
θ
W
/
C
35
θ
o
PCB
J
o
JA
=
=
-
PACKAGE INFORMATION
5mm x 6mm POWER QFN
4000
15
IR3831WMTRPbF
M
750
PARTS PER
REEL
15
PIN COUNT
IR3831WMTR1PbF
PACKAGE
DESCRIPTION
M
PACKAGE
DESIGNATOR
ORDERING INFORMATION
12
11
10
PGnd
15
Gnd
1
2
3
4
5
6
7
8
9
Vp
FB COMP Gnd Rt SS OCSet
PGood
V
CC
Enable
Boot
V
IN
SW
Rev 16.0
3
PD-97660
IR3831WMPbF
Block Diagram
Fig. 2. Simplified block diagram of the IR3831W
Rev 16.0
4
PD-97660
IR3831WMPbF
Pin Description
Pin
Name
Description
1 Vp
Track pin. Use External resistors from VDDQ rail. The Vp voltage can
be set to 0.9V for DDR2 application and 0.75 or 0.6V for DDR3
application.
2 Fb
Inverting input to the error amplifier. This pin is connected directly to the
output of the regulator via resistor divider to set the output voltage and
provide feedback to the error amplifier.
3 Comp
Output of error amplifier. An external resistor and capacitor network is
typically connected from this pin to Fb pin to provide loop
compensation.
4
Gnd
Signal ground for internal reference and control circuitry.
5 Rt
Set the switching frequency. Connect an external resistor from this pin
to Gnd to set the switching frequency.
6 SS/SD
¯¯
Soft start / shutdown. This pin provides user programmable soft-start
function. Connect an external capacitor from this pin to Gnd to set the
start up time of the output voltage. The converter can be shutdown by
pulling this pin below 0.3V.
7 OCSet
Current limit set point. A resistor from this pin to SW pin will set the
current limit threshold.
8
PGood
Power Good status pin. Output is open drain. Connect a pull up resistor
from this pin to Vcc. If unused, it can be left open.
9
V
CC
This pin powers the internal IC and drivers. A minimum of 1uF high
frequency capacitor must be connected from this pin to the power
ground (PGnd).
10 PGnd
Power Ground. This pin serves as a separated ground for the MOSFET
drivers and should be connected to the system’s power ground plane.
11
SW
Switch node. This pin is connected to the output inductor.
12
V
IN
Input voltage connection pin.
13 Boot
Supply voltage for high side driver. Connect a 0.1uF capacitor from this
pin to SW.
14
Enable
Enable pin to turn on and off the device.
15
Gnd
Signal ground for internal reference and control circuitry.
Rev 16.0
5
PD-97660
IR3831WMPbF
Recommended Operating Conditions
Parameter Symbol Test
Condition
Min
TYP
MAX
Units
Power Loss
Power Loss
P
loss
Vcc=5V,
V
in
=12V, V
o
=0.75V, I
o
=8A,
Fs=400kHz, L=0.6uH, Note4
1.28 W
MOSFET R
ds(on)
Top Switch
R
ds(on)_Top
V
Boot
-V
sw
=5V, I
D
=10A, Tj=
25
o
C
17.8 26.5
Bottom Switch
R
ds(on)_Bot
V
cc
=5V, I
D
=10A, Tj=
25
o
C
8.5 10.7
m
Ω
Supply Current
V
CC
Supply Current (Standby)
I
CC(Standby)
SS=0V, No Switching, Enable low
500
μA
V
cc
Supply Current (Dyn)
I
CC(Dyn)
SS=3V,
Vcc=5V,
Fs=500kHz
Enable high
12 mA
Under Voltage Lockout
V
CC
-Start-Threshold V
CC
_UVLO_Start
Vcc Rising Trip Level
3.95
4.15
4.35
V
CC
-Stop-Threshold V
CC
_UVLO_Stop
Vcc Falling Trip Level
3.65
3.85
4.05
Enable-Start-Threshold Enable_UVLO_Start
Supply ramping up
1.14
1.2
1.36
Enable-Stop-Threshold Enable_UVLO_Stop
Supply
ramping
down
0.9 1.0
1.06
V
Enable leakage current
Ien
Enable=3.3V
15
μA
Electrical Specifications
Unless otherwise specified, these specification apply over 4.5V< V
cc
<5.5V, Vp=0.6V, V
in
=12V,
0
o
C<T
j
< 125
o
C. Typical values are specified at T
a
= 25
o
C.
Symbol Definition
Min
Max Units
V
in
Input
Voltage
1.0
16
V
cc
Supply
Voltage
4.5
5.5
Boot to SW
Supply Voltage
4.5
5.5
V
o
Output
Voltage
0.6 0.90*Vin
V
I
o
Output
Current
0
8
A
Fs Switching
Frequency
225
1650 kHz
T
j
Junction
Temperature -40
125
o
C
Rev 16.0
6
PD-97660
IR3831WMPbF
Electrical Specifications (continued)
Unless otherwise specified, these specification apply over 4.5V< V
cc
<5.5V, Vp=0.6V, V
in
=12V,
0
o
C<T
j
< 125
o
C. Typical values are specified at T
a
= 25
o
C.
Parameter Symbol Test
Condition Min
TYP
MAX
Units
Oscillator
Rt Voltage
0.665 0.7 0.735
V
Rt=59K 225
250
275
Rt=28.7K 450
500
550
Frequency
F
S
Rt=9.31K, Note4 1350
1500
1650
kHz
Ramp Amplitude
Vramp
Note4
1.8
Vp-p
Ramp Offset
Ramp (os)
Note4
0.6
V
Min Pulse Width
Dmin(ctrl)
Note4
50
Fixed Off Time
Note4
130
200
ns
Max Duty Cycle
Dmax
Fs=250kHz
92
%
Error Amplifier
Input Offset Voltage
Vos
Vfb-Vp
Vp=0.6V
-5 0 +5
mV
Input Bias Current
IFb(E/A)
-1
+1
Input Bias Current
IVp(E/A)
-1
+1
μA
Sink Current
Isink(E/A)
0.40
0.85
1.2
Source
Current
Isource(E/A)
8 10 13
mA
Slew Rate
SR
Note4
7 12 20
V/
μs
Gain-Bandwidth Product
GBW P
Note4 20
30
40
MHz
DC Gain
Gain
Note4 100
110
120
dB
Maximum Voltage
Vmax(E/A)
Vcc=4.5V
3.4 3.5 3.75
V
Minimum Voltage
Vmin(E/A)
120
220
mV
Common Mode Voltage
Note4
0 1
V
Soft Start/SD
Soft Start Current
ISS
Source
14
20
26
μA
Soft Start Clamp Voltage
Vss(clamp)
2.7
3.0
3.3
Shutdown Output
Threshold
SD
0.3
V
Over Current Protection
Fs=250kHz 20.8
23.6
26.4
Fs=500kHz 43
48.8
54.6
OCSET Current
I
OCSET
Fs=1500kHz 136
154
172
μA
OC Comp Offset Voltage
V
OFFSET
Note4
-10 0 +10
mV
SS off time
SS_Hiccup
4096
Cycles
Bootstrap Diode
Forward Voltage
I(Boot)=30mA
180
260
470
mV
Deadband
Deadband time
Note4
5 10 30
ns
Rev 16.0
7
PD-97660
IR3831WMPbF
Parameter SYM Test
Condition
Min
TYP
MAX
Units
Thermal Shutdown
Thermal Shutdown
Note4
140
Hysteresis
Note4
20
o
C
Power Good
Power Good upper
Threshold
VPG(upper)
Fb Rising
0.660
0.690
0.720
V
Upper Threshold
Delay
VPG(upper)_Dly Fb
Rising
256/Fs
S
Power Good lower
Threshold
VPG(lower) Fb
Falling
0.480
0.510 0.540
V
Lower Threshold
Delay
VPG(lower)_Dly Fb
Falling
256/Fs
S
Delay Comparator
Threshold
PG(Delay)
Relative to charge voltage, SS rising
2
2.1
2.3
V
Delay Comparator
Hysteresis
Delay(hys)
Note4
260 300 340 mV
PGood Voltage Low
PG(voltage)
I
PGood
=-5mA
0.5
V
Leakage Current
I
leakage
0 10
μA
Switch Node
SW=0V, Enable=0V
SW Bias Current
Isw
SW=0V,Enable=high,SS=3V,Vp=0V,
Note4
6
μA
Note3: Cold temperature performance is guaranteed via correlation using statistical quality control. Not tested in production.
Note4: Guaranteed by Design but not tested in production.
Note5: Upgrade to industrial/MSL2 level applies from date codes 1141 (marking explained on application note
AN1132
page 2).
Products with prior date code of 1141 are qualified with MSL3 for Consumer market.
Electrical Specifications (continued)
Unless otherwise specified, these specification apply over 4.5V< V
cc
<5.5V, Vp=0.6V, V
in
=12V,
0
o
C<T
j
< 125
o
C. Typical values are specified at T
a
= 25
o
C.
Rev 16.0
8
PD-97660
IR3831WMPbF
ISS
14.0
16.0
18.0
20.0
22.0
24.0
26.0
-40
-20
0
20
40
60
80
100
120
Temp[
o
C]
[u
A
]
Enable(UVLO) Stop
0.90
0.92
0.94
0.96
0.98
1.00
1.02
1.04
1.06
-40
-20
0
20
40
60
80
100
120
Temp[
ο
C]
[V
]
Enable(UVLO) Start
1.14
1.16
1.18
1.20
1.22
1.24
1.26
1.28
1.30
1.32
1.34
1.36
-40
-20
0
20
40
60
80
100
120
Temp[
o
C]
[V
]
Vcc(UVLO) Stop
3.76
3.81
3.86
3.91
3.96
4.01
4.06
4.11
4.16
-40
-20
0
20
40
60
80
100
120
Temp[
o
C]
[V
]
Vcc(UVLO) Start
4.06
4.11
4.16
4.21
4.26
4.31
4.36
4.41
4.46
-40
-20
0
20
40
60
80
100
120
Temp[
o
C]
[V
]
IOCSET(500kHz)
43.0
44.0
45.0
46.0
47.0
48.0
49.0
50.0
51.0
52.0
53.0
54.0
-40
-20
0
20
40
60
80
100
120
Temp[
o
C]
[u
A
]
FREQUENCY
450
460
470
480
490
500
510
520
530
540
550
-40
-20
0
20
40
60
80
100
120
Temp[
o
C]
[k
H
z]
Ic(Dyn)
11.5
11.6
11.7
11.8
11.9
12.0
12.1
12.2
12.3
12.4
12.5
-40
-20
0
20
40
60
80
100
120
Temp[
o
C]
[m
A
]
Icc(Standby)
150
170
190
210
230
250
270
290
-40
-20
0
20
40
60
80
100
120
Temp[
o
C]
[u
A
]
TYPICAL OPERATING CHARACTERISTICS (-40
o
C - 125
o
C) F
s
=500 kHz
Rev 16.0
9
PD-97660
IR3831WMPbF
Rdson of MOSFETs Over Temperature at Vcc=5V
6
8
10
12
14
16
18
20
22
24
26
28
-40
-20
0
20
40
60
80
100
120
140
Temperature [°C]
Resi
stance [m
Ω
]
Sync-FET
Ctrl-FET
Rev 16.0
10
PD-97660
IR3831WMPbF
Typical Efficiency and Power Loss Curves
Vin=12V, Vo=0.75V, Vcc=5V, Io=1.0A-8A, F
s
=400kHz, L=0.6uH (MPL104-0R from Delta), Room
Temperature, No Air Flow
83
84
85
86
87
88
89
1
2
3
4
5
6
7
8
Load Current (A)
Effi
ci
en
cy
(%)
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1.1
1.2
1
2
3
4
5
6
7
8
Load Current (A)
Po
wer Lo
ss
(W
)