AUIRFS3207Z
AUIRFSL3207Z
V
DSS
75V
R
DS(on)
typ.
3.3m
max.
4.1m
I
D (Silicon Limited)
170A
I
D (Package Limited)
120A
Absolute Maximum Ratings
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress
ratings only; and functional operation of the device at these or any other condition beyond those indicated in the specifications is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The thermal resistance
and power dissipation ratings are measured under board mounted and still air conditions. Ambient temperature (TA) is 25°C, unless
otherwise specified.
Features
Advanced Process Technology
Ultra Low On-Resistance
175°C Operating Temperature
Fast
Switching
Repetitive Avalanche Allowed up to Tjmax
Lead-Free, RoHS Compliant
Automotive Qualified *
Description
Specifically designed for Automotive applications, this HEXFET
®
Power MOSFET utilizes the latest processing techniques to achieve
extremely low on-resistance per silicon area. Additional features of
this design are a 175°C junction operating temperature, fast
switching speed and improved repetitive avalanche rating . These
features combine to make this design an extremely efficient and
reliable device for use in Automotive applications and a wide variety
of other applications
1
2015-10-27
HEXFET® is a registered trademark of Infineon.
*Qualification standards can be found at
www.infineon.com
AUTOMOTIVE GRADE
Symbol Parameter
Max.
Units
I
D
@ T
C
= 25°C
Continuous Drain Current, V
GS
@ 10V (Silicon Limited)
170
A
I
D
@ T
C
= 100°C
Continuous Drain Current, V
GS
@ 10V (Silicon Limited)
120
I
D
@ T
C
= 25°C
Continuous Drain Current, V
GS
@ 10V (Package Limited)
120
I
DM
Pulsed Drain Current 670
P
D
@T
C
= 25°C
Maximum Power Dissipation
300
W
Linear Derating Factor
2.0
W/°C
V
GS
Gate-to-Source Voltage
± 20
V
dv/dt Peak
Diode
Recovery
16
V/ns
E
AS
Single Pulse Avalanche Energy (Thermally Limited) 170
mJ
I
AR
Avalanche Current
See Fig.14,15, 22a, 22b
A
E
AR
Repetitive Avalanche Energy
mJ
T
J
Operating Junction and
-55 to + 175
T
STG
Storage Temperature Range
°C
Soldering Temperature, for 10 seconds (1.6mm from case)
300
Thermal Resistance
Symbol Parameter
Typ.
Max.
Units
R
JC
Junction-to-Case –––
0.50
°C/W
R
JA
Junction-to-Ambient (PCB Mount), D
2
Pak –––
40
D
2
Pak
AUIRFS3207Z
TO-262
AUIRFSL3207Z
S
D
G
S
D
G
D
Base part number
Package Type
Standard Pack
Form
Quantity
AUIRFSL3207Z
TO-262
Tube
50
AUIRFSL3207Z
AUIRFS3207Z
D
2
-Pak
Tube
50
AUIRFS3207Z
Tape and Reel Left
800
AUIRFS3207ZTRL
Orderable Part Number
G D S
Gate Drain
Source
HEXFET
®
Power MOSFET
AUIRFS/SL3207Z
2
2015-10-27
Notes:
Calculated continuous current based on maximum allowable junction temperature. Bond wire current limit is 120A. Note that
current limitations arising from heating of the device leads may occur with some lead mounting arrangements.
Repetitive rating; pulse width limited by max. junction temperature.
Limited by T
Jmax,
starting T
J
= 25°C, L = 0.033mH, R
G
= 25
, I
AS
= 102A, V
GS
=10V. Part not recommended for use above this value.
I
SD
75A, di/dt 1730A/µs, V
DD
V
(BR)DSS
, T
J
175°C.
Pulse width
400µs; duty cycle 2%.
C
oss
eff. (TR) is a fixed capacitance that gives the same charging time as C
oss
while V
DS
is rising from 0 to 80% V
DSS
.
C
oss
eff. (ER) is a fixed capacitance that gives the same energy as C
oss
while V
DS
is rising from 0 to 80% V
DSS
.
When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer to
application note #AN-994
R
is measured at T
J
approximately 90°C.
Static @ T
J
= 25°C (unless otherwise specified)
Parameter Min.
Typ.
Max.
Units
Conditions
V
(BR)DSS
Drain-to-Source Breakdown Voltage
75
––– –––
V V
GS
= 0V, I
D
= 250µA
V
(BR)DSS
/
T
J
Breakdown Voltage Temp. Coefficient
––– 0.091 ––– V/°C Reference to 25°C, I
D
= 5mA
R
DS(on)
Static Drain-to-Source On-Resistance
–––
3.3
4.1
m
V
GS
= 10V, I
D
= 75A
V
GS(th)
Gate Threshold Voltage
2.0
–––
4.0
V V
DS
= V
GS
, I
D
= 150µA
gfs
Forward Trans conductance
280
––– –––
S V
DS
= 50V, I
D
= 75A
R
G
Gate Resistance
––– 0.80 –––
I
DSS
Drain-to-Source Leakage Current
––– ––– 20
µA
V
DS
= 75V, V
GS
= 0V
––– ––– 250
V
DS
= 75V,V
GS
= 0V,T
J
=125°C
I
GSS
Gate-to-Source Forward Leakage
–––
––– 100
nA
V
GS
= 20V
Gate-to-Source Reverse Leakage
–––
––– -100
V
GS
= -20V
Dynamic Electrical Characteristics @ T
J
= 25°C (unless otherwise specified)
Q
g
Total Gate Charge
–––
120 170
nC
I
D
= 75A
Q
gs
Gate-to-Source Charge
–––
27
–––
V
DS
= 38V
Q
gd
Gate-to-Drain Charge
–––
33
–––
V
GS
= 10V
Q
sync
Total Gate Charge Sync. (Q
g
- Q
gd
) –––
87
–––
t
d(on)
Turn-On Delay Time
–––
20
–––
ns
V
DD
= 49V
t
r
Rise Time
–––
68
–––
I
D
= 75A
t
d(off)
Turn-Off Delay Time
–––
55
–––
R
G
= 2.7
t
f
Fall Time
–––
68
–––
V
GS
= 10V
C
iss
Input Capacitance
––– 6920 –––
pF
V
GS
= 0V
C
oss
Output Capacitance
–––
600 –––
V
DS
= 50V
C
rss
Reverse Transfer Capacitance
–––
270 –––
ƒ = 1.0MHz, See Fig. 5
C
oss eff.(ER)
Effective Output Capacitance (Energy Related) –––
770 –––
V
GS
= 0V, V
DS
= 0V to 60V
C
oss eff.(TR)
Effective Output Capacitance (Time Related)
–––
960 –––
V
GS
= 0V, V
DS
= 0V to 60V
Diode Characteristics
Parameter
Min. Typ. Max. Units
Conditions
I
S
Continuous Source Current
––– ––– 170
A
MOSFET symbol
(Body Diode)
showing the
I
SM
Pulsed Source Current
––– ––– 670
integral reverse
(Body Diode)
p-n junction diode.
V
SD
Diode Forward Voltage
–––
–––
1.3
V T
J
= 25°C,I
S
= 75A,V
GS
= 0V
t
rr
Reverse Recovery Time
––– 36 54
ns
T
J
= 25°C V
DD
= 64V
––– 41 62
T
J
= 125°C I
F
= 75A,
Q
rr
Reverse Recovery Charge
––– 50 75
nC
T
J
= 25°C di/dt = 100A/µs
––– 67 100
T
J
= 125°C
I
RRM
Reverse Recovery Current
–––
2.4
–––
A T
J
= 25°C
t
on
Forward Turn-On Time
Intrinsic turn-on time is negligible (turn-on is dominated by L
S
+L
D
)
AUIRFS/SL3207Z
3
2015-10-27
Fig. 2 Typical Output Characteristics
Fig. 3
Typical Transfer Characteristics
Fig. 1 Typical Output Characteristics
Fig 5. Typical Capacitance vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage
Fig. 4
Normalized On-Resistance vs. Temperature
0.1
1
10
100
VDS, Drain-to-Source Voltage (V)
10
100
1000
I D
, D
ra
in
-t
o
-S
ou
rc
e
C
u
rr
en
t
(A
)
VGS
TOP 15V
10V
8.0V
6.0V
5.5V
5.0V
4.8V
BOTTOM
4.5V
60µs PULSE WIDTH
Tj = 25°C
4.5V
0.1
1
10
100
VDS, Drain-to-Source Voltage (V)
10
100
1000
I D
, D
ra
in
-t
o-
S
ou
rc
e
C
u
rr
en
t (
A
)
4.5V
60µs PULSE WIDTH
Tj = 175°C
VGS
TOP 15V
10V
8.0V
6.0V
5.5V
5.0V
4.8V
BOTTOM
4.5V
2
3
4
5
6
7
VGS, Gate-to-Source Voltage (V)
0.1
1
10
100
1000
I D
, D
ra
in
-t
o-
S
ou
rc
e
C
ur
re
nt
(A
)
TJ = 25°C
TJ = 175°C
VDS = 25V
60µs PULSE WIDTH
-60 -40 -20 0 20 40 60 80 100120140160180
TJ , Junction Temperature (°C)
0.5
1.0
1.5
2.0
2.5
R
D
S
(o
n)
,
D
ra
in
-t
o-
S
ou
rc
e
O
n
R
es
is
ta
nc
e
(
N
or
m
al
iz
ed
)
ID = 75A
VGS = 10V
1
10
100
VDS, Drain-to-Source Voltage (V)
100
1000
10000
100000
C
, C
ap
ac
ita
nc
e
(p
F
)
VGS = 0V, f = 1 MHZ
Ciss = Cgs + Cgd, C ds SHORTED
Crss = Cgd
Coss = Cds + Cgd
Coss
Crss
Ciss
0
20
40
60
80
100
120
140
QG, Total Gate Charge (nC)
0.0
2.0
4.0
6.0
8.0
10.0
12.0
V
G
S
, G
at
e-
to
-S
ou
rc
e
V
ol
ta
ge
(
V
)
VDS= 60V
VDS= 38V
VDS= 15V
ID= 75A
AUIRFS/SL3207Z
4
2015-10-27
Fig 8. Maximum Safe Operating Area
Fig 10. Drain-to-Source Breakdown Voltage
Fig 11. Typical C
OSS
Stored Energy
Fig 12. Maximum Avalanche Energy vs. Drain Current
Fig 9. Maximum Drain Current vs. Case Temperature
0.0
0.5
1.0
1.5
2.0
2.5
VSD, Source-to-Drain Voltage (V)
0.1
1
10
100
1000
I S
D
, R
ev
er
se
D
ra
in
C
ur
re
nt
(
A
)
TJ = 25°C
TJ = 175°C
VGS = 0V
1
10
100
VDS, Drain-to-Source Voltage (V)
0.1
1
10
100
1000
10000
I D
,
D
ra
in
-t
o-
S
ou
rc
e
C
ur
re
nt
(
A
)
OPERATION IN THIS AREA
LIMITED BY R DS(on)
Tc = 25°C
Tj = 175°C
Single Pulse
100µsec
1msec
10msec
DC
25
50
75
100
125
150
175
TC , Case Temperature (°C)
0
20
40
60
80
100
120
140
160
180
I D
,
D
ra
in
C
ur
re
nt
(
A
)
Limited By Package
Fig. 7 Typical Source-to-Drain Diode
Forward Voltage
-60 -40 -20 0 20 40 60 80 100 120140160 180
TJ , Temperature ( °C )
70
75
80
85
90
95
100
V
(B
R
)D
S
S
, D
ra
in
-t
o-
S
ou
rc
e
B
re
ak
do
w
n
V
ol
ta
ge
(
V
)
Id = 5mA
-10
0
10
20
30
40
50
60
70
80
VDS, Drain-to-Source Voltage (V)
0.0
0.5
1.0
1.5
2.0
2.5
E
ne
rg
y
(µ
J)
25
50
75
100
125
150
175
Starting TJ , Junction Temperature (°C)
0
100
200
300
400
500
600
700
E
A
S
,
S
in
gl
e
P
ul
se
A
va
la
nc
he
E
ne
rg
y
(m
J)
ID
TOP 17A
30A
BOTTOM 102A
AUIRFS/SL3207Z
5
2015-10-27
Fig 14. Avalanche Current vs. Pulse width
Fig 15. Maximum Avalanche Energy vs. Temperature
Notes on Repetitive Avalanche Curves , Figures 14, 15:
(For further info, see AN-1005 at www.infineon.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a temperature far in
excess of T
jmax
. This is validated for every part type.
2. Safe operation in Avalanche is allowed as long as T
jmax
is not exceeded.
3. Equation below based on circuit and waveforms shown in Figures 18a, 18b.
4. P
D (ave)
= Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during
avalanche).
6. I
av
= Allowable avalanche current.
7.
T
=
Allowable rise in junction temperature, not to exceed
T
jmax
(assumed as
25°C in Figure 13, 14).
t
av =
Average time in avalanche.
D = Duty cycle in avalanche = t
av
·f
Z
thJC
(D, t
av
) = Transient thermal resistance, see Figures 13)
P
D (ave)
= 1/2 ( 1.3·BV·I
av
) =
T/ Z
thJC
I
av
= 2
T/ [1.3·BV·Z
th
]
E
AS (AR)
= P
D (ave)
·t
av
Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case
1E-006
1E-005
0.0001
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
0.001
0.01
0.1
1
T
he
rm
al
R
es
po
ns
e
(
Z
th
JC
)
0.20
0.10
D = 0.50
0.02
0.01
0.05
SINGLE PULSE
( THERMAL RESPONSE )
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
Ri (°C/W)
I (sec)
0.1049
0.000099
0.2469
0.001345
0.1484
0.008469
J
J
1
1
2
2
3
3
R
1
R
1
R
2
R
2
R
3
R
3
C
Ci=
iRi
Ci=
iRi
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
0.1
1
10
100
1000
A
va
la
nc
he
C
ur
re
nt
(
A
)
0.05
Duty Cycle =
Single Pulse
0.10
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming
j = 25°C and
Tstart = 150°C.
0.01
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming
Tj = 150°C and
Tstart =25°C (Single Pulse)
25
50
75
100
125
150
175
Starting TJ , Junction Temperature (°C)
0
20
40
60
80
100
120
140
160
180
200
E
A
R
,
A
va
la
nc
he
E
ne
rg
y
(m
J)
TOP Single Pulse
BOTTOM 1.0% Duty Cycle
ID = 102A
AUIRFS/SL3207Z
6
2015-10-27
Fig 16. Threshold Voltage vs. Temperature
Fig. 18 - Typical Recovery Current vs. di
f
/dt
Fig. 20 - Typical Stored Charge vs. di
f
/dt
Fig. 19 - Typical Stored Charge vs. di
f
/dt
-75 -50 -25 0 25 50 75 100 125 150 175 200
TJ , Temperature ( °C )
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
V
G
S
(t
h)
, G
at
e
th
re
sh
ol
d
V
ol
ta
ge
(
V
)
ID = 150µA
ID = 250µA
ID = 1.0mA
ID = 1.0A
0
200
400
600
800
1000
diF /dt (A/µs)
0
5
10
15
20
I R
R
(
A
)
IF = 30A
VR = 64V
TJ = 25°C
TJ = 125°C
0
200
400
600
800
1000
diF /dt (A/µs)
0
5
10
15
20
I R
R
(
A
)
IF = 45A
VR = 64V
TJ = 25°C
TJ = 125°C
0
200
400
600
800
1000
diF /dt (A/µs)
20
100
180
260
340
Q
R
R
(
nC
)
IF = 30A
VR = 64V
TJ = 25°C
TJ = 125°C
Fig. 17 - Typical Recovery Current vs. di
f
/dt
0
200
400
600
800
1000
diF /dt (A/µs)
20
100
180
260
340
Q
R
R
(
nC
)
IF = 45A
VR = 64V
TJ = 25°C
TJ = 125°C
AUIRFS/SL3207Z
7
2015-10-27
Fig 21. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs
Fig 22a. Unclamped Inductive Test Circuit
Fig 22b. Unclamped Inductive Waveforms
Fig 23a. Switching Time Test Circuit
Fig 24a. Gate Charge Test Circuit
Fig 24b. Gate Charge Waveform
R G
IAS
0.01
tp
D.U.T
L
VDS
+
- VDD
DRIVER
A
15V
20V
tp
V
(BR)DSS
I
AS
Fig 23b. Switching Time Waveforms
Vds
Vgs
Id
Vgs(th)
Qgs1 Qgs2
Qgd
Qgodr
AUIRFS/SL3207Z
8
2015-10-27
Note: For the most current drawing please refer to IR website at
http://www.irf.com/package/
D
2
Pak (TO-263AB) Part Marking Information
YWWA
XX
XX
Date Code
Y= Year
WW= Work Week
AUFS3207Z
Lot Code
Part Number
IR Logo
D
2
Pak (TO-263AB) Package Outline (Dimensions are shown in millimeters (inches))
AUIRFS/SL3207Z
9
2015-10-27
TO-262 Part Marking Information
YWWA
XX
XX
Date Code
Y= Year
WW= Work Week
AUFSL3207Z
Lot Code
Part Number
IR Logo
TO-262 Package Outline (Dimensions are shown in millimeters (inches)
Note: For the most current drawing please refer to IR website at
http://www.irf.com/package/
AUIRFS/SL3207Z
10
2015-10-27
D
2
Pak (TO-263AB) Tape & Reel Information (Dimensions are shown in millimeters (inches))
Note: For the most current drawing please refer to IR website at
http://www.irf.com/package/
3
4
4
TRR
FEED DIRECTION
1.85 (.073)
1.65 (.065)
1.60 (.063)
1.50 (.059)
4.10 (.161)
3.90 (.153)
TRL
FEED DIRECTION
10.90 (.429)
10.70 (.421)
16.10 (.634)
15.90 (.626)
1.75 (.069)
1.25 (.049)
11.60 (.457)
11.40 (.449)
15.42 (.609)
15.22 (.601)
4.72 (.136)
4.52 (.178)
24.30 (.957)
23.90 (.941)
0.368 (.0145)
0.342 (.0135)
1.60 (.063)
1.50 (.059)
13.50 (.532)
12.80 (.504)
330.00
(14.173)
MAX.
27.40 (1.079)
23.90 (.941)
60.00 (2.362)
MIN.
30.40 (1.197)
MAX.
26.40 (1.039)
24.40 (.961)
NOTES :
1. COMFORMS TO EIA-418.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION MEASURED @ HUB.
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.