CoolSET
®
-F3R80
I C E 3 A R 4 7 8 0 C J Z
O f f - L i n e S M P S C u r r e n t M o d e
C o n t r o l l e r w i t h i n t e g r a t e d 8 0 0 V
C o o l M O S
®
a n d S t a r t u p c e l l
( b r o w n o u t & C C M ) i n D I P - 7
N e v e r s t o p t h i n k i n g .
P o w e r M a n a g e m e n t & S u p p l y
V e r s i o n 2 . 0 , 1 9 A p r 2 0 1 3
Edition 2013-04-19
Published by
Infineon Technologies AG
81726 München, Germany
©
Infineon Technologies AG 4/19/13.
All Rights Reserved.
Attention please!
The information given in this data sheet shall in no event be regarded as a guarantee of conditions or
characteristics (“Beschaffenheitsgarantie”). With respect to any examples or hints given herein, any typical values
stated herein and/or any information regarding the application of the device, Infineon Technologies hereby
disclaims any and all warranties and liabilities of any kind, including without limitation warranties of
non-infringement of intellectual property rights of any third party.
Information
For further information on technology, delivery terms and conditions and prices please contact your nearest
Infineon Technologies Office (
www.infineon.com
).
Warnings
Due to technical requirements components may contain dangerous substances. For information on the types in
question please contact your nearest Infineon Technologies Office.
Infineon Technologies Components may only be used in life-support devices or systems with the express written
approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure
of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support
devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain
and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may
be endangered.
For questions on technology, delivery and prices please contact the Infineon Technologies Offices in Germany or
the Infineon Technologies Companies and Representatives worldwide: see our webpage at http://
www.infineon.com
CoolMOS
®
, CoolSET
®
are trademarks of Infineon Technologies AG.
CoolSET
®
-F3R80
ICE3AR4780CJZ
Revision History:
2013-04-19
Datasheet Version 2.0
Previous Version: V 0.1
Type
Package
Marking
V
DS
F
OSC
R
DSon
1)
1)
typ @ T=25°C
230VAC ±15%
2)
2)
Calculated maximum input power rating at T
a
=50°C, T
i
=125°C and without copper area as heat sink.
85-265 VAC
2)
ICE3AR4780CJZ
PG-DIP-7
3AR4780CJZ
800V
100kHz
4.7
Ω
31W
20W
CoolSET
®
-F3R80
ICE3AR4780CJZ
Version 2.0
3
19 Apr 2013
Off-Line SMPS Current Mode Controller with
integrated 800V CoolMOS
®
and Startup cell
(brownout & CCM) in DIP-7
P-DIP-7-1
PG-DIP7
C
VCC
C
Bulk
Converter
DC Output
+
Snubber
Power Management
PWM Controller
Current Mode
85 ... 270 VAC
Typical Application
R
Sense
FBB
Control
Unit
-
CS
VCC
Startup Cell
Precise Low Tolerance Peak
Current Limitation
Drain
CoolSET
®
-F3R80
(Brownout & CCM)
CoolMOS
®
GND
R
BO2
R
BO1
Active Burst Mode
Auto Restart/ Latch
Mode
Brownout mode
BRL
R
sel
Features
•
800V avalanche rugged CoolMOS
®
with Startup Cell
•
Active Burst Mode for lowest Standby Power
•
Slope compensation for CCM operation
•
Selectable entry and exit burst mode level
•
100kHz internally fixed switching frequency with
jittering feature
•
Auto Restart Protection for Over load, Open Loop,
VCC Under voltage & Over voltage and Over
temperature
•
External latch enable pin and fast AC reset
•
Over temperature protection with 50
°C hysteresis
•
Built-in 10ms Soft Start
•
Built-in 40ms blanking time for short duration peak
power
•
Propagation delay compensation for both maximum
load and burst mode
•
Brownout feature
•
BiCMOS technology for low power consumption and
wide VCC voltage range
•
Soft gate drive with 50
Ω turn on resistor
Description
The ICE3ARxx80CJZ is an enhanced version of
ICE3ARxx80JZ (CoolSET
®
-F3R80). The PWM controller
is based on F3R80 with new and enhanced features. The
major new features include slope compensation for CCM
operation and fast AC reset after latch enabled. The
major enhanced features include fixed voltage brownout
detect and voltage detect for the burst selection. In
particular it is a device running at 100KHz, implemented
with brownout features, installing 800V CoolMOS
®
with
startup cell and packaged into DIP-7. It targets for the low
power SMPS with increased MOSFET voltage margin
requirement such as Off-Line battery adapters, DVD R/
W, DVD Combi, Blue ray, set top box, auxiliary power
supply for PC and server, etc. In summary, this enhanced
ICE3ARxx80CJZ provides 800V MOSFET, lowest
standby power, CCM opeation, selectable burst level,
brownout feature, maximum power compensated for both
maximum and standby load, low EMI with frequency
jittering and soft gate drive, built-in and flexible
protections, etc. Therefore, ICE3ARxx80CJZ is a
complete solution for the low power SMPS application.
Product Highlights
•
800V avalanche rugged CoolMOS
®
with startup cell
•
CCM and DCM operation with slope compensation
•
Active Burst Mode to reach the lowest Standby Power <100mW
•
Active burst mode with selectable entry and exit burst mode level
•
Frequency jitter and soft driving for low EMI
•
Brownout feature
•
Latch enable and fast AC reset
•
Auto Restart protection for over load, over temperature and over voltage
•
Pb-free lead plating; RoHS compliant
CoolSET
®
-F3R80
ICE3AR4780CJZ
Table of Contents
Page
Version 2.0
4
19 Apr 2013
1
Pin Configuration and Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6
1.1
Pin Configuration with PG-DIP-7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6
1.2
Pin Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6
2
Representative Blockdiagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
3
Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
3.1
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
3.2
Power Management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
3.3
Improved Current Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
3.3.1
PWM-OP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
3.3.2
PWM-Comparator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
3.3.3
Slope Compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
3.4
Startup Phase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
3.5
PWM Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
3.5.1
Oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
3.5.2
PWM-Latch FF1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
3.5.3
Gate Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
3.6
Current Limiting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
3.6.1
Leading Edge Blanking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
3.6.2
Combined OPP curve considering Propagation Delay and Slope Compen-
sation 14
3.7
Control Unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
3.7.1
Active Burst Mode (patented) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
3.7.1.1
Selectable burst entry level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
3.7.1.2
Entering Active Burst Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
3.7.1.3
Working in Active Burst Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
3.7.1.4
Leaving Active Burst Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
3.7.2
Protection Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17
3.7.2.1
Vcc OVP, OTP, external protection enable and Vcc under voltage . . .18
3.7.2.2
Over load, open loop protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18
3.7.3
Brownout Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18
3.7.4
Fast AC reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
4
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21
4.1
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21
4.2
Operating Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22
4.3
Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22
4.3.1
Supply Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22
4.3.2
Internal Voltage Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23
4.3.3
PWM Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23
4.3.4
Soft Start time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23
4.3.5
Control Unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24
4.3.6
Current Limiting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25
CoolSET
®
-F3R80
ICE3AR4780CJZ
Version 2.0
5
19 Apr 2013
4.3.7
CoolMOS
®
Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25
5
CoolMOS
®
Perfromance Characteristic . . . . . . . . . . . . . . . . . . . . . . . . . .26
6
Input Power Curve . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .28
7
Outline Dimension . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29
8
Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .30
9
Schematic for recommended PCB layout . . . . . . . . . . . . . . . . . . . . . . . .31
Version 2.0
6
19 Apr 2013
CoolSET
®
-F3R80
ICE3AR4780CJZ
Pin Configuration and Functionality
1
Pin Configuration and Functionality
1.1
Pin Configuration with PG-DIP-7
Figure 1
Pin Configuration PG-DIP-7 (top view)
1.2
Pin Functionality
BRL (Brownout, fast AC Reset & Latch enable)
The BRL pin combines the functions of brownout, fast
AC reset and the external latch enable. The brownout
feature is to stop the switching pulse when the input
voltage is dropped to lower than 1V. The Fast AC reset
feature is to recover from latch feature when the
voltage of BRL pin has a rising rate of <1.33V/ms from
0.4V to 1V. The external latch enable function is an
external access to stop the gate switching and force the
IC to enter latch mode. It is triggered by pulling the pin
voltage to less than 0.4V.
FBB (Feedback & Burst entry select)
The FBB pin combines the feedback function and the
burst entry/exit control. The regulation information is
provided by the FBB pin to the internal Protection Unit
and the internal PWM-Comparator to control the duty
cycle. The FBB-signal is the only control signal in case
of light load at the Active Burst Mode. The burst entry
select provides an access to select the entry/exit burst
mode level.
CS (Current Sense)
The Current Sense pin senses the voltage developed
on the shunt resistor inserted in the source of the
integrated CoolMOS
®
. If CS reaches the internal
threshold of the Current Limit Comparator, the Driver
output is immediately switched off. Furthermore the
current information is provided for the PWM-
Comparator to realize the Current Mode operation.
Drain (Drain of integrated CoolMOS
®
)
The Drain pin is the connection to the Drain of the
integrated CoolMOS
®
.
VCC (Power Supply)
The VCC pin is the power supply of the IC. The voltage
operating range is between 10.5V and 24.7V.
GND (Ground)
The GND pin is the ground of the controller.
Pin
Symbol
Function
1
BRL
Brownout, fast AC Reset &
Latch enable
2
FBB
Feedback & Burst entry/exit con-
trol
3
CS
Current Sense/
800V CoolMOS
®
Source
4
n.c.
not connected
5
Drain
800V CoolMOS
®
Drain
6
- (no
pin)
7
VCC
Controller Supply Voltage
8
GND
Controller Ground
Package PG-DIP-7
1
7
8
4
3
2
5
GND
BRL
FBB
CS
VCC
n.c.
Drain
CoolSET
®
-F3R80
ICE3AR4780CJZ
Representative Blockdiagram
Version 2.0
7
19 Apr 2013
2
Representative Blockdiagram
Figure 2
Representative Blockdiagram
Internal
Bias
Voltage
Reference
Oscillator
Duty
Cycl
e
max
x3.25
Current
Limiting
PW
M
O
P
Current
Mode
Soft
Start
R
FB
Power
Management
C
VCC
85
...
270
V
AC
C
Bulk
+
Converter
DC
Output
V
OUT
C4
4.5V
Gate
Driver
0.
75
Cl
ock
R
Sense
C6a
3.
2V
C5
V
FB_burst
C1
0
R
S
Q
&
G3
&
G5
GND
C7
C8
FBB
PWM
Section
Control
Unit
FF1
C12
25k
2pF
5.
0V
5.0V
Undervoltage
L
ockout
V
csth
-
ICE3ARxxx80CJZ
/
C
oolSET
®
-F3R80CCM
VCC
CoolMOS
®
Startup
C
ell
C6b
3.5V
G7
0.6V
10.5V
17V
#1
:R
BO0,
R
BO1
&R
BO2
are
u
sed
for
brownout
feature
(need
to
tie
h
igh
BRL
if
n
o
b
rownout
feature
needed)
#2
:
T
LE
is
used
to
enable
the
external
Latch-Mode
feature
Fr
eq.
jitter
Latch
Enable
Signal
T
LE
#2
R
sel
BRL
V
csth_burst
Bur
st
detect
and
adjust
V
FB_burst
V
cs_burst
R
BO
1
R
BO2
#1
Power-Down
Reset
Sp
ike
B
lan
king
30us
1
G4
C9
4.0V
20ms
B
lankin
g
T
ime
Active
Burst
Mode
Auto
Restart
Mode
Thermal
Shutdow
n
T
j
>1
30°C
Soft
Start
Block
C3
0.4V
G6
&
#1
M
c
Slope
compensation
Latch
Mode
PWM
comparator
Soft
start
comparator
S5
Latch
Res
e
t
C1b
C1a
Brownout
mode
1.25V
R
S
Q
C2a
C2b
0.4V
B
lan
king
time
450
Nj
s
&
1V
C11
8V
Vc
c
G3
B
lan
king
time
210
us
R
BO0
#1
G2
5.0V
C
BR0
Cap
2
FF2
Snubber
C2
1V
25.5V
Vcc
120
us
B
lan
ki
ng
&
G11
CS
Drain
Maxim
u
m
p
ower
lim
it
P
rop
aga
tion-
Dela
y
Comp
ensa
tio
n-B
u
rs
t
10k
D1
1pF
or
G8
10k
D2
1pF
LE
B
1
80/2
20n
s
LE
B
180
/2
20n
s
B
lan
king
tim
e
270
Nj
s
R
slope
40ms
B
lanki
n
g
Time
CoolSET
®
-F3R80
ICE3AR4780CJZ
Functional Description
Version 2.0
8
19 Apr 2013
3
Functional Description
All values which are used in the functional description
are typical values. For calculating the worst cases the
min/max values which can be found in section 4
Electrical Characteristics have to be considered.
3.1
Introduction
ICE3ARxx80CJZ brownout and CCM 800V version is
an enhanced version of the CoolSET
®
-F3R80. The
major new and enhanced features include slope
compensation for CCM operation, fast AC reset after
latch enabled, fixed voltage brownout detect and
voltage detect for the burst selection. It is particular
good for high voltage margin low power SMPS
application such as auxiliary power supply for PC and
server. The major characteristics are that the IC is
developed with 800V CoolMOS
®
with start up cell,
having adjustable brownout feature, running at 100KHz
switching frequency, CCM operation and packed in
DIP-7 package.
The features include BiCMOS technology to reduce
power consumption and increase the Vcc voltage
range, cycle by cycle current mode control, built-in
10ms soft start to reduce the stress of switching
elements during start up, built-in 40ms for short period
of peak power before entering protection, active burst
mode for lowest standby power, propagation delay
compensation for close power limit between high line
and low line which also takes into consideration of
slope compensation, frequency jittering for low EMI
performance, the built-in auto-restart mode protections
for open loop, over load, Vcc OVP, Vcc under voltage,
and latch enable feature etc.
The other features include narrowing the feedback
voltage swing to 0.3V (from 0.5V) during burst mode so
that the output voltage ripple can be reduced by 40%,
reduction of the fast voltage fall time of the MOSFET by
increasing the soft turn-on time and addition of 50
Ω
turn-on resistor, faster start up time by optimizing the
Vcc capacitor to 10uF and over temperature protection
with 50°C hysteresis.
The new features include slope compensation for
stable operation in CCM mode when duty is larger than
0.5, fixed voltage triggering for the bronwout feature for
easier design, voltage levels select for entry/exit burst
level, fast AC reset fto reset the latch feature, etc.
In summary, the CoolSET
®
ICE3ARxx80CJZ provides
good voltage margin of MOSFET, lowest standby
power, flexible burst level, CCM operation, reduced
output ripple during burst mode, accurate power limit
for both maximum power and burst power, low EMI with
frequency jittering and soft gate drive, built-in and
flexible protections, etc. Therefore, CoolSET
®
ICE3ARxx80CJZ is a complete solution for the low
power SMPS application.
3.2
Power Management
Figure 3
Power Management
The Undervoltage Lockout monitors the external
supply voltage V
VCC
. When the SMPS is plugged to the
main line the internal Startup Cell is biased and starts
to charge the external capacitor C
VCC
which is
connected to the VCC pin. This VCC charge current is
controlled to 1.0mA by the Startup Cell. When the V
VCC
exceeds the on-threshold V
CCon
=17V the bias circuit
are switched on. Then the Startup Cell is switched off
by the Undervoltage Lockout and therefore no power
losses present due to the connection of the Startup Cell
to the Drain voltage. To avoid uncontrolled ringing at
switch-on, a hysteresis start up voltage is implemented.
The switch-off of the controller can only take place
when V
VCC
falls below 10.5V after normal operation
was entered. The maximum current consumption
before the controller is activated is about 210
μA.
When V
VCC
falls below the off-threshold V
CCoff
=10.5V,
the bias circuit is switched off and the soft start counter
is reset. Thus it ensures that at every startup cycle the
soft start starts at zero.
The internal bias circuit is switched off if Latched Off
Mode or Auto Restart Mode is entered. The current
consumption is then reduced to 420
μA.
Once the malfunction condition is removed, this block
will then turn back on. The recovery from Auto Restart
Mode does not require re-cycling the AC line. In case
Latched Off Mode is entered, VCC needs to be lowered
below 8V or having AC fast reset triggered to reset the
Internal Bias
Voltage
Reference
Power M anagem ent
Latched Off M ode
Reset; V
VCC
< 8V or
AC fast reset is
triggered
5.0V
Latched Off
M ode
Undervoltage Lockout
17V
10.5V
Power-Down Reset
Active Burst
M ode
Auto Restart
M ode
Startup Cell
VCC
Drain
CoolM OS
®
Soft Start block
CoolSET
®
-F3R80
ICE3AR4780CJZ
Functional Description
Version 2.0
9
19 Apr 2013
Latched Off Mode. This is done usually by re-cycling
the AC line.
When Active Burst Mode is entered, the internal Bias is
switched off most of the time but the Voltage Reference
is kept alive in order to reduce the current consumption
below 620
μA.
3.3
Improved Current Mode
Figure 4
Current Mode
Current Mode means the duty cycle is controlled by the
slope of the primary current. This is done by comparing
the FBB signal with the amplified current sense signal.
Figure 5
Pulse Width Modulation
In case the amplified current sense signal exceeds the
FBB signal the on-time t
on
of the driver is finished by
resetting the PWM-Latch (Figure 5).
The primary current is sensed by the external series
resistor R
Sense
inserted in the source of the integrated
CoolMOS
®
. By means of Current Mode regulation, the
secondary output voltage is insensitive to the line
variations. The current waveform slope will change with
the line variation, which controls the duty cycle.
The external R
Sense
allows an individual adjustment of
the maximum source current of the integrated
CoolMOS
®
.
To improve the Current Mode during light load
conditions the amplified current ramp of the PWM-OP
is superimposed on a voltage ramp, which is built by
the switch T2, the voltage source V1 and a resistor R1
(see Figure 6). Every time the oscillator shuts down for
maximum duty cycle limitation the switch T2 is closed
by V
OSC
. When the oscillator triggers the Gate Driver,
T2 is opened so that the voltage ramp can start.
Figure 6
Improved Current Mode
In case of light load the amplified current ramp is too
small to ensure a stable regulation. In that case the
Voltage Ramp is a well defined signal for the
comparison with the FBB-signal. The duty cycle is then
controlled by the slope of the Voltage Ramp.
By means of the time delay circuit which is triggered by
the inverted V
OSC
signal, the Gate Driver is switched-off
until it reaches approximately 156ns delay time (Figure
x3.25
PWM OP
Improved
Current Mode
0.6V
C8
PWM-Latch
CS
FBB
R
S
Q
Q
Driver
Soft-Start Comparator
t
FBB
Am plified Current Signal
t
on
t
0.6V
Driver
PWM OP
0.6V
10k
Ω
Oscillator
C8
T
2
R
1
FBB
PWM-Latch
V
1
Gate Driver
Voltage Ramp
V
OSC
Soft-Start Comparator
time delay
circuit (156ns)
X3.25
PWM Comparator
CoolSET
®
-F3R80
ICE3AR4780CJZ
Functional Description
Version 2.0
10
19 Apr 2013
7). It allows the duty cycle to be reduced continuously
till 0% by decreasing V
FBB
below that threshold.
Figure 7
Light Load Conditions
3.3.1
PWM-OP
The input of the PWM-OP is applied over the internal
leading edge blanking to the external sense resistor
R
Sense
connected to pin CS. R
Sense
converts the source
current into a sense voltage. The sense voltage is
amplified with a gain of 3.25 by PWM OP. The output
of the PWM-OP is connected to the voltage source V
1
.
The voltage ramp with the superimposed amplified
current signal is fed into the positive inputs of the PWM-
Comparator C8 and the Soft-Start-Comparator (Figure
8).
3.3.2
PWM-Comparator
The PWM-Comparator compares the sensed current
signal of the integrated CoolMOS
®
with the feedback
signal V
FBB
(Figure 8). V
FBB
is created by an external
optocoupler or external transistor in combination with
the internal pull-up resistor R
FB
and provides the load
information of the feedback circuitry. When the
amplified current signal of the integrated CoolMOS
®
exceeds the signal V
FBB
the PWM-Comparator
switches off the Gate Driver.
Figure 8
PWM Controlling
3.3.3
Slope Compensation
Due to the sub harmonic oscillation of CCM operation
when duty cycle is larger than 50%, the slope
compensation is added.
The slope Mc; 50mV/
μs is added to the current sense
pin when gate is on.
During burst mode operation, the Mc slope is shut
down and no slope added into the current sense signal.
This can save the power consumption at burst mode.
Figure 9
Slope compesnation
t
t
V
OSC
0.6V
FBB
t
max.
Duty Cycle
Gate
Driver
Voltage
Ramp
156ns time delay
X3.25
PWM OP
Improved
Current Mode
PWM Comparator
CS
Soft-Start Comparator
5V
C8
0.6V
FBB
Optocoupler
R
FB
PWM-Latch
x3.25
PWM OP
Gate Drive
signal
C8
0.62V
M
c
=50mV/us
Slope
compensation
PWM
comparator
S5
5.0V
10k
Ω
D2
1pF
LEB
180/220ns
R
slope
FB
Active burst
mode
PWM latch
CS