Data Sheet
1
V1.0, 2007-05-13
Smart High-Side Power Switch
BTS740S2
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Data Sheet
2
V1.0, 2007-05-13
Smart High-Side Power Switch
BTS740S2
)XQFWLRQDOGLDJUDP
Pin Definitions and Functions
Pin
Symbol
Function
1,10,
11,12,
15,16,
19,20
V
bb
Positive power supply voltage. Design the
wiring for the simultaneous max. short circuit
currents from channel 1 to 2 and also for low
thermal resistance
3 IN1
Input 1,2, activates channel 1,2 in case of
7
IN2
logic high signal
17,18 OUT1 Output 1,2, protected high-side power output
13,14
OUT2
of channel 1,2. Both pins of each output have
to be connected in parallel for operation
according ths spec (e.g. k
ilis
). Design the wiring
for the max. short circuit current
4 ST1
Diagnostic feedback 1,2 of channel 1,2,
8
ST2
open drain, invers to input level
2 GND1
Ground 1 of chip 1 (channel 1)
6 GND2
Ground 2 of chip 2 (channel 2)
5 IS1
9 IS2
Sense current output 1,2; proportional to the
load current, zero in the case of current
limitation of the load current
Pin configuration
(top view)
V
bb
1
•
20 V
bb
GND1 2
19 V
bb
IN1 3
18 OUT1
ST1 4
17 OUT1
IS1 5
16 V
bb
GND2 6
15 V
bb
IN2 7
14 OUT2
ST2 8
13 OUT2
IS2 9
12 V
bb
V
bb
10
11 V
bb
287
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Data Sheet
3
V1.0, 2007-05-13
Smart High-Side Power Switch
BTS740S2
Maximum Ratings
at
T
j
= 25°C unless otherwise specified
Parameter Symbol
Values
Unit
Supply voltage (overvoltage protection see page 5)
V
bb
43
V
Supply voltage for full short circuit protection
T
j,start
= -40 ...+150°C
V
bb
34
V
Load current (Short-circuit current, see page 5)
I
L
self-limited
A
Load dump protection
1
)
V
LoadDump
=
V
A
+
V
s
,
V
A
= 13.5 V
R
I
2
)
= 2
Ω, t
d
= 200 ms; IN = low or high,
each channel loaded with
R
L
= 7.0
Ω,
V
Load dump
3
)
60
V
Operating temperature range
Storage temperature range
T
j
T
stg
-40 ...+150
-55 ...+150
°C
Power dissipation (DC)
4)
T
a
= 25°C:
(all channels active)
T
a
= 85°C:
P
tot
3.8
2.0
W
Maximal switchable inductance, single pulse
V
bb
= 12V,
T
j,start
= 150°C
4)
,
I
L
= 5.5 A,
E
AS
= 370 mJ, 0
Ω one
channel:
I
L
= 8.5 A,
E
AS
= 790 mJ, 0
Ω
two parallel channels:
see diagrams on page 10
Z
L
18
16
mH
Electrostatic discharge capability (ESD)
IN:
(Human Body Model)
ST, IS:
out to all other pins shorted:
acc. MIL-STD883D, method 3015.7 and ESD assn. std. S5.1-1993
R=1.5k
Ω; C=100pF
V
ESD
1.0
4.0
8.0
kV
nput voltage (DC)
V
IN
-10 ... +16
V
Current through input pin (DC)
Current through status pin (DC)
Current through current sense pin (DC)
see internal circuit diagram page 9
I
IN
I
ST
I
IS
±2.0
±5.0
±14
mA
Thermal Characteristics
Parameter and Conditions
Symbol
Values
Unit
min typ
Max
Thermal resistance
junction - soldering point
4),5)
each
channel:
R
thjs
-- --
12
K/W
junction - ambient
4)
one channel active:
all channels active:
R
thja
--
--
40
33
--
--
) Supply voltages higher than V
bb(AZ)
require an external current limit for the GND and status pins (a 150
Ω
resistor for the GND connection is recommended.
)
R
I
= internal resistance of the load dump test pulse generator
)
V
Load dump
is setup without the DUT connected to the generator per ISO 7637-1 and DIN 40839
) Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6cm
2
(one layer, 70
µm thick) copper area for Vbb
connection PCB is vertical without blown air See page 15
Data Sheet
4
V1.0, 2007-05-13
Smart High-Side Power Switch
BTS740S2
Parameter and Conditions,
each of the two channels
Symbol
Values
Unit
at T
j
= -40...+150°C,
V
bb
= 12 V unless otherwise specified
min typ
max
Load Switching Capabilities and Characteristics
On-state resistance (Vbb to OUT);
IL = 5 A
each channel,
T
j
= 25°C:
T
j
= 150°C:
two parallel channels,
T
j
= 25°C:
R
ON
--
27
54
14
30
60
15
m
Ω
Output voltage drop limitation at small load
currents,
see page 14
I
L = 0.5 A
T
j =-40...+150°C:
V
ON(NL)
--
50 --
mV
Nominal load current
one channel active:
two parallel channels active:
Device on PCB
6
),
T
a = 85°C,
T
j ≤ 150°C
I
L(NOM)
4.9
7.8
5.5
8.5
--
A
Output current
while GND disconnected or pulled up
7
)
;
Vbb = 30 V,
V
IN = 0, see diagram page 10
I
L(GNDhigh)
-- -- 8
mA
Turn-on time
8
)
IN
to 90%
V
OUT
:
Turn-off time
IN
to 10%
V
OUT
:
R
L
= 12
Ω
t
on
t
off
25
25
70
80
150
200
µs
Slew rate on
8)
10 to 30%
V
OUT
,
R
L
= 12
Ω:
d
V/dt
on
0.1 -- 1
V/
µs
Slew rate off
8)
70 to 40%
V
OUT
,
R
L
= 12
Ω:
-d
V/dt
off
0.1 -- 1
V/
µs
Operating Parameters
Operating voltage
9
)
V
bb(on)
5.0
--
34
V
Undervoltage shutdown
V
bb(under)
3.2 --
5.0
V
Undervoltage restart
T
j
=-40...+25°C:
T
j
=+150°C:
V
bb(u rst)
-- 4.5 5.5
6.0
V
Undervoltage restart of charge pump
see diagram page 13
T
j
=-40...+25°C:
T
j
=150°C:
V
bb(ucp)
--
--
4.7
--
6.5
7.0
V
Undervoltage hysteresis
∆
V
bb(under) =
V
bb(u rst) -
V
bb(under)
∆V
bb(under)
-- 0.5 --
V
Overvoltage shutdown
V
bb(over)
34
--
43
V
Overvoltage restart
V
bb(o rst)
33 -- --
V
6
) Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6cm
2
(one layer, 70
µm thick) copper area for Vbb
connection. PCB is vertical without blown air. See page 15
7
) not subject to production test, specified by design
8
)
See timing diagram on page 11.
9)
At supply voltage increase up to
V
bb
= 4.7 V typ without charge pump,
V
OUT
≈
V
bb
- 2 V
Data Sheet
5
V1.0, 2007-05-13
Smart High-Side Power Switch
BTS740S2
Parameter and Conditions,
each of the two channels
Symbol
Values
Unit
at T
j
= -40...+150°C,
V
bb
= 12 V unless otherwise specified
min typ
max
Overvoltage hysteresis
∆V
bb(over)
-- 1 --
V
Overvoltage protection
10
)
T
j
=-40:
I
bb=40 mA
T
j
=+25...+150°C:
V
bb(AZ)
41
43
--
47
--
52
V
Standby current
11
)
T
j
=-40°C...25°C
:
V
IN
= 0;
T
j
=150°C:
I
bb(off)
--
--
8
24
30
50
µA
Leakage output current (included in
I
bb(off)
)
V
IN
= 0
I
L(off)
-- --
20
µA
Operating current
12)
,
V
IN
= 5V,
I
GND
=
I
GND1
+
I
GND2
,
one channel on:
two channels on:
I
GND
--
--
1.2
2.4
3
6
mA
Protection Functions
13)
Current limit,
(see timing diagrams, page 12)
T
j
=-40°C:
T
j
=25°C:
T
j
=+150°C:
I
L(lim)
48
40
31
56
50
37
65
58
45
A
Repetitive short circuit current limit,
T
j
=
T
jt
each channel
two parallel channels
(see timing diagrams, page 12)
I
L(SCr)
--
--
24
24
--
--
A
Initial short circuit shutdown time
T
j,start
=25°C:
(see timing diagrams on page 12)
t
off(SC)
--
2.0
--
ms
Output clamp (inductive load switch off)
14)
at VON(CL) = Vbb - VOUT
,
I
L= 40 mA
T
j
=-40°C:
T
j
=25°C...150°C:
V
ON(CL)
41
43
--
47
--
52
V
Thermal overload trip temperature
T
jt
150 -- --
°C
Thermal hysteresis
∆
T
jt
-- 10 --
K
10)
Supply voltages higher than V
bb(AZ)
require an external current limit for the GND and status pins (a 150
Ω
resistor in the GND connection is recommended). See also
V
ON(CL)
in table of protection functions and
circuit diagram page 9.
11
) Measured with load; for the whole device; all channels off
12
) Add
I
ST
, if
I
ST
> 0
13
Integrated protection functions are designed to prevent IC destruction under fault conditions described in the
data sheet. Fault conditions are considered as "outside" normal operating range. Protection functions are not
designed for continuous repetitive operation.
14
) If channels are connected in parallel, output clamp is usually accomplished by the channel with the lowest
V
ON(CL)
Data Sheet
6
V1.0, 2007-05-13
Smart High-Side Power Switch
BTS740S2
Parameter and Conditions,
each of the two channels
Symbol
Values
Unit
at T
j
= -40...+150°C,
V
bb
= 12 V unless otherwise specified
min typ
max
Reverse Battery
Reverse battery voltage
15
)
-
V
bb
--
--
32
V
Drain-source diode voltage
(V
out
> V
bb
)
I
L
= - 4.0 A,
T
j
= +150°C
-
V
ON
--
600
--
mV
Diagnostic Characteristics
Current sense ratio
16)
, static on-condition,
VIS = 0...5 V, Vbb(on) = 6.517)...27V,
kILIS = IL / IIS
T
j
= -40°C,
I
L
= 5 A:
k
ILIS
4350
4800
5800
T
j
= -40°C,
I
L
= 0.5 A:
3100 4800
7800
T
j
= 25...+150°C,
I
L
= 5 A:
T
j
= 25...+150°C,
I
L
= 0.5 A:
4350
3800
4800
4800
5350
6300
Current sense output voltage limitation
Tj = -40 ...+150°C
IIS = 0, IL = 5 A:
V
IS(lim)
5.4
6.1
6.9
V
Current sense leakage/offset current
Tj = -40 ...+150°C
V
IN=0,
V
IS = 0,
I
L = 0:
I
IS(LL)
0
--
1
µA
V
IN=5 V,
V
IS = 0,
I
L = 0:
I
IS(LH)
0 --
15
V
IN=5 V,
V
IS = 0,
V
OUT = 0
(short circuit)
I
IS(SH)
18
)
0 --
10
Current sense settling time to
I
IS static
±10% after
positive input slope
18)
,
IL = 0
5 A
t
son(IS)
--
--
300
µs
Current sense settling time to 10% of
I
IS
static after
negative input slope
18)
,
IL = 5
0 A
t
soff(IS)
--
30
100
µs
Current sense rise time (60% to 90%) after change
of load current
18) IL = 2.5
5 A
t
slc(IS)
--
10
--
µs
Open load detection voltage
19
)
(off-condition)
V
OUT(OL)
2 3
4
V
Internal output pull down
(
pin 17,18 to 2 resp. 13,14 to 6),
VOUT=5 V
R
O
5
15 40
k
Ω
15
) Requires a 150 Ω resistor in GND connection. The reverse load current through the intrinsic drain-source
diode has to be limited by the connected load. Power dissipation is higher compared to normal operating
conditions due to the voltage drop across the drain-source diode. The temperature protection is not active
during reverse current operation! Input and Status currents have to be limited (see max. ratings page 3 and
circuit page 9).
16)
This range for the current sense ratio refers to all devices. The accuracy of the
k
ILIS
can be raised at least by
a factor of two by matching the value of
k
ILIS
for every single device.
In the case of current limitation the sense current
I
IS
is zero and the diagnostic feedback potential
V
ST
is
High. See figure 2c, page 12.
17)
Valid if
V
bb(u rst)
was exceeded before.
18)
not subject to production test, specified by design
19)
External pull up resistor required for open load detection in off state
Data Sheet
7
V1.0, 2007-05-13
Smart High-Side Power Switch
BTS740S2
Parameter and Conditions,
each of the two channels
Symbol
Values
Unit
at T
j
= -40...+150°C,
V
bb
= 12 V unless otherwise specified
min typ
max
Input and Status Feedback
20
)
Input resistance
(see circuit page 9)
R
I
3.0
4.5 7.0
k
Ω
Input turn-on threshold voltage
V
IN(T+)
-- --
3.5
V
Input turn-off threshold voltage
V
IN(T-)
1.5 -- --
V
Input threshold hysteresis
∆
V
IN(T)
-- 0.5 --
V
Off state input current
V
IN
= 0.4 V:
I
IN(off)
1
-- 50
µA
On state input current
V
IN
= 5 V:
I
IN(on)
20 50 90
µA
Delay time for status with open load
after Input neg. slope
(see diagram page 13)
t
d(ST OL3)
--
400
--
µs
Status delay after positive input slope
(not subject to production test, specified by design)
t
don(ST)
--
13
--
µs
Status delay after negative input slope
(not subject to production test, specified by design)
t
doff(ST)
--
1
--
µs
Status output (open drain)
Zener limit voltage
T
j
=-40...+150°C,
I
ST
= +1.6 mA:
ST low voltage
T
j
=-40...+25°C,
I
ST
= +1.6 mA:
T
j
= +150°C,
I
ST
= +1.6 mA:
V
ST(high)
V
ST(low)
5.4
--
--
6.1
--
--
6.9
0.4
0.7
V
Status leakage current,
V
ST = 5 V,
T
j=25 ... +150°C:
I
ST(high)
--
--
2
µA
20)
If ground resistors R
GND
are used, add the voltage drop across these resistors.
Data Sheet
8
V1.0, 2007-05-13
Smart High-Side Power Switch
BTS740S2
Truth Table
Input 1
Output 1
Status 1
Current
Sense 1
Input 2
Output 2
Status 2
Current
Sense 2
level
level level
IIS
Normal
operation
L
H
L
H
H
L
0
nominal
Current-
limitation
L
H
L
H
H
H
0
0
Short circuit to
GND
L
H
L
L
21)
H
H
0
0
Over-
temperature
L
H
L
L
H
H
0
0
Short circuit to
V
bb
L
H
H
H
L
22)
L
0
<nominal
23)
Open load
L
H
L
24)
H
H (L
25)
)
L
0
0
Undervoltage L
H
L
L
H
L
0
0
Overvoltage L
H
L
L
H
L
0
0
Negative output
voltage clamp
L L H
0
L = "Low" Level
X = don't care
Z = high impedance, potential depends on external circuit
H = "High" Level
Status signal after the time delay shown in the diagrams (see fig 5. page 13)
Parallel switching of channel 1 and 2 is possible by connecting the inputs and outputs in parallel. The status
outputs ST1 and ST2 have to be configured as a 'Wired OR' function with a single pull-up resistor. The current
sense outputs IS1 and IS2 have to be connected with a single pull-down resistor.
Terms
352)(7
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Leadframe (V
bb
) is connected to pin 1,10,11,12,15,16,19,20
External R
GND
optional; two resistors R
GND1
, R
GND2
= 150
Ω or a single resistor R
GND
= 75
Ω for reverse
battery protection up to the max. operating voltage.
21
) The voltage drop over the power transistor is
V
bb
-
V
OUT
> 3V typ. Under this condition the sense current
I
IS
is
zero
22)
An external short of output to V
bb
, in the off state, causes an internal current from output to ground. If R
GND
is used, an offset voltage at the GND and ST pins will occur and the V
ST low
signal may be errorious.
23
) Low ohmic short to
V
bb
may reduce the output current
I
L
and therefore also the sense current
I
IS
.
24
) Power Transistor off, high impedance
Data Sheet
9
V1.0, 2007-05-13
Smart High-Side Power Switch
BTS740S2
Input circuit (ESD protection),
IN1 or IN2
,1
*1'
,
5
(6'='
,,
,
The use of ESD zener diodes as voltage clamp at DC
conditions is not recommended.
Status output,
ST1 or ST2
67
*1'
(6'
='
9
5
6721
ESD-Zener diode: 6.1 V typ., max 5.0 mA; R
ST(ON)
< 375
Ω
at 1.6 mA. The use of ESD zener diodes as voltage clamp at
DC conditions is not recommended.
Current sense output
,6
*1'
,6
5
,6
,
(6'='
,6
9
ESD-Zener diode: 6.1 V typ., max 14 mA;
R
IS
= 1 k
Ω nominal
Inductive and overvoltage output clamp,
OUT1 or OUT2
9EE
287
9=
9
21
3RZHU*1'
V
ON
clamped to
V
ON(CL)
= 47 V typ.
Overvoltage and reverse batt. protection
9EE
,1
,6
9
5
*1'
*1'
5
6LJQDO*1'
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352)(7
9=
,
5
9=
/RDG*1'
/RDG
5
287
67
5
9
67
,6
5
V
Z1
= 6.1 V typ.,
V
Z2
= 47 V typ.,
R
GND
= 150
Ω,
R
ST
=15k
Ω, R
I
=4.5k
Ω typ., R
IS
=1k
Ω, R
V
=15k
Ω,
In case of reverse battery the current has to be limited
by the load. Temperature protection is not active
Open-load detection
OUT1 or OUT2
OFF-state diagnostic condition:
V
OUT
> 3 V typ.; IN low
/RJLF
67
2XW
9287
6LJQDO*1'
5(;7
52
2))
9EE
Data Sheet
10
V1.0, 2007-05-13
Smart High-Side Power Switch
BTS740S2
GND disconnect
352)(7
9
,1
67
287
*1'
EE
9EE 9,1 967
9*1'
Any kind of load. In case of IN = high is
V
OUT
≈ V
IN
-
V
IN(T+)
.
Due to V
GND
> 0, no V
ST
= low signal available.
GND disconnect with GND pull up
352)(7
9
,1
67
287
*1'
EE
9EE
9*1'
9,1 967
Any kind of load. If V
GND
>
V
IN
-
V
IN(T+)
device stays off
Due to V
GND
> 0, no V
ST
= low signal available.
V
bb
disconnect with energized inductive
load
352)(7
9
,1
67
287
*1'
EE
9EE
KLJK
For inductive load currents up to the limits defined by Z
L
(max. ratings and diagram on page 10) each switch is
protected against loss of Vbb.
Consider at your PCB layout that in the case of Vbb dis-
connection with energized inductive load all the load current
flows through the GND connection.
Inductive load switch-off energy
dissipation
352)(7
9
,1
67
287
*1'
EE
(
(
(
($6
EE
/
5
(/RD
5/
/
^
/
=
Energy stored in load inductance:
E
L
=
1/2
·
L
·
I
2
L
While demagnetizing load inductance, the energy
dissipated in PROFET is
E
AS
= E
bb
+ E
L
- E
R
=
V
ON(CL)
·
i
L
(t) dt,
with an approximate solution for RL > 0 Ω:
E
AS
=
I
L
·
L
2
·
R
L
(
V
bb
+ |V
OUT(CL)
|)
OQ
(1+
I
L
·
R
L
|V
OUT(CL)
|
)
Maximum allowable load inductance for
a single switch off
(one channel)
4)
/ I,/Tj,start = 150°C, Vbb = 12 V, RL = 0 Ω
ZL [mH]