AUIRLR024N
AUIRLU024N
V
DSS
55V
R
DS(on)
max.
0.065
I
D
17A
Features
Advanced Planar Technology
Low
On-Resistance
Logic-Level Gate Drive
Dynamic dv/dt Rating
175°C Operating Temperature
Fast Switching
Fully Avalanche Rated
Repetitive Avalanche Allowed up to Tjmax
Lead-Free, RoHS Compliant
Automotive Qualified *
Description
Specifically designed for Automotive applications, this Cellular
design of HEXFET® Power MOSFETs utilizes the latest
processing techniques to achieve low on-resistance per silicon
area. This benefit combined with the fast switching speed and
ruggedized device design that HEXFET power MOSFETs are
well known for, provides the designer with an extremely efficient
and reliable device for use in Automotive and a wide variety of
other applications.
1
2017-10-05
HEXFET® is a registered trademark of Infineon.
*Qualification standards can be found at
www.infineon.com
AUTOMOTIVE GRADE
Symbol Parameter
Max.
Units
I
D
@ T
C
= 25°C
Continuous Drain Current, V
GS
@ 10V
17
A
I
D
@ T
C
= 100°C
Continuous Drain Current, V
GS
@ 10V
12
I
DM
Pulsed Drain Current 72
P
D
@T
C
= 25°C
Maximum Power Dissipation
45
W
Linear Derating Factor
0.3
W/°C
V
GS
Gate-to-Source Voltage
± 16
V
E
AS
Single Pulse Avalanche Energy (Thermally Limited) 68
mJ
I
AR
Avalanche Current 11
A
E
AR
Repetitive Avalanche Energy 4.5
mJ
dv/dt
Peak Diode Recovery dv/dt 5.0
V/ns
T
J
Operating Junction and
-55 to + 175
T
STG
Storage Temperature Range
°C
Soldering Temperature, for 10 seconds (1.6mm from case)
300
Absolute Maximum Ratings
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress
ratings only; and functional operation of the device at these or any other condition beyond those indicated in the specifications is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The thermal resistance
and power dissipation ratings are measured under board mounted and still air conditions. Ambient temperature (TA) is 25°C, unless
otherwise specified.
Thermal Resistance
Symbol Parameter
Typ.
Max.
Units
R
JC
Junction-to-Case
–––
3.3
°C/W
R
JA
Junction-to-Ambient ( PCB Mount) –––
50
R
JA
Junction-to-Ambient
–––
110
D-Pak
AUIRLR024N
I-Pak
AUIRLU024N
Base part number
Package Type
Standard Pack
Form
Quantity
AUIRLU024N
I-Pak
Tube
75
AUIRLU024N
AUIRLR024N
D-Pak
Tube
75
AUIRLR024N
Tape and Reel Left
3000
AUIRLR024NTRL
Orderable Part Number
G D S
Gate Drain Source
G
S
D
D
S
G
D
HEXFET
®
Power MOSFET
AUIRLR/U024N
2
2017-10-05
Notes:
Repetitive rating; pulse width limited by max. junction temperature. (See fig. 11)
V
DD
= 25V,
starting T
J
= 25°C, L = 790µH, R
G
= 25
, I
AS
= 11A, V
GS
=10V. (See Fig.12)
I
SD
11A, di/dt 290A/µs, V
DD
V
(BR)DSS
, T
J
175°C.
Pulse width
300µs; duty cycle 2%.
This is applied for I-PAK, L
S
of D-PAK is measured between lead and center of die contact .
Uses IRFZ24N data and test conditions.
When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer to
application note #AN-994
Static @ T
J
= 25°C (unless otherwise specified)
Parameter Min.
Typ.
Max.
Units
Conditions
V
(BR)DSS
Drain-to-Source Breakdown Voltage
55
––– –––
V V
GS
= 0V, I
D
= 250µA
V
(BR)DSS
/
T
J
Breakdown Voltage Temp. Coefficient
––– 0.061 ––– V/°C Reference to 25°C, I
D
= 1mA
R
DS(on)
Static Drain-to-Source On-Resistance
––– ––– 0.065
V
GS
= 10V, I
D
= 10A
––– ––– 0.080
V
GS
= 5.0V, I
D
= 10A
––– ––– 0.110
V
GS
= 4.0V, I
D
= 9.0A
V
GS(th)
Gate Threshold Voltage
1.0
–––
2.0
V V
DS
= V
GS
, I
D
= 250µA
gfs
Forward Trans conductance
8.3
––– –––
S V
DS
= 25V, I
D
= 11A
I
DSS
Drain-to-Source Leakage Current
––– ––– 25
µA
V
DS
= 55 V, V
GS
= 0V
––– ––– 250
V
DS
= 44V,V
GS
= 0V,T
J
=150°C
I
GSS
Gate-to-Source Forward Leakage
–––
––– 100
nA
V
GS
= 16V
Gate-to-Source Reverse Leakage
–––
––– -100
V
GS
= -16V
Dynamic Electrical Characteristics @ T
J
= 25°C (unless otherwise specified)
Q
g
Total Gate Charge
–––
–––
15
nC
I
D
= 11A
Q
gs
Gate-to-Source Charge
–––
–––
3.7
V
DS
= 44V
Q
gd
Gate-to-Drain Charge
–––
–––
8.5
V
GS
= 5.0V, See Fig 6 and 13
t
d(on)
Turn-On Delay Time
–––
7.1
–––
ns
V
DD
= 28V
t
r
Rise Time
–––
74
–––
I
D
= 11A
t
d(off)
Turn-Off Delay Time
–––
20
–––
R
G
= 12
V
GS
= 5.0V
t
f
Fall Time
–––
29
–––
R
D
= 2.4
See Fig 10
L
D
Internal Drain Inductance
–––
4.5
–––
nH
Between lead,
6mm (0.25in.)
L
S
Internal Source Inductance
–––
7.5
–––
from package
and center of die contact
C
iss
Input Capacitance
–––
480 –––
pF
V
GS
= 0V
C
oss
Output Capacitance
–––
130 –––
V
DS
= 25V
C
rss
Reverse Transfer Capacitance
–––
61
–––
ƒ = 1.0MHz, See Fig. 5
Diode Characteristics
Parameter
Min. Typ. Max. Units
Conditions
I
S
Continuous Source Current
––– ––– 17
A
MOSFET symbol
(Body Diode)
showing the
I
SM
Pulsed Source Current
––– ––– 72
integral reverse
(Body Diode)
p-n junction diode.
V
SD
Diode Forward Voltage
–––
–––
1.3
V T
J
= 25°C,I
S
= 11A,V
GS
= 0V
t
rr
Reverse Recovery Time
–––
60
90
ns T
J
= 25°C ,I
F
= 11A
Q
rr
Reverse Recovery Charge
–––
130 200
nC di/dt = 100A/µs
t
on
Forward Turn-On Time
Intrinsic turn-on time is negligible (turn-on is dominated by L
S
+L
D
)
AUIRLR/U024N
3
2017-10-05
Fig. 2 Typical Output Characteristics
Fig. 3
Typical Transfer Characteristics
Fig. 4 Normalized On-Resistance
vs. Temperature
Fig. 1 Typical Output Characteristics
0.1
1
10
100
0.1
1
10
100
I
, D
ra
in
-to
-S
ou
rce
C
urre
nt (A
)
D
V , Drain-to-Source Voltage (V)
DS
A
20µs PULSE WIDTH
T = 25°C
J
VGS
TOP 15V
12V
10V
8.0V
6.0V
4.0V
3.0V
BOTTOM 2.5V
2.5V
0.1
1
10
100
0.1
1
10
100
I
,
Dra
in
-to
-S
ou
rce
Cu
rre
nt
(A
)
D
V , Drain-to-Source Voltage (V)
DS
A
20µs PULSE WIDTH
T = 175°C
VGS
TOP 15V
12V
10V
8.0V
6.0V
4.0V
3.0V
BOTTOM 2.5V
2.5V
J
0.1
1
10
100
2
3
4
5
6
7
8
9
10
T = 25°C
J
GS
V , Gate-to-Source Voltage (V)
D
I
,
Dr
ain-t
o
-S
ou
rc
e C
u
rr
e
n
t (
A
)
T = 175°C
J
A
V = 15V
20µs PULSE WIDTH
DS
0.0
0.5
1.0
1.5
2.0
2.5
3.0
-60 -40 -20
0
20
40
60
80 100 120 140 160 180
J
T , Junction Temperature (°C)
R
, Dra
in-to-
S
ou
rce
On
Resi
sta
nc
e
DS
(o
n)
(N
or
m
al
ize
d)
V = 10V
GS
A
I = 18A
D
AUIRLR/U024N
4
2017-10-05
Fig 5. Typical Capacitance vs.
Drain-to-Source Voltage
Fig 6. Typical Gate Charge vs.
Gate-to-Source Voltage
Fig 8. Maximum Safe Operating Area
Fig. 7 Typical Source-to-Drain Diode
Forward Voltage
0
200
400
600
800
1
10
100
C
, Cap
ac
ita
nc
e
(pF
)
DS
V , Drain-to-Source Voltage (V)
A
V = 0V, f = 1MHz
C = C + C , C SHORTED
C = C
C = C + C
GS
iss gs gd ds
rss gd
oss ds gd
C
iss
C
oss
C
rss
0
3
6
9
12
15
0
4
8
12
16
20
Q , Total Gate Charge (nC)
G
V
, Gate
-t
o-
S
ourc
e V
oltag
e
(V
)
GS
A
FOR TEST CIRCUIT
SEE FIGURE 13
V = 44V
V = 28V
I = 11A
DS
DS
D
1
10
100
0.4
0.8
1.2
1.6
2.0
T = 25°C
J
V = 0V
GS
V , Source-to-Drain Voltage (V)
I
,
Reve
rs
e
Dr
ain C
ur
rent
(A)
SD
SD
A
T = 175°C
J
1
10
100
1000
1
10
100
V , Drain-to-Source Voltage (V)
DS
I
,
Dr
ai
n Cur
re
nt
(
A
)
OPERATION IN THIS AREA LIMITED
BY R
D
DS(on)
10µs
100µs
1ms
10ms
A
T = 25°C
T = 175°C
Single Pulse
C
J
AUIRLR/U024N
5
2017-10-05
Fig 10a. Switching Time Test Circuit
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Fig 9. Maximum Drain Current vs. Case Temperature
Fig 10b. Switching Time Waveforms
25
50
75
100
125
150
175
0
5
10
15
20
T , Case Temperature ( C)
I
, D
ra
in
C
urre
nt
(
A
)
°
C
D
0.01
0.1
1
10
0.00001
0.0001
0.001
0.01
0.1
1
t , Rectangular Pulse Duration (sec)
1
th
JC
D = 0.50
0.01
0.02
0.05
0.10
0.20
SINGLE PULSE
(THERMAL RESPONSE)
A
The
rm
a
l R
e
spo
n
se
(Z
)
P
t 2
1
t
DM
Notes:
1. Duty factor D = t / t
2. Peak T = P x Z + T
1
2
J
DM
thJC
C
AUIRLR/U024N
6
2017-10-05
Fig 12c. Maximum Avalanche Energy
vs. Drain Current
Fig 12a. Unclamped Inductive Test Circuit
Fig 12b. Unclamped Inductive Waveforms
RG
IAS
0.01
tp
D.U.T
L
VDS
+
- VDD
DRIVER
A
15V
20V
tp
V
(BR)DSS
I
AS
Fig 13b. Gate Charge Test Circuit
Fig 13a. Gate Charge Waveform
Vds
Vgs
Id
Vgs(th)
Qgs1 Qgs2
Qgd
Qgodr
0
20
40
60
80
100
120
140
25
50
75
100
125
150
175
J
E
,
S
in
gle
P
ul
se
Av
al
an
ch
e E
ne
rg
y (mJ)
AS
A
Starting T , Junction Temperature (°C)
V = 25V
I
TOP 4.5A
7.8A
BOTTOM 11A
DD
D
AUIRLR/U024N
7
2017-10-05
Fig 14. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs
AUIRLR/U024N
8
2017-10-05
D-Pak (TO-252AA) Package Outline (Dimensions are shown in millimeters (inches))
YWWA
XX
XX
Date Code
Y= Year
WW= Work Week
AULR024N
Lot Code
Part Number
IR Logo
D-Pak (TO-252AA) Part Marking Information
AUIRLR/U024N
9
2017-10-05
I-Pak (TO-251AA) Part Marking Information
YWWA
XX
XX
Date Code
Y= Year
WW= Work Week
AULU024N
Lot Code
Part Number
IR Logo
I-Pak (TO-251AA) Package Outline (Dimensions are shown in millimeters (inches)
AUIRLR/U024N
10
2017-10-05
D-Pak (TO-252AA) Tape & Reel Information (Dimensions are shown in millimeters (inches))
TR
16.3 ( .641 )
15.7 ( .619 )
8.1 ( .318 )
7.9 ( .312 )
12.1 ( .476 )
11.9 ( .469 )
FEED DIRECTION
FEED DIRECTION
16.3 ( .641 )
15.7 ( .619 )
TRR
TRL
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
NOTES :
1. OUTLINE CONFORMS TO EIA-481.
16 mm
13 INCH