AUIRFS4115-7P Product Datasheet

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AUIRFS4115-7P 

G D S 

Gate Drain 

Source 

Base Part Number 

Package Type  

Standard Pack 

Orderable Part Number 

Form Quantity 

AUIRFS4115-7P  

Tube 

50 

AUIRFS4115-7P 

Tape and Reel Left 

800 

AUIRFS4115-7TRL 

D

2

Pak 7 Pin  

V

DSS 

150V 

R

DS(on)

   typ. 

10m

 

              max. 

11.8m

 

I

D  

105A 

Absolute Maximum Ratings 

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device.   These are stress 
ratings only; and functional operation of the device at these or any other condition beyond those indicated in the specifications is not 
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The thermal resistance 
and power dissipation ratings are measured under board mounted and still air conditions. Ambient temperature (TA) is 25°C, unless 
otherwise specified. 

Features 

  Advanced Process Technology 

  Ultra Low On-Resistance 

  Dynamic dV/dT Rating 

  175°C Operating Temperature 
 Fast Switching 

  Repetitive Avalanche Allowed up to Tjmax 

  Lead-Free, RoHS Compliant 

  Automotive Qualified *  

Description 
Specifically designed for Automotive applications, this HEXFET® 
Power MOSFET utilizes the latest processing techniques to achieve 
extremely low on-resistance per silicon area.  Additional features of 
this design  are a 175°C junction operating temperature, fast 
switching speed and improved repetitive avalanche rating . These 
features combine to make this design an extremely efficient and 
reliable device for use in Automotive applications and a wide variety 
of other applications. 

 

2015-12-4 

 

HEXFET® is a registered trademark of Infineon. 
*Qualification standards can be found at 

www.infineon.com

 

 

AUTOMOTIVE GRADE 

Symbol Parameter 

Max. 

Units 

I

D

 @ T

C

 = 25°C 

Continuous Drain Current, V

GS

 @ 10V  

105 

I

D

 @ T

C

 = 100°C 

Continuous Drain Current, V

GS

 @ 10V  

74 

I

DM 

Pulsed Drain Current  420 

P

D

 @T

C

 = 25°C 

Maximum Power Dissipation   

380 

  

Linear Derating Factor 

2.5 

W/°C 

V

GS 

Gate-to-Source Voltage 

 ± 20 

E

AS  

Single Pulse Avalanche Energy (Thermally Limited)  230 

mJ 

I

AR 

Avalanche Current  

See Fig.14,15, 22a, 22b   

E

AR 

Repetitive Avalanche Energy  

 

mJ 

dv/dt Peak 

Diode 

Recovery 

 32 

V/ns 

T

J  

Operating Junction and 

-55  to + 175 

 

T

STG 

Storage Temperature Range 

  

°C 

  

Soldering Temperature, for 10 seconds (1.6mm from case) 

300 

 

Thermal Resistance  

Symbol Parameter 

Typ. 

Max. 

Units 

R

JC

  

Junction-to-Case  ––– 

0.40 

°C/W   

R

JA

  

Junction-to-Ambient  ––– 

40 

D

2

Pak 7 Pin 

HEXFET

® 

Power MOSFET 

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AUIRFS4115-7P 

 

2015-12-4 

Notes:

  Repetitive rating;  pulse width limited by max. junction temperature. 

  Limited by T

Jmax, 

starting  T

J

 = 25°C, L = 0.115mH, R

G

 = 25

, I

AS

 = 63A, V

GS

 =10V. Part not recommended for use above  

 

this value.  

  I

SD

 

63A, di/dt 2510A/µs, V

DD

 

V

(BR)DSS

, T

J

 

 175°C. 

 Pulse width 

400µs; duty cycle  2%. 

  C

oss

 eff. (TR) is a fixed capacitance that gives the same charging time as C

oss

 while V

DS

 is rising from 0 to 80% V

DSS

  C

oss 

eff. (ER) is a fixed capacitance that gives the same energy as C

oss

 while V

DS

 is rising from 0 to 80% V

DSS

  When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer to  

 

application note #AN-994  

  R

 is measured at T

J

 approximately 90°C. 

 

Static @ T

J

 = 25°C (unless otherwise specified) 

  

Parameter Min. 

Typ. 

Max. 

Units 

Conditions 

V

(BR)DSS 

Drain-to-Source Breakdown Voltage 

150 

–––  ––– 

V  V

GS

 = 0V, I

D

 = 250µA 

V

(BR)DSS

/

T

J  

Breakdown Voltage Temp. Coefficient 

–––  0.18  –––  V/°C  Reference to 25°C, I

D

 = 3.5mA  

R

DS(on) 

  

Static Drain-to-Source On-Resistance   

––– 

10 

11.8  m

 V

GS

 = 10V, I

D

 = 63A 

V

GS(th) 

Gate Threshold Voltage 

3.0 

––– 

5.0 

V  V

DS

 = V

GS

, I

D

 = 250µA 

gfs 

Forward Trans conductance 

93 

–––  ––– 

S  V

DS

 = 50V, I

D

 = 63A 

R

Gate Resistance 

––– 

2.1 

––– 

       

I

DSS 

  

Drain-to-Source Leakage Current   

––– –––  20 

µA 

V

DS

 = 150V, V

GS

 = 0V 

––– ––– 250 

V

DS

 = 150V,V

GS

 = 0V,T

J

 =125°C 

I

GSS 

  

Gate-to-Source Forward Leakage 

––– 

–––  100 

nA 

V

GS

 = 20V 

Gate-to-Source Reverse Leakage 

––– 

–––  -100 

V

GS

 = -20V 

Dynamic  Electrical Characteristics @ T

J

 = 25°C (unless otherwise specified) 

Q

Total Gate Charge  

––– 

73 

110 

nC  

I

D

 = 63A 

Q

gs 

Gate-to-Source Charge 

––– 

28 

––– 

V

DS

 = 75V 

Q

gd 

Gate-to-Drain Charge 

––– 

28 

––– 

V

GS

 = 10V 

Q

sync 

Total Gate Charge Sync. (Q

- Q

gd

) ––– 

45 

––– 

 

t

d(on) 

Turn-On Delay Time 

––– 

18 

––– 

ns 

V

DD

 = 98V 

t

Rise Time 

––– 

50 

––– 

I

D

 = 63A 

t

d(off) 

Turn-Off Delay Time 

––– 

37 

––– 

R

G

= 2.1



t

Fall Time 

––– 

23 

––– 

V

GS

 = 10V 

C

iss 

Input Capacitance 

–––  5320  ––– 

pF  

V

GS

 = 0V 

C

oss 

Output Capacitance 

––– 

490  ––– 

V

DS

 = 50V 

C

rss 

Reverse Transfer Capacitance 

––– 

110  ––– 

ƒ = 1.0MHz 

C

oss eff.(ER) 

Effective Output Capacitance (Energy Related)  ––– 

450  ––– 

V

GS

 = 0V, V

DS

 = 0V to 120V 

C

oss eff.(TR) 

Effective Output Capacitance (Time Related) 

––– 

520  ––– 

V

GS

 = 0V, V

DS

 = 0V to 120V  

Diode Characteristics  

  

        Parameter 

Min.  Typ.  Max.  Units 

Conditions 

I

  

Continuous Source Current  

––– ––– 104 

MOSFET symbol 

(Body Diode) 

showing  the 

I

SM 

  

Pulsed Source Current 

––– ––– 420 

integral reverse 

(Body Diode)

p-n junction diode. 

V

SD 

Diode Forward Voltage 

––– 

––– 

1.3 

V  T

J

 = 25°C,I

= 63A,V

GS

 = 0V 

t

rr  

Reverse Recovery Time  

––– 82 ––– 

ns  

T

J

 = 25°C          V

DD

 = 130V 

––– 99 ––– 

T

J

 = 125°C         I

F

 = 63A,  

Q

rr  

Reverse Recovery Charge  

––– 271 ––– 

nC  

 T

J

 = 25°C     di/dt = 100A/µs 

––– 385 ––– 

T

J

 = 125°C          

I

RRM 

Reverse Recovery Current 

––– 

6.0 

––– 

A  T

J

 = 25°C     

t

on 

Forward Turn-On Time 

Intrinsic turn-on time is negligible (turn-on is dominated by L

S

+L

D

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AUIRFS4115-7P 

 

2015-12-4 

Fig. 2 Typical Output Characteristics 

Fig. 3 

Typical Transfer Characteristics

 

 

Fig. 1 Typical Output Characteristics 

Fig 5.  Typical Capacitance vs. Drain-to-Source Voltage

 

Fig 6.  Typical Gate Charge vs. Gate-to-Source Voltage

 

 

0.1

1

10

100

1000

VDS, Drain-to-Source Voltage (V)

0.01

0.1

1

10

100

1000

I D

, D

ra

in

-t

o

-S

ou

rc

C

u

rr

en

(A

)

VGS

TOP           15V

10V

8.0V

7.0V

6.5V

6.0V

5.5V

BOTTOM

5.0V

60µs PULSE WIDTH

Tj = 25°C

5.0V

0.1

1

10

100

1000

VDS, Drain-to-Source Voltage (V)

1

10

100

1000

I D

D

ra

in

-t

o-

S

ou

rc

e

 C

ur

re

nt

 (

A

)

VGS

TOP           15V

10V

8.0V

7.0V

6.5V

6.0V

5.5V

BOTTOM

5.0V

60µs PULSE WIDTH

Tj = 175°C

5.0V

3.0

4.0

5.0

6.0

7.0

8.0

9.0

VGS, Gate-to-Source Voltage (V)

0.1

1

10

100

1000

I D

, D

ra

in

-t

o-

S

ou

rc

C

ur

re

nt

 

)

VDS = 50V

 60µs PULSE WIDTH

TJ = 25°C

TJ = 175°C

-60 -40 -20 0 20 40 60 80 100120140160180

TJ , Junction Temperature (°C)

0.0

0.5

1.0

1.5

2.0

2.5

3.0

R

D

S

(o

n)

 , 

D

ra

in

-t

o-

S

ou

rc

O

R

es

is

ta

nc

   

   

   

   

   

   

   

 (

N

or

m

al

iz

ed

)

ID = 63A

VGS = 10V

Fig. 4 

Normalized On-Resistance vs. Temperature

 

 

1

10

100

VDS, Drain-to-Source Voltage (V)

0

2000

4000

6000

8000

C

, C

ap

ac

ita

nc

(p

F

)

VGS   = 0V,       f = 1 MHZ

Ciss   = Cgs + Cgd,  Cds SHORTED
Crss   = Cgd 
Coss  = Cds + Cgd

Coss

Crss

Ciss

0

20

40

60

80

100

 QG  Total Gate Charge (nC)

0

4

8

12

16

V

G

S

, G

at

e-

to

-S

ou

rc

V

ol

ta

ge

 (

V

)

VDS= 120V

VDS= 75V

VDS= 30V

ID= 63A

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AUIRFS4115-7P 

 

2015-12-4 

 

Fig 8.  Maximum Safe Operating Area  

Fig 10.  Drain-to-Source Breakdown Voltage 

Fig 11.  Typical C

OSS

 Stored Energy 

Fig 12. Maximum Avalanche Energy vs. Drain Current 

Fig. 7 Typical Source-to-Drain Diode 

 

Fig 9.  Maximum Drain Current vs. Case Temperature 

0.0

0.5

1.0

1.5

2.0

VSD, Source-to-Drain Voltage (V)

0.1

1

10

100

1000

I S

D

, R

ev

er

se

 D

ra

in

 C

ur

re

nt

 (

A

)

TJ = 25°C

TJ = 175°C

VGS = 0V

0.1

1

10

100

1000

VDS,  Drain-toSource Voltage (V)

0.1

1

10

100

1000

10000

I D

,  

D

ra

in

-t

o-

S

ou

rc

C

ur

re

nt

 (

A

)

Tc = 25°C

Tj = 175°C

Single Pulse

1msec

10msec

OPERATION IN THIS AREA 

LIMITED BY R DS(on)

100µsec

DC

25

50

75

100

125

150

175

TC , CaseTemperature (°C)

0

20

40

60

80

100

120

I D

  

, D

ra

in

 C

ur

re

nt

 (

A

)

-60 -40 -20 0 20 40 60 80 100120140160180

TJ , Temperature ( °C )

140

150

160

170

180

190

V

(B

R

)D

S

S

,  

D

ra

in

-t

o-

S

ou

rc

B

re

ak

do

w

V

ol

ta

ge

 (

V

)

Id = 3.5mA

0

20

40

60

80

100

120

140

VDS, Drain-to-Source Voltage (V)

0

1

2

3

4

E

ne

rg

J)

25

50

75

100

125

150

175

Starting TJ, Junction Temperature (°C)

0

200

400

600

800

1000

E

A

S

S

in

gl

P

ul

se

 A

va

la

nc

he

 E

ne

rg

(m

J)

                 ID

TOP  

       14A

               24A

BOTTOM 

  63A

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AUIRFS4115-7P 

 

2015-12-4 

 

Fig 14.   Avalanche Current vs. Pulse width  

Fig 15.  Maximum Avalanche Energy vs. Temperature 

Notes on Repetitive Avalanche Curves , Figures 14, 15: 
(For further info, see AN-1005 at www.infineon.com)
 
1.  Avalanche failures assumption:  
 

Purely a thermal phenomenon and failure occurs at a temperature far in  

 

excess of T

jmax

. This is validated for every part type. 

2.  Safe operation in Avalanche is allowed as long as T

jmax

 is not exceeded. 

3.   Equation below based on circuit and waveforms shown in Figures 18a, 18b. 
4.   P

D (ave) 

= Average power dissipation per single avalanche pulse. 

5.   BV = Rated breakdown voltage (1.3 factor accounts for voltage increase  
 during 

avalanche). 

6.   I

av 

= Allowable avalanche current. 

7. 

T

 = 

Allowable rise in junction temperature, not to exceed

 

T

jmax 

(assumed as  

 

25°C in Figure 13, 14).  

 

t

av = 

Average time in avalanche. 

 

D = Duty cycle in avalanche =  t

av 

·f 

 

Z

thJC

(D, t

av

) = Transient thermal resistance, see Figures 13) 

 

P

D (ave)

 = 1/2 ( 1.3·BV·I

av

) = 

T/ Z

thJC

 

I

av

 = 2

T/ [1.3·BV·Z

th

E

AS (AR) 

= P

D (ave)

·t

av

 

Fig 13.  Maximum Effective Transient Thermal Impedance, Junction-to-Case  

1E-006

1E-005

0.0001

0.001

0.01

0.1

t1 , Rectangular Pulse Duration (sec)

0.001

0.01

0.1

1

T

he

rm

al

 R

es

po

ns

Z  

th

JC

 )

0.20

0.10

D = 0.50

0.02

0.01

0.05

SINGLE PULSE

( THERMAL RESPONSE )

Notes:

1. Duty Factor D = t1/t2

2. Peak Tj = P dm x Zthjc + Tc

J

J

1

1

2

2

3

3

R

1

R

1

R

2

R

2

R

3

R

3

Ci= 

iRi

Ci= 

iRi

C

C

4

4

R

4

R

4

Ri (°C/W) 

I (sec)

0.015402 

0.00001 

0.056989 

0.000065 

0.180208 

0.001377 

0.14323 

0.010705 

1.0E-06

1.0E-05

1.0E-04

1.0E-03

1.0E-02

1.0E-01

tav (sec)

0.1

1

10

100

1000

A

va

la

nc

he

 C

ur

re

nt

 (

A

)

0.05

Duty Cycle = Single Pulse

0.10

Allowed avalanche Current vs avalanche 
pulsewidth, tav, assuming 

 j = 25°C and 

Tstart = 150°C.

0.01

Allowed avalanche Current vs avalanche 
pulsewidth, tav, assuming 

Tj = 150°C and 

Tstart =25°C (Single Pulse)

25

50

75

100

125

150

175

Starting TJ , Junction Temperature (°C)

0

40

80

120

160

200

240

E

A

R

 ,

 A

va

la

nc

he

 E

ne

rg

(m

J)

TOP          Single Pulse                
BOTTOM   1% Duty Cycle
ID = 63A

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AUIRFS4115-7P 

 

2015-12-4 

 

Fig 16.  Threshold Voltage vs. Temperature 

Fig. 18 - Typical Recovery Current vs. di

f

/dt  

Fig. 19 - Typical Stored Charge vs. di

f

/dt  

Fig. 20 - Typical Stored Charge vs. di

f

/dt  

Fig. 17 - Typical Recovery Current vs. di

f

/dt  

-75 -50 -25

0

25

50

75 100 125 150 175

TJ , Temperature ( °C )

1.0

2.0

3.0

4.0

5.0

6.0

V

G

S

(t

h)

 G

at

th

re

sh

ol

V

ol

ta

ge

 (

V

)

ID = 1.0A

ID = 1.0mA

ID = 250µA

100 200 300 400 500 600 700 800 900 1000

dif / dt - (A / µs)

0

10

20

30

40

50

I R

R

M

 -

 (

A

)

IF = 42A
VR = 127V
TJ = 125°C   
TJ =  25°C  

100 200 300 400 500 600 700 800 900 1000

dif / dt - (A / µs)

0

10

20

30

40

50

I R

R

M

 -

 (

A

)

IF = 63A
VR = 127V
TJ = 125°C   
TJ =  25°C  

100 200 300 400 500 600 700 800 900 1000

dif / dt - (A / µs)

0

400

800

1200

1600

2000

2400

Q

R

R

 -

 (

nC

)

IF = 42A
VR = 127V
TJ = 125°C   
TJ =  25°C  

100 200 300 400 500 600 700 800 900 1000

dif / dt - (A / µs)

0

400

800

1200

1600

2000

2400

Q

R

R

 -

 (

nC

)

IF = 63A
VR = 127V
TJ = 125°C   
TJ =  25°C  

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AUIRFS4115-7P 

 

2015-12-4 

 

Fig 21. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs 

Fig 22a.  Unclamped Inductive Test Circuit 

Fig 22b.  Unclamped Inductive Waveforms 

Fig 23a.  Switching Time Test Circuit 

Fig 24a.  Gate Charge Test Circuit 

Fig 24b.   Gate Charge Waveform 

R G

IAS

0.01

tp

D.U.T

L

VDS

+

- VDD

DRIVER

A

15V

20V

tp

V

(BR)DSS

I

AS

Fig 23b.  Switching Time Waveforms 

Vds

Vgs

Id

Vgs(th)

Qgs1 Qgs2

Qgd

Qgodr

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AUIRFS4115-7P 

 

2015-12-4 

 

D

2

Pak - 7 Pin Package Outline (Dimensions are shown in millimeters (inches)) 

Note: For the most current drawing please refer to IR website at 

http://www.irf.com/package/

 

D

2

Pak - 7 Pin Part Marking Information 

YWWA 

XX    

    XX 

Date Code 

Y= Year 

WW= Work Week 

AUFS4115-7P 

Lot Code 

Part Number 

IR Logo 

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background image

 

AUIRFS4115-7P 

 

2015-12-4 

D

2

Pak - 7 Pin Tape and Reel 

Note: For the most current drawing please refer to IR website at 

http://www.irf.com/package/

 

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AUIRFS4115-7P 

10 

 

2015-12-4 

 

†  Highest passing voltage. 

Published by 
Infineon Technologies AG 
81726 München, Germany 

© 

Infineon Technologies AG 2015 

All Rights Reserved. 
 
IMPORTANT NOTICE
 
The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics 
(“Beschaffenheitsgarantie”). With respect to any examples, hints or any typical values stated herein and/or any 
information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and 
liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third 
party.  
In addition, any information given in this document is subject to customer’s compliance with its obligations stated in this 
document and any applicable legal requirements, norms and standards concerning customer’s products and any use of 
the product of Infineon Technologies in customer’s applications.  
The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of 
customer’s technical departments to evaluate the suitability of the product for the intended application and the 
completeness of the product information given in this document with respect to such application.   
For further information on the product, technology, delivery terms and conditions and prices please contact your nearest 
Infineon Technologies office (

www.infineon.com

). 

WARNINGS 
Due to technical requirements products may contain dangerous substances. For information on the types in question 
please contact your nearest Infineon Technologies office. 
Except as otherwise explicitly approved by Infineon Technologies in a written document signed by authorized 
representatives of Infineon Technologies, Infineon Technologies’ products may not be used in any applications where a 
failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury.  

Qualification Information  

Qualification Level 

Automotive 

(per AEC-Q101)  

Comments: This part number(s) passed Automotive qualification. Infineon’s  
Industrial and Consumer qualification level is granted by extension of the higher 
Automotive level. 

D

2

-Pak 7 Pin 

MSL1  

ESD 

Machine Model  

Class M3 (+/- 400V)

 

 

AEC-Q101-002 

Human Body Model  

Class H2 (+/- 4000V)

 

 

AEC-Q101-001 

Charged Device Model 

Class C5 (+/- 2000V)

 

 

AEC-Q101-005 

RoHS Compliant 

Yes 

 Moisture Sensitivity Level    

Revision History  

Date Comments 

12/4/2015 



Updated datasheet with corporate template 



Corrected ordering table on page 1. 

Maker
Infineon Technologies