AUIRFR5410 Product Datasheet

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AUIRFR5410 

V

DSS 

-100V 

R

DS(on)

            max. 

0.205



I

D  

-13A 

Features 

  Advanced Planar Technology 

 P-Channel MOSFET 

 Low 

On-Resistance 

  Dynamic dV/dT Rating 
  175°C Operating Temperature 

 Fast Switching 

  Fully Avalanche Rated 

  Repetitive Avalanche Allowed up to Tjmax 

  Lead-Free, RoHS Compliant 

  Automotive Qualified *  

Description 
Specifically designed for Automotive applications, this Cellular 
Planar design of HEXFET® Power MOSFETs utilizes the latest 
processing techniques to achieve low on-resistance per silicon 
area. This benefit combined with the fast switching speed and 
ruggedized device design that HEXFET power MOSFETs are well 
known for, provides the designer with an extremely efficient and 
reliable device for use in Automotive and a wide variety of other 
applications. 

 

2015-12-2 

HEXFET® is a registered trademark of Infineon. 
*Qualification standards can be found at 

www.infineon.com

 

 

AUTOMOTIVE GRADE 

Symbol Parameter 

Max. 

Units 

I

D

 @ T

C

 = 25°C 

Continuous Drain Current, V

GS

 @ -10V  

-13 

I

D

 @ T

C

 = 100°C 

Continuous Drain Current, V

GS

 @ -10V  

-8.2 

I

DM 

Pulsed Drain Current  -52 

P

D

 @T

C

 = 25°C 

Maximum Power Dissipation   

66 

  

Linear Derating Factor 

0.53 

W/°C 

V

GS 

Gate-to-Source Voltage 

 ± 20 

E

AS  

Single Pulse Avalanche Energy (Thermally Limited)  194 

mJ   

I

AR 

Avalanche Current  -8.4 

E

AR 

Repetitive Avalanche Energy  6.3 

mJ 

T

J  

Operating Junction and 

-55  to + 150 

 

T

STG 

Storage Temperature Range 

  

°C 

  

Soldering Temperature, for 10 seconds (1.6mm from case) 

300 

 

dv/dt 

Pead Diode Recovery dv/dt -5.0 

V/ns 

Absolute Maximum Ratings 

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device.   These are stress 
ratings only; and functional operation of the device at these or any other condition beyond those indicated in the specifications is not 
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The thermal resistance 
and power dissipation ratings are measured under board mounted and still air conditions. Ambient temperature (TA) is 25°C, unless 
otherwise specified. 

Thermal Resistance  

Symbol Parameter 

Typ. 

Max. 

Units 

R

JC

  

Junction-to-Case  ––– 

1.9 

°C/W   

R

JA

  

Junction-to-Ambient ( PCB Mount)  ––– 

50 

R

JA

  

Junction-to-Ambient  

––– 

110 

D-Pak 

AUIRFR5410 

Base part number 

Package Type 

Standard Pack 

Orderable Part Number   

Form 

Quantity 

AUIRFR5410 

D-Pak    

Tube  

75 

AUIRFR5410 

Tape and Reel Left  

3000 

AUIRFR5410TRL 

G D S 

Gate Drain Source 

HEXFET

® 

Power MOSFET 

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AUIRFR5410 

 

2015-12-2 

Notes:

 Repetitive rating;  pulse width limited by max. junction temperature. (See fig. 11) 

  Starting  T

J

 = 25°C, L = 6.4mH, R

G

 = 25

, I

AS

 = -7.8A (See fig. 12) 

  I

SD

 

-7.8A, di/dt 200A/µs, V

DD

 

V

(BR)DSS

, T

J

 

 150°C. 

 Pulse width 

300

µ

s; duty cycle 

 2%. 



This is applied for I-PAK, LS of D-PAK is measured between lead and center of  die contact. 



Uses IRF9530N data and test conditions. 

  When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer to  

 

application note #AN-994  



R

 is measured at T

J

 approximately 90°C

 

Static @ T

J

 = 25°C (unless otherwise specified) 

  

Parameter Min. 

Typ. 

Max. 

Units 

Conditions 

V

(BR)DSS 

Drain-to-Source Breakdown Voltage 

-100  –––  ––– 

V  V

GS

 = 0V, I

D

 = -250µA 

V

(BR)DSS

/

T

J  

Breakdown Voltage Temp. Coefficient 

–––  -0.12  –––  V/°C  Reference to 25°C, I

D

 = -1mA  

R

DS(on) 

  

Static Drain-to-Source On-Resistance   

––– 

–––  0.205 

 V

GS

 = -10V, I

D

 = -7.8A 

V

GS(th) 

Gate Threshold Voltage 

-2.0   –––  -4.0 

V  V

DS

 = V

GS

, I

D

 = -250µA 

gfs 

Forward Trans conductance 

3.2 

–––  ––– 

S  V

DS

 = -25V, I

D

 = -7.8A  

I

DSS 

  

Drain-to-Source Leakage Current   

––– ––– -25 

µA 

V

DS

 = -100V, V

GS

 = 0V 

––– ––– -250 

V

DS

 = -80V,V

GS

 = 0V,T

J

 =150°C 

I

GSS 

  

Gate-to-Source Forward Leakage 

––– 

–––  -100 

nA 

V

GS

 = -20V 

Gate-to-Source Reverse Leakage 

––– 

–––  100 

V

GS

 = 20V 

Dynamic  Electrical Characteristics @ T

J

 = 25°C (unless otherwise specified) 

Q

Total Gate Charge  

––– 

––– 

58 

nC  

I

D

 = -8.4A 

Q

gs 

Gate-to-Source Charge 

––– 

––– 

8.3 

V

DS

 = -80V 

Q

gd 

Gate-to-Drain Charge 

––– 

––– 

32 

V

GS

 = -10V  

t

d(on) 

Turn-On Delay Time 

––– 

15 

––– 

ns 

V

DD

 = -50V 

t

Rise Time 

––– 

58 

––– 

I

D

 = -8.4A 

t

d(off) 

Turn-Off Delay Time 

––– 

45 

––– 

R

= 9.1



t

Fall Time 

––– 

46 

––– 

R

= 6.2

  

L

D

 

Internal Drain Inductance 

––– 

4.5 

––– 

 nH  

Between lead, 
6mm (0.25in.) 

L

S

 

Internal Source Inductance 

––– 

7.5 

––– 

from package 
and center of die contact   

C

iss 

Input Capacitance 

––– 

760  ––– 

pF   

V

GS

 = 0V 

C

oss 

Output Capacitance 

––– 

260  ––– 

V

DS

 = -25V 

C

rss 

Reverse Transfer Capacitance 

––– 

170  ––– 

ƒ = 1.0MHz 

Diode Characteristics  

  

        Parameter 

Min.  Typ.  Max.  Units 

Conditions 

I

  

Continuous Source Current  

––– ––– -13 

MOSFET symbol 

(Body Diode) 

showing  the 

I

SM 

  

Pulsed Source Current 

––– ––– -52 

integral reverse 

(Body Diode)

p-n junction diode. 

V

SD 

Diode Forward Voltage 

––– 

–––  -1.6 

V  T

J

 = 25°C,I

= -7.8A, V

GS

 = 0V 

t

rr  

Reverse Recovery Time  

––– 

130  190 

ns   T

J

 = 25°C ,I

F

 = -8.4A 

Q

rr  

Reverse Recovery Charge  

––– 

650  970 

nC    di/dt = 100A/µs 

t

on 

Forward Turn-On Time 

Intrinsic turn-on time is negligible (turn-on is dominated by L

S

+L

D

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AUIRFR5410 

 

2015-12-2 

Fig. 2 Typical Output Characteristics 

Fig. 3 

Typical Transfer Characteristics

 

 

Fig. 4 Normalized On-Resistance 

Vs. Temperature 

Fig. 1 Typical Output Characteristics 

0.01

0.1

 1

 10

 100

0.1

 1

 10

 100

 

20µs PULSE WIDTH

T  = 25 C

J

°

 

TOP

BOTTOM

VGS

-15V

-10V

-8.0V

-7.0V

-6.0V

-5.5V

-5.0V

-4.5V

-V     , Drain-to-Source Voltage (V)

-I

   

,  D

ra

in

-t

o

-S

ou

rce

 C

u

rren

(A

)

DS

D

-4.5V

0.1

 1

 10

 100

0.1

 1

 10

 100

 

20µs PULSE WIDTH

T  = 150 C

J

°

 

TOP

BOTTOM

VGS

-15V

-10V

-8.0V

-7.0V

-6.0V

-5.5V

-5.0V

-4.5V

-V     , Drain-to-Source Voltage (V)

-I

   

,  

D

ra

in

-t

o

-S

o

u

rc

C

ur

ren

(A

)

DS

D

-4.5V

0.1

 1

 10

 100

4

5

6

7

8

9

10

 

V      = 10V
20µs PULSE WIDTH

DS

-V     , Gate-to-Source Voltage (V)

-I 

  ,  D

rain

-to-

S

ou

rce 

C

u

rr

en

t (A)

GS

D

 

T  = 25  C

J

°

 

T  = 150  C

J

°

-60 -40 -20

0

20 40

60

80 100 120 140 160

0.0

0.5

1.0

1.5

2.0

2.5

T  , Junction Temperature (  C)

R

    

    

  

  , 

D

ra

in

-to

-S

o

u

rc

e

 O

n

 R

e

si

st

a

n

ce

(N

or

m

al

ize

d)

J

D

S

(on)

°

 

 

V

=

I =

GS

D

-10V

-14A

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AUIRFR5410 

 

2015-12-2 

Fig 5.  Typical Capacitance vs.  
 

      Drain-to-Source Voltage

 

Fig 6.  Typical Gate Charge vs. 
 

      Gate-to-Source Voltage

 

 

 

Fig 8.  Maximum Safe Operating Area  

Fig. 7 Typical Source-to-Drain Diode 

 Forward Voltage 

0

400

800

1200

1600

2000

1

10

100

C, Ca

pa

ci

ta

nc

(pF

)

A

DS

-V     , Drain-to-Source Voltage (V)

V      = 0V,         f = 1MHz
C      = C     + C     ,   C     SHORTED
C      = C
C      = C     + C

GS
iss         gs         gd         ds
rss         gd
oss        ds         gd

iss

oss

rss

0

10

20

30

40

50

60

0

5

10

15

20

Q   , Total Gate Charge (nC)

-V  

   , Ga

te-to

-S

ource 

Voltag

e (V)

G

GS

 

 

FOR TEST CIRCUIT

SEE FIGURE       

I =

D

13

-8.4A

 

V

=-20V

DS

V

=-50V

DS

V

=-80V

DS

0.1

 1

 10

 100

0.2

0.8

1.4

2.0

2.6

-V     ,Source-to-Drain Voltage (V)

-I   

  

, R

e

ve

rse

 D

ra

in

 C

u

rre

n

t (A

)

SD

SD

 

V      = 0 V 

GS

 

T  = 25  C

J

°

 

T  = 150  C

J

°

 1

 10

 100

 1000

 1

 10

 100

 1000

 

OPERATION IN THIS AREA LIMITED

BY R

DS(on)

 

 Single Pulse

 T

 T

= 150  C

= 25  C

°

°

J

C

-V     , Drain-to-Source Voltage (V)

-I 

  , D

rai

n

 Cur

ren

t (A)

I   

, Dr

ain 

C

u

rr

ent

 (A)

DS

D

 

10us

 

100us

 

1ms

 

10ms

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AUIRFR5410 

 

2015-12-2 

Fig 11.  Maximum Effective Transient Thermal Impedance, Junction-to-Case  

Fig 9.  Maximum Drain Current Vs. 

Case Temperature 

Fig 10a.  Switching Time Test Circuit 

Fig 10b.  Switching Time Waveforms 

25

50

75

100

125

150

0

3

6

9

12

15

T   , Case Temperature (  C)

-I

   , D

rain

 C

urr

en

t (A

)

°

C

D

0.01

0.1

 1

 10

0.00001

0.0001

0.001

0.01

0.1

 1

 

Notes:

1. Duty factor D =

t   / t

2. Peak T = P

x  Z

+ T

1

2

J

DM

thJC

C

 

P

t

t

DM

1

2

t  , Rectangular Pulse Duration (sec)

T

her

m

al

 R

esp

ons

e

(Z   

    

 )

1

th

JC

0.01

0.02

0.05

0.10

0.20

D = 0.50

 

SINGLE PULSE

(THERMAL RESPONSE)

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AUIRFR5410 

 

2015-12-2 

 

Fig 12c. Maximum Avalanche Energy 

 vs. Drain Current 

Fig 12a.  Unclamped Inductive Test Circuit 

Fig 12b.  Unclamped Inductive Waveforms 

Fig 13b.  Gate Charge Test Circuit 

Fig 13a.   Gate Charge Waveform 

25

50

75

100

125

150

0

100

200

300

400

500

Starting T  , Junction Temperature (  C)

E   

  , Si

ng

le

 Pul

se Aval

anc

he 

Energy

 (

m

J)

J

AS

°

 

ID

TOP

BOTTOM

-3.5A 
-4.9A 
-7.8A 

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AUIRFR5410 

 

2015-12-2 

 

Fig 14. Peak Diode Recovery dv/dt Test Circuit for P-Channel HEXFET® Power MOSFETs 

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AUIRFR5410 

 

2015-12-2 

Note: For the most current drawing please refer to IR website at 

http://www.irf.com/package/

 

D-Pak (TO-252AA) Package Outline (Dimensions are shown in millimeters (inches)) 

YWWA 

XX    

    XX 

Date Code 

Y= Year 

WW= Work Week 

AUFR5410 

Lot Code 

Part Number 

IR Logo 

D-Pak (TO-252AA) Part Marking Information 

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AUIRFR5410 

 

2015-12-2 

D-Pak (TO-252AA) Tape & Reel Information (Dimensions are shown in millimeters (inches)) 

Note: For the most current drawing please refer to IR website at 

http://www.irf.com/package/

 

TR

16.3 ( .641 )
15.7 ( .619 )

8.1 ( .318 )
7.9 ( .312 )

12.1 ( .476 )
11.9 ( .469 )

FEED DIRECTION

FEED DIRECTION

16.3 ( .641 )
15.7 ( .619 )

TRR

TRL

NOTES :
1.  CONTROLLING DIMENSION : MILLIMETER.
2.  ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).
3.  OUTLINE CONFORMS TO EIA-481 & EIA-541.

NOTES :
1. OUTLINE CONFORMS TO EIA-481.

16 mm

  13 INCH

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AUIRFR5410 

10 

 

2015-12-2 

 

Qualification Information  

Qualification Level 

Automotive 

(per AEC-Q101)  

Comments: This part number(s) passed Automotive qualification. Infineon’s  
Industrial and Consumer qualification level is granted by extension of the higher 
Automotive level. 

 Moisture Sensitivity Level    

D-Pak 

MSL1  

ESD 

Machine Model  

Class M2 (+/- 200V)

 

 

AEC-Q101-002 

Human Body Model  

Class H1B (+/- 1000V) 

 

 

AEC-Q101-001 

Charged Device Model 

Class C5 (+/- 1125V)

 

 

AEC-Q101-005 

RoHS Compliant 

Yes 

Published by 
Infineon Technologies AG 
81726 München, Germany 

© 

Infineon Technologies AG 2015 

All Rights Reserved. 
 
IMPORTANT NOTICE
 
The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics 
(“Beschaffenheitsgarantie”). With respect to any examples, hints or any typical values stated herein and/or any 
information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and 
liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third 
party.  
In addition, any information given in this document is subject to customer’s compliance with its obligations stated in this 
document and any applicable legal requirements, norms and standards concerning customer’s products and any use of 
the product of Infineon Technologies in customer’s applications.  
The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of 
customer’s technical departments to evaluate the suitability of the product for the intended application and the 
completeness of the product information given in this document with respect to such application.   
For further information on the product, technology, delivery terms and conditions and prices please contact your nearest 
Infineon Technologies office (

www.infineon.com

). 

WARNINGS 
Due to technical requirements products may contain dangerous substances. For information on the types in question 
please contact your nearest Infineon Technologies office. 
Except as otherwise explicitly approved by Infineon Technologies in a written document signed by authorized 
representatives of Infineon Technologies, Infineon Technologies’ products may not be used in any applications where a 
failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury.  

Revision History  

Date Comments 

12/2/2015 



Updated datasheet with corporate template 



Corrected ordering table on page 1. 

†  Highest passing voltage. 

Maker
Infineon Technologies