AUIRF7759L2 Product Datasheet

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AUIRF7759L2TR 

Base Part Number  

Package Type   

Standard Pack 

Form Quantity 

AUIRF7759L2 

DirectFET Large Can 

Tape and Reel 

4000 

AUIRF7759L2TR 

Orderable Part Number  

AUTOMOTIVE GRADE 

V

(BR)DSS 

75V 

R

DS(on)

   typ. 

1.8m

 

I

D (Silicon Limited) 

160A 

             max. 

2.3m

 

Q

g (typical)

 

200nC 

 

DirectFET

®

 

ISOMETRIC 

 

 

L8 

Automotive DirectFET

®

 Power MOSFET  

Applicable DirectFET

®

  Outline and  Substrate Outline   

SB 

SC 

  

  

M2  

M4 

  

L4 

L6 

L8 

  

Description 

The AUIRF7759L2TR(1) combines the latest Automotive HEXFET

®

 Power MOSFET Silicon technology with the advanced DirectFET

®

 packaging to 

achieve the lowest on-state resistance in a package that has the footprint of a DPak (TO-252AA) and only 0.7 mm profile. The DirectFET

®

 package is 

compatible with existing layout geometries used in power applications, PCB assembly equipment and vapor phase, infra-red or convection soldering 
techniques, when application note AN-1035 is followed regarding the manufacturing methods and processes. The DirectFET

®

  package allows dual 

sided cooling to maximize thermal transfer in automotive power systems. 
This HEXFET

®

 Power MOSFET is designed for applications where efficiency and power density are essential. The advanced DirectFET

®

 packaging 

platform coupled with the latest silicon technology allows the AUIRF7759L2TR(1) to offer substantial system level savings and performance 
improvement specifically in motor drive, high frequency DC-DC and other heavy load applications on ICE, HEV and EV platforms. This MOSFET 
utilizes the latest processing techniques to achieve low on-resistance and low Qg per silicon area. Additional features of this MOSFET are 175°C 
operating junction temperature and high repetitive peak current capability. These features combine to make this MOSFET a highly efficient, robust and 
reliable device for high current automotive applications. 

Absolute Maximum Ratings 

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device.   These are stress ratings only; and 
functional operation of the device at these or any other condition beyond those indicated in the specifications is not implied. Exposure to absolute-
maximum-rated conditions for extended periods may affect device reliability. The thermal resistance and power dissipation ratings are measured under 
board mounted and still air conditions. Ambient temperature (TA) is 25°C, unless otherwise specified. 

  

Parameter Max. 

Units 

V

DS 

Drain-to-Source Voltage 

75 

V  

V

GS 

Gate-to-Source Voltage 

±20 

I

D

 @ T

C

 = 25°C 

Continuous Drain Current, V

GS

 @ 10V (Silicon Limited)  160 

I

D

 @ T

C

 = 100°C 

Continuous Drain Current, V

GS

 @ 10V (Silicon Limited)  113 

I

D

 @ T

A

 = 25°C 

Continuous Drain Current, V

GS

 @ 10V (Silicon Limited)  26 

I

D

 @ T

C

 = 25°C 

Continuous Drain Current, V

GS

 @ 10V (Package Limited)  

375 

I

DM 

Pulsed Drain Current  640 

P

D

 @T

C

 = 25°C 

Power Dissipation  125 

P

D

 @T

C

 = 100°C 

Power Dissipation  63 

P

D

 @T

A

 = 25°C 

Power Dissipation  3.3 

E

AS 

Single Pulse Avalanche Energy (Thermally Limited)  257 

mJ 

 

I

AR 

Avalanche Current  

See Fig. 16, 17, 18a, 18b  

E

AR 

Repetitive Avalanche Energy  

mJ 

T

Peak Soldering Temperature 

270 

°C  

T

J  

Operating Junction and 

-55  to + 175 

T

STG 

Storage Temperature Range 

  

 

2015-10-5 

HEXFET® is a registered trademark of Infineon. 
*Qualification standards can be found at 

www.infineon.com

 

  Advanced Process Technology  

 

Optimized for Automotive Motor Drive, DC-DC and 

 

other Heavy Load Applications  

 

Exceptionally Small Footprint and Low Profile  

 

High Power Density  

 

Low Parasitic Parameters 

 

 

Dual Sided Cooling  

 

175°C Operating Temperature  

 

Repetitive Avalanche Capability for Robustness and Reliability  

 

Lead free, RoHS and Halogen free  

 Automotive Qualified * 

 

D

D

S

S

S

S

S

S

S

S

G

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AUIRF7759L2TR 

 

2015-10-5 

Thermal Resistance  

Symbol Parameter 

Typ. 

Max. 

Units 

R

JA

  

Junction-to-Ambient   

––– 

45 

R

JA

  

Junction-to-Ambient   

12.5 

––– 

R

JA

  

Junction-to-Ambient   

20 

––– 

R

J-Can

  

Junction-to-Can  ––– 

1.2 

R

J-PCB

  

Junction-to-PCB Mounted  

––– 

0.5 

 

Linear Derating Factor  0.83 

W/°C 

°C/W  

Static Electrical Characteristics @ T

J

 = 25°C (unless otherwise specified)  

Symbol Parameter 

Min. 

Typ. 

Max. 

Units 

Conditions 

V

(BR)DSS 

Drain-to-Source Breakdown Voltage 

75 

––– 

––– 

V

GS

 = 0V, I

D

 = 250µA 

V

(BR)DSS

/

T

J  

Breakdown Voltage Temp. Coefficient 

–––  0.02 

––– 

V/°C  Reference to 25°C, I

D

 = 2.0mA 

R

DS(on) 

  

Static Drain-to-Source On-Resistance   

––– 1.8  2.3  m  V

GS

 = 10V, I

D

 = 96A  

V

GS(th) 

Gate Threshold Voltage 

2.0 

3.0 

4.0 

V

DS

 = V

GS

, I

D

 = 250µA  

V

GS(th)

/

T

J  

Gate Threshold Voltage Coefficient 

––– 

-11 

–––  mV/°C 

gfs Forward 

Transconductance 

74 

––– 

––– 

V

DS

 = 25V, I

D

 = 96A 

I

DSS 

  

Drain-to-Source Leakage Current   

––– –––  20 

µA 

V

DS

 = 75V, V

GS

 = 0V 

––– ––– 250 

V

DS

 = 60V, V

GS

 = 0V, T

J

 = 125°C 

I

GSS 

  

Gate-to-Source Forward Leakage 

––– 

––– 

100 

nA 

V

GS

 = 20V 

Gate-to-Source Reverse Leakage 

––– 

–––  -100 

V

GS

 = -20V 

Dynamic Electrical Characteristics @ T

J

 = 25°C (unless otherwise specified)  

Symbol Parameter 

Min. 

Typ. 

Max. 

Units 

Conditions 

Q

Total Gate Charge 

––– 

200 

300 

nC  

V

DS

 = 38V 

Q

gs1 

Gate-to-Source Charge 

––– 

37 

––– 

V

GS

 = 10V 

Q

gs2 

Gate-to-Source Charge 

––– 

11 

––– 

I

D

 = 96A 

Q

gd 

Gate-to-Drain ("Miller") Charge 

––– 62  93 

See Fig.11 

Q

godr 

Gate Charge Overdrive 

––– 

91 

––– 

 

Q

sw 

Switch Charge (Q

gs2

 + Q

gd

) ––– 

73 

––– 

 

Q

oss 

Output Charge 

––– 

60 

––– 

nC  V

DS

 = 16V, V

GS

 = 0V 

t

d(on) 

Turn-On Delay Time 

––– 

18 

––– 

ns 

V

DD

 = 38V, V

GS

 = 10V   

t

Rise Time 

––– 

37 

––– 

I

D

 = 96A 

t

d(off) 

Turn-Off Delay Time 

––– 

80 

––– 

R

G

 = 1.8

 

t

Fall Time 

––– 

33 

––– 

 

C

iss 

Input Capacitance 

–––  12222  ––– 

pF 

V

GS

 = 0V 

C

oss 

Output Capacitance 

–––  1465  ––– 

V

DS

 = 25V 

C

rss 

Reverse Transfer Capacitance 

––– 

609 

––– 

ƒ = 1.0 MHz 

C

oss 

Output Capacitance 

–––  7457  ––– 

V

GS

 = 0V, V

DS

 = 1.0V, ƒ = 1.0 MHz 

C

oss 

Output Capacitance 

––– 

955 

––– 

V

GS

 = 0V, V

DS

 = 60V, ƒ = 1.0 MHz 

R

Internal Gate Resistance 

––– 

1.1 

––– 

  

Notes  through  are on page 3   

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AUIRF7759L2TR 

 

2015-10-5 

Diode Characteristics 

 

 

 

 

 

Symbol 

        Parameter 

Min.  Typ.  Max.  Units 

Conditions 

I

  

Continuous Source Current  

–––    –––    160 

A  

MOSFET symbol 

(Body Diode) 

showing  the 

I

SM 

  

Pulsed Source Current 

–––    –––   

integral reverse 

(Body Diode)  

p-n junction diode. 

V

SD 

Diode Forward Voltage 

––– 

––– 

1.3 

T

J

 = 25°C, I

S

 = 96A, V

GS

 = 0V  

t

rr 

   

Reverse Recovery Time   

––– 64  96  ns  T

J

 = 25°C, I

F

 = 96A, V

DD

 = 38V 

Q

rr 

  

Reverse Recovery Charge   

––– 150 225  nC  dv/dt = 100A/µs  

640 

 Surface mounted on 1 in. 

square Cu board  (still air). 

 Mounted on minimum 

footprint full size board with 
metalized back and with small 
clip heatsink (still air). 

 Mounted to a PCB with 

small clip heatsink (still air) 

  Click on this section to link to the appropriate technical paper. 

  Click on this section to link to the DirectFET

®

  Website. 

  Surface mounted on 1 in. square Cu board, steady state. 

  T

C

 measured with thermocouple mounted to top (Drain) of part. 

  Repetitive rating;  pulse width limited by max. junction temperature. 

 Starting T

J

 = 25°C, L = 0.056mH, R

G

 = 25

, I

AS

 = 96A. 

 Pulse width 

 400µs; duty cycle  2%. 

  Used double sided cooling, mounting pad with large heatsink. 

  Mounted on minimum footprint full size board with metalized back and with small clip heat sink. 

  R

 is measured at T

J

 of approximately 90°C. 

D

S

G

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AUIRF7759L2TR 

 

2015-10-5 

Fig. 3 

Typical On-Resistance vs. Gate Voltage

 

 

Fig. 1 Typical Output Characteristics 

Fig 5.   Typical Transfer Characteristics

 

Fig 6.  Normalized On-Resistance vs. Temperature

 

 

Fig. 2 Typical Output Characteristics 

0.1

1

10

100

VDS, Drain-to-Source Voltage (V)

0.01

0.1

1

10

100

1000

I D

, D

ra

in

-t

o

-S

ou

rc

e

 C

u

rr

en

(A

)

VGS

TOP           15V

10V

7.00V

5.50V

5.00V

4.50V

4.00V

BOTTOM

3.75V

60µs 

PULSE WIDTH

Tj = 25°C

3.75V

0.1

1

10

100

VDS, Drain-to-Source Voltage (V)

1

10

100

1000

I D

, D

ra

in

-t

o

-S

ou

rc

e

 C

u

rr

e

nt

 (

A

)

3.75V

60µs 

PULSE WIDTH 

Tj = 175°C 

VGS

TOP           15V

10V

7.00V

5.50V

5.00V

4.50V

4.00V

BOTTOM

3.75V

2

4

6

8

10

12

14

16

18

20

VGS, Gate -to -Source Voltage  (V)

0

2

4

6

8

R

D

S

(o

n)

,  

D

ra

in

-t

-S

ou

rc

O

R

es

is

ta

nc

(m

)

ID = 96A

TJ = 25°C

TJ = 125°C

2

2.5

3

3.5

4

4.5

5

5.5

6

VGS, Gate-to-Source Voltage (V)

0.1

1

10

100

1000

I D

, D

ra

in

-t

o-

S

ou

rc

C

ur

re

nt

 

(A

)

TJ = 175°C

TJ = 25°C

TJ = -40°C

VDS = 25V

60µs PULSE WIDTH

-60

-20

20

60

100

140

180

TJ , Junction Temperature (°C)

0.5

1.0

1.5

2.0

2.5

R

D

S

(o

n)

 ,

 D

ra

in

-t

o-

S

ou

rc

O

R

es

is

ta

nc

   

   

   

   

   

   

   

 (

N

or

m

al

iz

ed

)

ID = 96A

VGS = 10V

Fig. 4 

Typical On-Resistance vs. Drain Current

 

 

15

30

45

60

75

90

105

ID, Drain Current (A)

1.65

1.75

1.85

1.95

T

yp

ic

al

  R

D

S

(o

n)

 (m

TA= 25°C

VGS = 8.0V

VGS = 7.0V

VGS = 10V

VGS = 15V

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AUIRF7759L2TR 

 

2015-10-5 

 

Fig 8.  Typical Source-Drain Diode Forward Voltage 

Fig 11.  Typical Gate Charge vs.  

 Gate-to-Source Voltage 

Fig 10.  Typical Capacitance vs. Drain-to-Source Voltage 

-75 -50 -25

0

25 50 75 100 125 150 175

TJ , Temperature ( °C )

0.5

1.0

1.5

2.0

2.5

3.0

3.5

4.0

4.5

V

G

S

(t

h)

,  G

at

th

re

sh

ol

V

ol

ta

ge

 (

V

)

ID = 1.0A

ID = 1.0mA

ID = 250µA

0.2

0.4

0.6

0.8

1.0

1.2

VSD, Source-to-Drain Voltage (V)

0.1

1

10

100

1000

I S

D

, R

ev

er

se

 D

ra

in

 C

ur

re

nt

 (

A

)

TJ = 175°C

TJ = 25°C

TJ = -40°C

VGS = 0V

0

50

100

150

200

250

300

ID,Drain-to-Source Current (A)

0

100

200

300

400

500

600

G

fs

, F

or

w

ar

T

ra

ns

co

nd

uc

ta

nc

(S

)

TJ = 25°C

TJ = 175°C

VDS = 25V 
20µs PULSE WIDTH

Fig. 7 Typical Threshold Voltage vs. 

Junction Temperature 

1

10

100

VDS, Drain-to-Source Voltage (V)

100

1000

10000

100000

C

, C

ap

ac

ita

nc

(p

F

)

VGS   = 0V,       f = 1 MHZ

Ciss    = Cgs + Cgd,  C ds SHORTED
Crss    = Cgd 
Coss   = Cds + Cgd

Coss

Crss

Ciss

0

50

100

150

200

250

300

 QG,  Total Gate Charge (nC)

0

2

4

6

8

10

12

14

V

G

S

, G

at

e-

to

-S

ou

rc

V

ol

ta

ge

 (

V

)

VDS= 60V

VDS= 38V

VDS= 15V

ID= 96A

Fig 9.  Typical Forward Trans conductance vs. Drain Current 

25

50

75

100

125

150

175

 TC , Case Temperature (°C)

0

40

80

120

160

200

I D

,   

D

ra

in

 C

ur

re

nt

 (

A

)

Fig 12. Maximum Drain Current vs. Case Temperature 

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AUIRF7759L2TR 

 

2015-10-5 

Fig 16.  Typical Avalanche Current vs. Pulse Width  

Fig 14. Maximum Avalanche Energy vs. Temperature 

Fig 15.  Maximum Effective Transient Thermal Impedance, Junction-to-Case  

0

1

10

100

VDS, Drain-to-Source Voltage (V)

0.1

1

10

100

1000

10000

I D

,  

D

ra

in

-t

o-

S

ou

rc

C

ur

re

nt

 (

A

)

OPERATION IN THIS AREA LIMITED 

BY RDS(on)

Tc = 25°C

Tj = 175°C

Single Pulse

100µsec

1msec

10msec

DC

25

50

75

100

125

150

175

Starting TJ , Junction Temperature (°C)

0

200

400

600

800

1000

1200

E

A

S

 , 

S

in

gl

P

ul

se

 A

va

la

nc

he

 E

ne

rg

(m

J)

ID

TOP         15.39A
                23.97A
BOTTOM    96A

1E-006

1E-005

0.0001

0.001

0.01

0.1

1

t1 , Rectangular Pulse Duration (sec)

0.0001

0.001

0.01

0.1

1

10

T

he

rm

al

 R

es

po

ns

Z

 th

JC

 )

 °

C

/W

0.20

0.10

D = 0.50

0.02

0.01

0.05

SINGLE PULSE

( THERMAL RESPONSE )

Notes:

1. Duty Factor D = t1/t2

2. Peak Tj = P dm x Zthjc + Tc

J

J

1

1

2

2

3

3

R

1

R

1

R

2

R

2

R

3

R

3

Ci= 

iRi

Ci= 

iRi

C

C

4

4

R

4

R

4

0.10804 

0.000171 

0.61403 

0.053914 

0.45202 

0.006099 

0.00001 

0.036168 

Ri (°C/W) 

i (sec)

Fig 13.  Maximum Safe Operating Area 

1.0E-06

1.0E-05

1.0E-04

1.0E-03

1.0E-02

1.0E-01

tav (sec)

0.1

1

10

100

1000

A

va

la

nc

he

 C

ur

re

nt

 (

A

)

0.05

Duty Cycle = Single Pulse

0.10

Allowed avalanche Current vs avalanche 
pulsewidth, tav, assuming  j = 25°C and 

Tstart = 150°C.

0.01

Allowed avalanche Current vs avalanche 
pulsewidth, tav, assuming Tj = 150°C and 

Tstart =25°C (Single Pulse)

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AUIRF7759L2TR 

 

2015-10-5 

Notes on Repetitive Avalanche Curves , Figures 16, 17: 
(For further info, see AN-1005 at www.infineon.com)
 
1.  Avalanche failures assumption:  
 

Purely a thermal phenomenon and failure occurs at a temperature far in  

 

excess of T

jmax

. This is validated for every part type. 

2.  Safe operation in Avalanche is allowed as long as T

jmax

 is not exceeded. 

3.   Equation below based on circuit and waveforms shown in Figures 18a, 18b. 
4.   P

D (ave) 

= Average power dissipation per single avalanche pulse. 

5.   BV = Rated breakdown voltage (1.3 factor accounts for voltage increase  
 during 

avalanche). 

6.   I

av 

= Allowable avalanche current. 

7. 

T

 = 

Allowable rise in junction temperature, not to exceed

 

T

jmax 

(assumed as  

 

25°C in Figure 16, 17).  

 

t

av = 

Average time in avalanche. 

 

D = Duty cycle in avalanche =  t

av 

·f 

 

Z

thJC

(D, t

av

) = Transient thermal resistance, see Figures 15) 

 

P

D (ave)

 = 1/2 ( 1.3·BV·I

av

) = 

T/ Z

thJC

 

I

av

 = 2

T/ [1.3·BV·Z

th

E

AS (AR) 

= P

D (ave)

·t

av

 

Fig 18a.  Unclamped Inductive Test Circuit 

Fig 18b.  Unclamped Inductive Waveforms 

Fig 19a.  Gate Charge Test Circuit 

Fig 19b.   Gate Charge Waveform 

VDD 

Fig 20a.  Switching Time Test Circuit 

Fig 20b.  Switching Time Waveforms 

25

50

75

100

125

150

175

Starting TJ , Junction Temperature (°C)

0

50

100

150

200

250

300

E

A

R

 , 

A

va

la

nc

he

 E

ne

rg

(m

J)

TOP          Single Pulse                
BOTTOM   1.0% Duty Cycle
ID = 96A

Fig 17.  Maximum Avalanche Energy vs. Temperature 

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background image

 

AUIRF7759L2TR 

 

2015-10-5 

DirectFET

®

  Board Footprint, L8  (Large Size Can). 

Please see DirectFET

®

  application note AN-1035 for all details regarding the assembly of DirectFET

®

 .  

This includes all recommendations for stencil and  substrate designs.

  

Note: For the most current drawing please refer to IR website at 

http://www.irf.com/package/

 

G = GATE
D = DRAIN
S = SOURCE

G

D

D

D

D

D

D

S

S

S

S

S

S

S

S

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background image

 

AUIRF7759L2TR 

 

2015-10-5 

Note: For the most current drawing please refer to IR website at 

http://www.irf.com/package/

 

DirectFET

®

  Outline Dimension, L8  (Large Size Can). 

Please see DirectFET

®

  application note AN-1035 for all details regarding the assembly of DirectFET

®

 . This includes 

all recommendations for stencil and  substrate designs. 

DirectFET

® 

 Part Marking 

CODE

A
B
C
D
E
F

G
H

J

K

L

M

R

P

0.017

0.029

0.003

0.007

0.057
0.104

0.236

0.048

0.026
0.024

MAX

0.360
0.280

0.38

0.68

0.02

0.09

1.35
2.55

5.90

1.18

0.55
0.58

MIN

9.05
6.85

0.42

0.74

0.08

0.17

1.45
2.65

6.00

1.22

0.65
0.62

MAX

9.15
7.10

0.015

0.027
0.003
0.001

0.100

0.053

0.232

0.046

0.023

0.022

MIN

0.270

0.356

METRIC

IMPERIAL

DIMENSIONS

0.98

1.02

0.73

0.77

0.040

0.039

0.030

0.029

L1

0.215

5.35

5.45

0.211

"AU" = GATE AND

AUTOMOTIVE MARKING

PART NUMBER

LOGO

BATCH NUMBER

DATE CODE

Line above the last character of

the date code indicates "Lead-Free"

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background image

 

AUIRF7759L2TR 

10 

 

2015-10-5 

DirectFET

® 

 Tape & Reel Dimension (Showing component orientation)  

Note: For the most current drawing please refer to IR website at 

http://www.irf.com/package/

 

REEL DIMENSIONS

NOTE: Controlling dimensions in mm
Std reel quantity is 4000 parts, ordered as AUIRF7759L2TR.

MAX

N.C
N.C

0.520

N.C

3.940
0.880
0.720
0.760

IMPERIAL

MIN

330.00

20.20

12.80

1.50

99.00

N.C

16.40
15.90

STANDARD OPTION (QTY 4000)

CODE

  A
  B
  C
  D
  E

  F

  G
  H

MAX

N.C
N.C

13.20

N.C

100.00

22.40

18.40
19.40

MIN

12.992

0.795
0.504
0.059
3.900

N.C

0.650
0.630

METRIC

LOADED TAPE FEED DIRECTION

NOTE: CONTROLLING
DIMENSIONS IN MM

CODE

A
B
C

D
E

F

G
H

IMPERIAL

MIN

4.69

0.154
0.623

0.291

0.283
0.390
0.059
0.059

MAX

12.10

4.10

16.30

7.60
7.40

10.10

N.C

 1.60

MIN

11.90

3.90

15.90

7.40
7.20
9.90
1.50
1.50

METRIC

DIMENSIONS

MAX

0.476

0.161

0.642
0.299

0.291

0.398

N.C

0.063

Maker
Infineon Technologies