AUIRF7341Q
V
DSS
55V
R
DS(on)
typ.
0.043
I
D
5.1A
max.
0.050
Description
Specifically designed for Automotive applications, these HEXFET® Power
MOSFET's in a Dual SO-8 package utilize the lastest processing
techniques to achieve extremely low on-resistance per silicon area.
Additional features of these Automotive qualified HEXFET Power
MOSFET's are a 175°C junction operating temperature, fast switching
speed and improved repetitive avalanche rating. These benefits combine
to make this design an extremely efficient and reliable device for use in
Automotive applications and a wide variety of other applications.
The efficient SO-8 package provides enhanced thermal characteristics and
dual MOSFET die capability making it ideal in a variety of power
applications. This dual, surface mount SO-8 can dramatically reduce
board space and is also available in Tape & Reel.
Features
Advanced Planar Technology
Ultra Low On-Resistance
Logic Level Gate Drive
Dual N Channel MOSFET
Surface Mount
Available in Tape & Reel
175°C Operating Temperature
Lead-Free, RoHS Compliant
Automotive Qualified *
1
2015-9-30
HEXFET® is a registered trademark of Infineon.
*Qualification standards can be found at
www.infineon.com
AUTOMOTIVE GRADE
Symbol Parameter
Max.
Units
V
DS
Drain-Source
Voltage
55 V
I
D
@ T
A
= 25°C
Continuous Drain Current, V
GS
@ 10V
5.1
A
I
D
@ T
A
= 70°C
Continuous Drain Current, V
GS
@ 10V
4.2
I
DM
Pulsed Drain Current 42
P
D
@T
A
= 25°C
Maximum Power Dissipation 2.4
P
D
@T
A
= 70°C
Maximum Power Dissipation 1.7
Linear Derating Factor
16
mW/°C
V
GS
Gate-to-Source Voltage
± 20
V
E
AS
Single Pulse Avalanche Energy (Thermally Limited) 140
mJ
I
AR
Avalanche Current
5.1
A
E
AR
Repetitive Avalanche Energy
See Fig.17, 18, 15a, 15b
mJ
T
J
Operating Junction and
-55 to + 175
°C
T
STG
Storage Temperature Range
W
Absolute Maximum Ratings
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress
ratings only; and functional operation of the device at these or any other condition beyond those indicated in the specifications is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The thermal resistance
and power dissipation ratings are measured under board mounted and still air conditions. Ambient temperature (TA) is 25°C, unless
otherwise specified.
Thermal Resistance
Symbol Parameter
Typ.
Max.
Units
°C/W
R
JA
Junction-to-Ambient –––
62.5
SO-8
AUIRF7341Q
Base part number
Package Type
Standard Pack
Orderable Part Number
Form
Quantity
AUIRF7341Q
SO-8
Tape and Reel
4000
AUIRF7341QTR
G D S
Gate Drain Source
D1
D1
D2
D2
G1
S2
G2
S1
Top View
8
1
2
3
4
5
6
7
AUIRF7341Q
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2015-9-30
Notes:
Repetitive rating; pulse width limited by max. junction temperature.
V
DD
=25V, Starting T
J
= 25°C, L = 10.7mH, R
G
= 25
, I
AS
= 5.2A.
Pulse width
300µs; duty cycle 2%.
Surface mounted FR-4 board, t
10sec.
Static @ T
J
= 25°C (unless otherwise specified)
Parameter Min.
Typ.
Max.
Units
Conditions
V
(BR)DSS
Drain-to-Source Breakdown Voltage
55
––– –––
V V
GS
= 0V, I
D
= 250µA
V
(BR)DSS
/
T
J
Breakdown Voltage Temp. Coefficient
––– 0.052 ––– V/°C Reference to 25°C, I
D
= 1mA
R
DS(on)
Static Drain-to-Source On-Resistance
––– 0.043 0.050
V
GS
= 10V, I
D
= 5.1A
––– 0.056 0.065
V
GS
= 4.5V, I
D
= 4.42A
V
GS(th)
Gate Threshold Voltage
1.0
–––
3.0
V V
DS
= V
GS
, I
D
= 250µA
gfs
Forward Trans conductance
10.4 ––– –––
S V
DS
= 10V, I
D
= 5.2A
I
DSS
Drain-to-Source Leakage Current
––– ––– 2.0
µA
V
DS
=44V, V
GS
= 0V
––– ––– 25
V
DS
= 44V,V
GS
= 0V,T
J
=150°C
I
GSS
Gate-to-Source Forward Leakage
–––
––– 100
nA
V
GS
= 20V
Gate-to-Source Reverse Leakage
–––
––– -100
V
GS
= -20V
Dynamic Electrical Characteristics @ T
J
= 25°C (unless otherwise specified)
Q
g
Total Gate Charge
–––
29
44
nC
I
D
=5.2A
Q
gs
Gate-to-Source Charge –––
2.9
4.4
V
DS
= 44V
Q
gd
Gate-to-Drain Charge
–––
7.3
11
V
GS
= 10V
t
d(on)
Turn-On Delay Time
–––
9.2
–––
ns
V
DD
= 28V
t
r
Rise Time
–––
7.7
–––
I
D
= 1.0A
t
d(off)
Turn-Off Delay Time
–––
31
–––
R
G
= 6.0
t
f
Fall Time
––– 12.5 –––
V
GS
= 10V
C
iss
Input Capacitance
–––
780 –––
pF
V
GS
= 0V
C
oss
Output Capacitance
–––
190 –––
V
DS
= 25V
C
rss
Reverse Transfer Capacitance
–––
66
–––
ƒ = 1.0MHz
Diode Characteristics
Parameter
Min. Typ. Max. Units
Conditions
I
S
Continuous Source Current
––– ––– 2.4
A
MOSFET symbol
(Body Diode)
showing the
I
SM
Pulsed Source Current
––– ––– 42
integral reverse
(Body Diode)
p-n junction diode.
V
SD
Diode Forward Voltage
–––
–––
1.2
V T
J
= 25°C,I
S
= 2.6A,V
GS
= 0V
t
rr
Reverse Recovery Time
–––
51
77
ns T
J
= 25°C ,I
F
= 2.6A,
Q
rr
Reverse Recovery Charge
–––
76
114
nC di/dt = 100A/µs
AUIRF7341Q
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2015-9-30
Fig. 2 Typical Output Characteristics
Fig. 3
Typical Transfer Characteristics
Fig. 4 Normalized On-Resistance
vs. Temperature
Fig. 1 Typical Output Characteristics
0.1
1
10
100
VDS, Drain-to-Source Voltage (V)
0.1
1
10
100
I D
, D
ra
in
-t
o-
S
ou
rc
e
C
ur
re
nt
(
A
)
2.7V
20µs PULSE WIDTH
Tj = 25°C
VGS
TOP 15.0V
10.0V
7.0V
5.5V
4.5V
4.0V
3.5V
BOTTOM 2.7V
0.1
1
10
100
VDS, Drain-to-Source Voltage (V)
0.1
1
10
100
I D
, D
ra
in
-t
o-
S
ou
rc
e
C
ur
re
nt
(
A
)
20µs PULSE WIDTH
Tj = 175°C
2.7V
VGS
TOP 15.0V
10.0V
7.0V
5.5V
4.5V
4.0V
3.5V
BOTTOM 2.7V
1
10
100
2.0
3.0
4.0
5.0
6.0
7.0
V = 25V
20µs PULSE WIDTH
DS
V , Gate-to-Source Voltage (V)
I
, D
rain
-to
-S
our
ce Cu
rrent
(A)
GS
D
T = 25 C
J
°
T = 175 C
J
°
-60 -40 -20 0
20 40 60 80 100 120 140 160 180
0.0
0.5
1.0
1.5
2.0
2.5
T , Junction Temperature ( C)
R
,
D
rai
n-
to
-S
ou
rc
e O
n R
es
is
tan
ce
(No
rma
liz
ed
)
J
D
S
(on)
°
V
=
I =
GS
D
10V
5.2A
AUIRF7341Q
4
2015-9-30
Fig 5. Typical Capacitance vs.
Drain-to-Source Voltage
Fig 6. Typical Gate Charge vs.
Gate-to-Source Voltage
Fig 8. Maximum Safe Operating Area
Fig. 7 Typical Source-to-Drain Diode
Forward Voltage
1
10
100
VDS, Drain-to-Source Voltage (V)
0
200
400
600
800
1000
1200
1400
C
, C
ap
ac
ita
nc
e(
pF
)
Coss
Crss
Ciss
VGS = 0V, f = 1 MHZ
C iss = Cgs + Cgd , Cds
SHORTED
Crss = Cgd
Coss = Cds + Cgd
0
10
20
30
40
50
0
4
8
12
16
20
Q , Total Gate Charge (nC)
V
,
G
ate
-t
o-
S
ou
rc
e V
olta
ge
(V
)
G
GS
I =
D
5.2A
V
= 11V
DS
V
= 27V
DS
V
= 44V
DS
0.1
1
10
100
0.2
0.5
0.8
1.1
1.4
V ,Source-to-Drain Voltage (V)
I
, R
ev
ers
e D
ra
in
C
ur
re
nt
(A
)
SD
SD
V = 0 V
GS
T = 175 C
J
°
T = 25 C
J
°
0.1
1
10
100
1000
0.1
1
10
100
1000
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
Single Pulse
T
T
= 175 C
= 25 C
°
°
J
C
V , Drain-to-Source Voltage (V)
I ,
D
rai
n
Cu
rr
en
t (
A
)
I ,
D
rai
n
Cu
rr
en
t (
A
)
DS
D
10us
100us
1ms
10ms
AUIRF7341Q
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2015-9-30
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient
Fig 9. Maximum Drain Current vs. Case Temperature
Fig 10a. Switching Time Test Circuit
Fig 10b. Switching Time Waveforms
25
50
75
100
125
150
175
0.0
1.0
2.0
3.0
4.0
5.0
6.0
T , Case Temperature ( C)
I
, D
ra
in C
urre
nt
(A
)
°
C
D
0.01
0.1
1
10
100
0.00001
0.0001
0.001
0.01
0.1
1
10
100
Notes:
1. Duty factor D =
t / t
2. Peak T = P
x Z
+ T
1
2
J
DM
thJA
A
P
t
t
DM
1
2
t , Rectangular Pulse Duration (sec)
T
h
e
rm
a
l R
e
sp
o
n
se
(Z
)
1
thJ
A
0.01
0.02
0.05
0.10
0.20
D = 0.50
SINGLE PULSE
(THERMAL RESPONSE)
AUIRF7341Q
6
2015-9-30
Fig 12.
Typical On-Resistance Vs. Gate Voltage
Fig 13.
Typical On-Resistance Vs. Drain Current
Vds
Vgs
Id
Vgs(th)
Qgs1 Qgs2
Qgd
Qgodr
Fig 14a. Basic Gate Charge Waveform
Fig 14b. Gate Charge Test Circuit
RG
IAS
0.01
tp
D.U.T
L
VDS
+
- VDD
DRIVER
A
15V
20V
Fig 15a. Unclamped Inductive Test Circuit
tp
V
(BR)DSS
I
AS
Fig 15b. Unclamped Inductive Waveforms
Fig 16. Maximum Avalanche Energy
vs. Drain Current
25
50
75
100
125
150
175
0
80
160
240
320
400
Starting Tj, Junction Temperature
( C)
E
,
S
ingl
e P
ul
se A
va
lanc
he E
ne
rgy
(
m
J)
AS
°
ID
TOP
BOTTOM
2.1A
4.3A
5.1A
AUIRF7341Q
7
2015-9-30
Fig 17. Typical Avalanche Current vs. Pulse width
Notes on Repetitive Avalanche Curves , Figures 17, 18:
(For further info, see AN-1005 at
www.infineon.com
)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a temperature far in
excess of T
jmax
. This is validated for every part type.
2. Safe operation in Avalanche is allowed as long as T
jmax
is not exceeded.
3. Equation below based on circuit and waveforms shown in Figures 15a, 15b.
4. P
D (ave)
= Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during
avalanche).
6. I
av
= Allowable avalanche current.
7.
T
=
Allowable rise in junction temperature, not to exceed
T
jmax
(assumed as
25°C in Figure 11, 17).
t
av =
Average time in avalanche.
D = Duty cycle in avalanche = t
av
·f
Z
thJC
(D, t
av
) = Transient thermal resistance, see Figures 11)
P
D (ave)
= 1/2 ( 1.3·BV·I
av
) =
T/ Z
thJC
I
av
= 2
T/ [1.3·BV·Z
th
]
E
AS (AR)
= P
D (ave)
·t
av
Fig 18. Maximum Avalanche Energy
vs. Temperature
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
1.0E+00
1.0E+01
1.0E+02
tav (sec)
0.001
0.01
0.1
1
10
100
A
va
la
nc
he
C
ur
re
nt
(
A
)
0.05
Duty Cycle = Single Pulse
0.10
Allowed avalanche Current vs
avalanche pulsewidth, tav
assuming
Tj = 25°C due to
avalanche losses
0.01
25
50
75
100
125
150
175
Starting TJ , Junction Temperature (°C)
0
20
40
60
80
100
120
140
E
A
R
,
A
va
la
nc
he
E
ne
rg
y
(m
J)
TOP Single Pulse
BOTTOM 10% Duty Cycle
ID = 5.1A
AUIRF7341Q
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2015-9-30
SO-8 Part Marking Information
SO-8 Package Outline
(Dimensions are shown in millimeters (inches)
e 1
D
E
y
b
A
A1
H
K
L
.189
.1497
0°
.013
.050 BASIC
.0532
.0040
.2284
.0099
.016
.1968
.1574
8°
.020
.0688
.0098
.2440
.0196
.050
4.80
3.80
0.33
1.35
0.10
5.80
0.25
0.40
0°
1.27 BASIC
5.00
4.00
0.51
1.75
0.25
6.20
0.50
1.27
M IN
M AX
M ILLIM ETERS
IN C H ES
M IN
M AX
D IM
8°
e
c
.0075
.0098
0.19
0.25
.025 BASIC
0.635 BASIC
8
7
5
6
5
D
B
E
A
e
6X
H
0.25 [ .010]
A
6
7
K x 45°
8X L
8X c
y
0.25 [ .010]
C A B
e1
A
A1
8X b
C
0.10 [ .004]
4
3
1
2
F O O T P R I N T
8 X 0 . 7 2 [ . 0 2 8 ]
6 . 4 6 [ . 2 5 5 ]
3 X 1 . 2 7 [ . 0 5 0 ]
4 . O U T L I N E C O N F O R M S T O J E D E C O U T L I N E M S - 0 1 2 A A .
N O T E S :
1 . D I M E N S I O N I N G & T O L E R A N C I N G P E R A S M E Y 1 4 . 5 M - 1 9 9 4 .
2 . C O N T R O L L I N G D I M E N S I O N : M I L L I M E T E R
3 . D I M E N S I O N S A R E S H O W N I N M I L L I M E T E R S [ I N C H E S ] .
5 D I M E N S I O N D O E S N O T I N C L U D E M O L D P R O T R U S I O N S .
6 D I M E N S I O N D O E S N O T I N C L U D E M O L D P R O T R U S I O N S .
M O L D P R O T R U S I O N S N O T T O E X C E E D 0 . 2 5 [ . 0 1 0 ] .
7 D I M E N S I O N I S T H E L E N G T H O F L E A D F O R S O L D E R I N G T O
A S U B S T R A T E .
M O L D P R O T R U S I O N S N O T T O E X C E E D 0 . 1 5 [ . 0 0 6 ] .
8 X 1 . 7 8 [ . 0 7 0 ]
AUIRF7341Q
9
2015-9-30
SO-8 Tape and Reel (
Dimensions are shown in millimeters (inches)
330.00
(12.992)
MAX.
14.40 ( .566 )
12.40 ( .488 )
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. OUTLINE CONFORMS TO EIA-481 & EIA-541.
FEED DIRECTION
TERMINAL NUMBER 1
12.3 ( .484 )
11.7 ( .461 )
8.1 ( .318 )
7.9 ( .312 )
NOTES:
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS(INCHES).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
AUIRF7341Q
10
2015-9-30
Qualification Information
Qualification Level
Automotive
(per AEC-Q101)
Comments: This part number(s) passed Automotive qualification. Infineon’s
Industrial and Consumer qualification level is granted by extension of the higher
Automotive level.
Moisture Sensitivity Level
SO-8
MSL1
ESD
Machine Model
Class M2 (+/- 200V)
†
AEC-Q101-002
Human Body Model
Class H1A (+/- 500V)
†
AEC-Q101-001
Charged Device Model
Class C5 (+/- 1125V)
†
AEC-Q101-005
RoHS Compliant
Yes
Published by
Infineon Technologies AG
81726 München, Germany
©
Infineon Technologies AG 2015
All Rights Reserved.
IMPORTANT NOTICE
The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics
(“Beschaffenheitsgarantie”). With respect to any examples, hints or any typical values stated herein and/or any
information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and
liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third
party.
In addition, any information given in this document is subject to customer’s compliance with its obligations stated in this
document and any applicable legal requirements, norms and standards concerning customer’s products and any use of
the product of Infineon Technologies in customer’s applications.
The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of
customer’s technical departments to evaluate the suitability of the product for the intended application and the
completeness of the product information given in this document with respect to such application.
For further information on the product, technology, delivery terms and conditions and prices please contact your nearest
Infineon Technologies office (
www.infineon.com
).
WARNINGS
Due to technical requirements products may contain dangerous substances. For information on the types in question
please contact your nearest Infineon Technologies office.
Except as otherwise explicitly approved by Infineon Technologies in a written document signed by authorized
representatives of Infineon Technologies, Infineon Technologies’ products may not be used in any applications where a
failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury.
Revision History
Date Comments
9/30/2015
Updated datasheet with corporate template
Corrected ordering table on page 1.
3/10/2014
Added "Logic Level Gate Drive" bullet in the features section on page 1
Updated data sheet with new IR corporate template
† Highest passing voltage.