TL/F/11563
74VHC573
#
74VHCT573
Octal
D-Type
Latch
with
TRI-STATE
Outputs
November 1995
74VHC573
#
74VHCT573
Octal D-Type Latch with TRI-STATE
É
Outputs
General Description
The VHC/VHCT573 is an advanced high speed CMOS octal
latch with TRI-STATE output fabricated with silicon gate
CMOS technology. It achieves the high speed operation
similar to equivalent Bipolar Schottky TTL while maintaining
the CMOS low power dissipation. This 8-bit D-type latch is
controlled by a latch enable input (LE) and an Output En-
able input (OE). When the OE input is high, the eight outputs
are in a high impedance state.
An input protection circuit ensures that 0V – 7V can be ap-
plied to the input pins without regard to the supply voltage.
This device can be used to interface 5V to 3V systems and
two supply systems such as battery back up. This circuit
prevents device destruction due to mismatched supply and
input voltages.
Features
Y
High Noise Immunity:
Ð VHC: V
NIH
e
V
NIL
e
28% V
CC
(Min)
Ð VHCT: V
IH
e
2.0V, V
IL
e
0.8V
Y
Power Down Protection:
Ð VHC
e
inputs only
Ð VHCT
e
inputs and outputs
Y
Low Noise:
Ð VHC V
OLP
e
0.6V (typ)
Ð VHCT V
OLP
e
0.8V (typ)
Y
Low Power Dissipation:
Ð I
CC
e
4 mA (Max)
@
T
A
e
25
§
C
Y
Balanced propagation delays: t
PLH
j
t
PHL
Y
Pin and function compatible with 74HC/HCT573
Note:
’VHCT specifications are preliminary
Commercial
Package Number
Package Description
74VHC573M
M20B
20-Lead Molded JEDEC SOIC
74VHC573SJ
M20D
20-Lead Molded EIAJ SOIC
74VHC573MSC
MSC20
20-Lead Molded EIAJ Type I SSOP
74VHC573MTC
MTC20
20-Lead Molded JEDEC Type I TSSOP
74VHC573N
N20A
20-Lead Molded DIP
74VHCT573M
M20B
20-Lead Molded JEDEC SOIC
74VHCT573SJ
M20D
20-Lead Molded EIAJ SOIC
74VHCT573MTC
MTC20
20-Lead Molded JEDEC Type I TSSOP
74VHCT573N
N20A
20-Lead Molded DIP
Note:
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter
‘‘X’’ to the ordering code.
Logic Symbol
IEEE/IEC
TL/F/11563 – 1
Connection Diagram
Pin Assignment for
DIP, SSOP, TSSOP and SOIC
TL/F/11563 – 2
Pin Names
Description
D
0
– D
7
Data Inputs
LE
Latch Enable Input
OE
TRI-STATE Output
Enable Input
O
0
– O
7
TRI-STATE Outputs
TRI-STATE
É
is a registered trademark of National Semiconductor Corporation.
C1995 National Semiconductor Corporation
RRD-B30M125/Printed in U. S. A.
Functional Description
The VHC/VHCT573 contains eight D-type latches with TRI-
STATE output buffers. When the Latch Enable (LE) input is
HIGH, data on the D
n
inputs enters the latches. In this con-
dition the latches are transparent, i.e., a latch output will
change state each time its D input changes. When LE is
LOW the latches store the information that was present on
the D inputs, a setup time preceding the HIGH-to-LOW tran-
sition of LE. The TRI-STATE buffers are controlled by the
Output Enable (OE) input. When OE is LOW, the buffers are
enabled. When OE is HIGH the buffers are in the high im-
pedance mode, but, this does not interfere with entering
new data into the latches.
Truth Table
Inputs
Outputs
OE
LE
D
O
n
L
H
H
H
L
H
L
L
L
L
X
O
0
H
X
X
Z
H e HIGH Voltage Level
L e LOW Voltage Level
X e Immaterial
Z e High Impedance
Logic Diagram
TL/F/11563 – 3
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
2
Absolute Maximum Ratings
(Note 1)
Supply Voltage (V
CC
)
b
0.5V to
a
7.0V
DC Input Voltage (V
IN
)
b
0.5V to
a
7.0V
DC Output Voltage (V
OUT
)
VHC
b
0.5V to V
CC
a
0.5V
VHCT*
b
0.5V to
a
7.0V
Input Diode Current (I
IK
)
b
20 mA
Output Diode Current
VHC
g
20 mA
VHCT
b
20 mA
DC Output Current (I
OUT
)
g
25 mA
DC V
CC
/GND Current (I
CC
)
g
75 mA
Storage Temperature (T
STG
)
b
65
§
C to
a
150
§
C
Lead Temperature (T
L
)
(Soldering, 10 seconds)
260
§
C
*V
OUT
l
V
CC
only if output is in H or Z state
Note 1:
Absolute Maximum Ratings are values beyond
which the device may be damaged or have its useful life
impaired. The databook specifications should be met, with-
out exception, to ensure that the system design is reliable
over its power supply, temperature, and output/input load-
ing variables. National does not recommend operation out-
side databook specifications.
Recommended Operating
Conditions
Supply Voltage (V
CC
)
VHC
2.0V to
a
5.5V
VHCT
4.5V to
a
5.5V
Input Voltage (V
IN
)
0V to
a
5.5V
Output Voltage (V
OUT
)
0V to V
CC
Operating Temperature (T
OPR
)
74VHC/VHCT
b
40
§
C to
a
85
§
C
Input Rise and Fall Time (t
r
, t
f
)
V
CC
e
3.3V
g
0.3V (VHC only)
0 E 100 ns/V
V
CC
e
5.0V
g
0.5V
0 E 20 ns/V
DC Characteristics for ’VHC Family Devices
Symbol
Parameter
V
CC
(V)
74VHC
74VHC
Units
Conditions
T
A
e
25
§
C
T
A
e b
40
§
C
to
a
85
§
C
Min
Typ
Max
Min
Max
V
IH
High Level
2.0
1.50
1.50
Input
3.0 – 5.5
0.7 V
CC
0.7 V
CC
V
Voltage
V
IL
Low Level
2.0
0.50
0.50
Input
3.0 – 5.5
0.3 V
CC
0.3 V
CC
V
Voltage
V
OH
High Level
2.0
1.9
2.0
1.9
V
IN
e
V
IH
Output
3.0
2.9
3.0
2.9
V
or V
IL
I
OH
e b
50 mA
Voltage
4.5
4.4
4.5
4.4
3.0
2.58
2.48
V
I
OH
e b
4 mA
4.5
3.94
3.80
I
OH
e b
8 mA
V
OL
Low Level
2.0
0.0
0.1
0.1
V
IN
e
V
IH
Output
3.0
0.0
0.1
0.1
V
or V
IL
I
OL
e
50 mA
Voltage
4.5
0.0
0.1
0.1
3.0
0.36
0.44
V
I
OL
e
4 mA
4.5
0.36
0.44
I
OL
e
8 mA
I
OZ
TRI-STATE
5.5
g
0.25
g
2.5
m
A
V
IN
e
V
IH
or V
IL
Output
V
OUT
e
V
CC
or GND
Off-State
Current
I
IN
Input
0 – 5.5
g
0.1
g
1.0
m
A
V
IN
e
5.5V or GND
Leakage
Current
I
CC
Quiescent
5.5
4.0
40.0
m
A
V
IN
e
V
CC
or GND
Supply
Current
3
DC Characteristics for ’VHC Family Devices
Symbol
Parameter
V
CC
(V)
74VHC
Units
Conditions
T
A
e
25
§
C
Typ
Limits
**V
OLP
Quiet Output Maximum Dynamic V
OL
5.0
0.9
1.2
V
C
L
e
50 pF
**V
OLV
Quiet Output Minimum Dynamic V
OL
5.0
b
0.8
b
1.0
V
C
L
e
50 pF
**V
IHD
Minimum High Level Dynamic Input Voltage
5.0
3.5
V
C
L
e
50 pF
**V
ILD
Maximum Low Level Dynamic Input Voltage
5.0
1.5
V
C
L
e
50 pF
**Parameter guaranteed by design.
DC Characteristics for ’VHCT Family Devices (Preliminary)
Symbol
Parameter
V
CC
(V)
74VHCT
74VHCT
Units
Conditions
T
A
e
25
§
C
T
A
e b
40
§
C
to
a
85
§
C
Min
Typ
Max
Min
Max
V
IH
High Level
4.5
2.0
2.0
Input Voltage
5.5
2.0
2.0
V
V
IL
Low Level
4.5
0.8
0.8
Input Voltage
5.5
0.8
0.8
V
V
OH
High Level
4.5
3.15
3.65
3.15
V
V
IN
e
V
IH
I
OH
e b
50 mA
Output
4.5
2.5
2.4
V
or V
IL
I
OH
e b
8 mA
Voltage
V
OL
Low Level
4.5
0.0
0.1
0.1
V
V
IN
e
V
IH
I
OL
e b
50 mA
Output
4.5
0.36
0.44
V
or V
IL
I
OL
e
8 mA
Voltage
I
OZ
TRI-STATE
5.5
g
0.25
g
2.5
m
A
V
IN
e
V
IH
or V
IL
Output
V
OUT
e
V
CC
or GND
Off-State
Current
I
IN
Input
0 – 5.5
g
0.1
g
1.0
m
A
V
IN
e
5.5V or GND
Leakage
Current
I
CC
Quiescent
5.5
4.0
40.0
m
A
V
IN
e
V
CC
or GND
Supply
Current
I
CCT
Maximum
5.5
1.35
1.50
mA
V
IN
e
3.4V
I
CC
/Input
Other Inputs
e
V
CC
or GND
I
OPD
Output
0.0
g
0.5
g
0.5
m
A
V
OUT
e
5.5V
Leakage
Current
(Power
Down State)
4
DC Characteristics for ’VHCT (Preliminary)
Symbol
Parameter
V
CC
(V)
74VHCT
Units
Conditions
T
A
e
25
§
C
Typ
Limits
**V
OLP
Quiet Output Maximum Dynamic V
OL
5.0
1.1
1.5
V
C
L
e
50 pF
**V
OLV
Quiet Output Minimum Dynamic V
OL
5.0
b
1.0
b
1.3
V
C
L
e
50 pF
**V
IHD
Minimum High Level Dynamic Input Voltage
5.0
2.0
V
C
L
e
50 pF
**V
ILD
Maximum Low Level Dynamic Input Voltage
5.0
0.8
V
C
L
e
50 pF
**Parameter guaranteed by design.
AC Electrical Characteristics for ’VHC Family Devices
Symbol
Parameter
V
CC
(V)
74VHC
74VHC
Units
Conditions
T
A
e
25
§
C
T
A
e b
40
§
C
to
a
85
§
C
Min
Typ
Max
Min
Max
t
PLH
Propagation Delay
3.3
g
0.3
7.6
11.9
1.0
14.0
ns
C
L
e
15 pF
Time (LE to O
n
)
t
PHL
10.1
15.4
1.0
17.5
C
L
e
50 pF
5.0
g
0.5
5.0
7.7
1.0
9.0
ns
C
L
e
15 pF
6.5
9.7
1.0
11.0
C
L
e
50 pF
t
PLH
Propagation Delay
3.3
g
0.3
7.0
11.0
1.0
13.0
ns
C
L
e
15 pF
Time (D – O
n
)
t
PHL
9.5
14.5
1.0
16.5
C
L
e
50 pF
5.0
g
0.5
4.5
6.8
1.0
8.0
C
L
e
15 pF
6.0
8.8
1.0
10.0
C
L
e
50 pF
t
PZL
TRI-STATE Output
3.3
g
0.3
7.3
11.5
1.0
13.5
ns
R
L
e
1 kX
C
L
e
15 pF
Enable Time
t
PZH
9.8
15.0
1.0
17.0
C
L
e
50 pF
5.0
g
0.5
5.2
7.7
1.0
9.0
ns
C
L
e
15 pF
6.7
9.7
1.0
11.0
C
L
e
50 pF
t
PLZ
TRI-STATE Output
3.3
g
0.3
10.7
14.5
1.0
16.5
ns
R
L
e
1 kX
C
L
e
50 pF
Disable Time
t
PHZ
5.0
g
0.5
6.7
9.7
1.0
11.0
C
L
e
50 pF
t
OSLH
Output to Output Skew
3.3
g
0.3
1.5
1.5
ns
(Note 1)
C
L
e
50 pF
t
OSHL
5.0
g
0.5
1.0
1.0
C
L
e
50 pF
C
IN
Input Capacitance
4
10
10
pF
V
CC
e
Open
C
OUT
Output Capacitance
6
pF
V
CC
e
5.0V
C
PD
Power Dissipation
29
pF
(Note 2)
Capacitance
Note 1:
Parameter guaranteed by design. t
OSLH
e
l
t
PLH max
b
t
PLH min
l
; t
OSHL
e
l
t
PHL max
b
t
PHL min
l
Note 2:
C
PD
is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average
operating current can be obtained by the equation: I
CC
(opr.) e C
PD
* V
CC
* f
IN
a
I
CC
/8 (per Latch). The total C
PD
when n pcs. of the Latch operates can be
calculated by the equation: C
PD
(total) e 21 a 8n.
5
AC Operating Requirements for ’VHC Devices
Symbol
Parameter
V
CC
(V)
74VHC
74VHC
Units
Conditions
T
A
e
25
§
C
T
A
e b
40
§
C
to
a
85
§
C
Min
Typ
Max
Min
Max
t
w(H)
Minimum
3.3
g
0.3
5.0
5.0
ns
Pulse
t
w(L)
5.0
g
0.5
5.0
5.0
Width (LE)
t
s
Minimum
3.3
g
0.3
3.5
3.5
ns
Setup
5.0
g
0.5
3.5
3.5
Time
t
h
Minimum
3.3
g
0.3
1.5
1.5
ns
Hold Time
5.0
g
0.5
1.5
1.5
AC Electrical Characteristics for ’VHCT (Preliminary)
Symbol
Parameter
V
CC
(V)
74VHCT
74VHCT
Units
Conditions
T
A
e
25
§
C
T
A
e b
40
§
C
to
a
85
§
C
Min
Typ
Max
Min
Max
t
PLH
Propagation Delay
5.0
g
0.5
7.7
12.3
1.0
13.5
ns
C
L
e
15 pF
Time (LE to O
n
)
t
PHL
8.5
13.3
1.0
14.5
C
L
e
50 pF
t
PLH
Propagation Delay
5.0
g
0.5
5.1
8.5
1.0
9.5
ns
C
L
e
15 pF
Time (D to O
n
)
t
PHL
5.9
9.5
1.0
10.5
C
L
e
50 pF
t
PZL
TRI-STATE Output
5.0
g
0.5
6.3
10.9
1.0
12.5
ns
R
L
e
1 kX
C
L
e
15 pF
Enable Time
t
PZH
7.1
11.9
1.0
13.5
C
L
e
50 pF
t
PLZ
TRI-STATE Output
5.0
g
0.5
6.8
11.2
1.0
12.0
ns
R
L
e
1 kX
C
L
e
50 pF
Disable Time
t
PHZ
t
OSLH
Output to Output Skew
5.0
g
0.5
1.0
1.0
ns
(Note 1)
t
OSHL
C
IN
Input Capacitance
4
10
10
pF
V
CC
e
Open
C
OUT
Output Capacitance
9
pF
V
CC
e
5.0V
C
PD
Power Dissipation
27
pF
(Note 2)
Capacitance
Note 1:
Parameter guaranteed by design. t
OSLH
e
l
t
PLH max
b
t
PLH min
l
; t
OSHL
e
l
t
PHL max
b
t
PHL min
l
Note 2:
C
PD
is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average
operating current can be obtained by the equation: I
CC
(opr.) e C
PD
* V
CC
* f
IN
a
I
CC
/8 (per F/F). The total C
PD
when n pcs. of the Latch operates can be
calculated by the equation: C
PD
(total) e 14 a 13n.
6
AC Operating Requirements for ’VHCT (Preliminary)
Symbol
Parameter
V
CC
(V)
74VHCT
74VHCT
Units
Conditions
T
A
e
25
§
C
T
A
e b
40
§
C
to
a
85
§
C
Min
Typ
Max
Min
Max
t
w(H)
Minimum
5.0
g
0.5
6.5
6.5
ns
Pulse
Width (LE)
t
s
Minimum
5.0
g
0.5
1.5
1.5
ns
Setup
Time
t
h
Minimum
5.0
g
0.5
3.5
3.5
ns
Hold Time
Ordering Information
The device number is used to form part of a simplified purchasing code, where the package type and temperature range are
defined as follows:
TL/F/11563 – 5
7
Physical Dimensions
inches (millimeters) (Continued)
20-Lead Small Outline Integrated CircuitÐJEDEC SOIC (M)
NS Package Number M20B
20-Lead Plastic EIAJ SOIC (SJ)
NS Package Number M20D
8
Physical Dimensions
inches (millimeters) (Continued)
20-Lead Shrink Small Outline EIAJ SSOP Type I (MSC)
NS Package Number MSC20
20-Lead Molded Thin Shrink Small Outline Package, JEDEC
NS Package Number MTC20
9
74VHC573
#
74VHCT573
Octal
D-Type
Latch
with
TRI-STATE
Outputs
Physical Dimensions
millimeters (Continued)
20-Lead (0.300
×
Wide) Molded Dual-In-Line Package
NS Package Number N20A
LIFE SUPPORT POLICY
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DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL
SEMICONDUCTOR CORPORATION. As used herein:
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2. A critical component is any component of a life
systems which, (a) are intended for surgical implant
support device or system whose failure to perform can
into the body, or (b) support or sustain life, and whose
be reasonably expected to cause the failure of the life
failure to perform, when properly used in accordance
support device or system, or to affect its safety or
with instructions for use provided in the labeling, can
effectiveness.
be reasonably expected to result in a significant injury
to the user.
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National Semiconductor
National Semiconductor
National Semiconductor
Corporation
Europe
Hong Kong Ltd.
Japan Ltd.
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Fax: (
a
49) 0-180-530 85 86
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