USB332x Data Sheet

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 2008 - 2015 Microchip Technology Inc.

DS00001902A-page 1

Highlights

• Integrated ESD protection circuits

- Up to ±15kV IEC Air Discharge without exter-

nal devices

• Over-Voltage Protection circuit (OVP) protects the 

VBUS pin from continuous DC voltages up to 30V

• Integrated USB Switch

- No degradation of Hi-Speed electrical char-

acteristics

- Allows single USB port of connection by pro-

viding switching function for:

- Battery charging
- Stereo and mono/mic audio
- USB Full-Speed/Low-Speed data

• flexPWR

®

 Technology

- Low current design ideal for battery powered 

applications

- “Sleep” mode tri-states all ULPI pins and 

places the part in a low current state

- 1.8V IO Voltage (±10%)

• Integrated battery to 3.3V LDO regulator

- 2.2uF bypass capacitor
- 100mV dropout voltage

• “Wrapper-less” design for optimal timing perfor-

mance and design ease
- Low Latency Hi-Speed Receiver (43 Hi-

Speed clocks Max) allows use of legacy 
UTMI Links with a ULPI bridge

• External Reference Clock operation

- ULPI Input Clock Mode (60MHz sourced by 

Link)

- 0 to 3.6V input drive tolerant
- Able to accept “noisy” clock sources as refer-

ence to internal, low-jitter PLL

- Frequencies: 12, 13, 19.2, 26, or 27MHz

• Smart detection circuits allow identification of 

USB charger, headset, or data cable insertion

• Includes full support for the optional On-The-Go 

(OTG) protocol detailed in the On-The-Go Sup-
plement Revision 2.0 specification

• Supports the OTG Host Negotiation Protocol 

(HNP) and Session Request Protocol (SRP)

• UART mode for non-USB serial data transfers

• Internal 5V cable short-circuit protection of ID, DP 

and DM lines to VBUS or ground

• Industrial Operating Temperature -40

°C to +85°C

• 25-ball WLCSP RoHS compliant package; 

(2.0 x 2.0 x 0.53mm height)

Applications

The USB332x is targeted for any application where a
Hi-Speed USB connection is desired and when board
space, power, and interface pins must be minimized.
The USB332x is well suited for:
• Cell Phones
• PDAs
• MP3 Players
• GPS Personal Navigation Devices
• Datacards
• Scanners
• External Hard Drives
• Digital Still and Video Cameras
• Portable Media Players
• Entertainment Devices
• Printers
• HDTVs
• Set Top Boxes/DVR/PVR
• Video Record/Playback Systems
• IP and Video Phones
• Gaming Consoles
• POS Terminals

USB332x

Industry’s Smallest Hi-Speed USB Transceiver with 1.8V 

ULPI Interface

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USB332x

DS00001902A-page 2

 2008 - 2015 Microchip Technology Inc.

TO OUR VALUED CUSTOMERS

It is our intention to provide our valued customers with the best documentation possible to ensure successful use of your Microchip
products. To this end, we will continue to improve our publications to better suit your needs. Our publications will be refined and
enhanced as new volumes and updates are introduced. 
If you have any questions or comments regarding this publication, please contact the Marketing Communications Department via
E-mail at 

docerrors@microchip.com

. We welcome your feedback.

Most Current Data Sheet

To obtain the most up-to-date version of this data sheet, please register at our Worldwide Web site at:

http://www.microchip.com

You can determine the version of a data sheet by examining its literature number found on the bottom outside corner of any page. 
The last character of the literature number is the version number, (e.g., DS30000000A is version A of document DS30000000).

Errata

An errata sheet, describing minor operational differences from the data sheet and recommended workarounds, may exist for cur-
rent devices. As device/documentation issues become known to us, we will publish an errata sheet. The errata will specify the
revision of silicon and revision of document to which it applies.
To determine if an errata sheet exists for a particular device, please check with one of the following:
• Microchip’s Worldwide Web site; 

http://www.microchip.com

• Your local Microchip sales office (see last page)
When contacting a sales office, please specify which device, revision of silicon and data sheet (include -literature number) you are
using.

Customer Notification System

Register on our web site at 

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 to receive the most current information on all of our products.

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 2008 - 2015 Microchip Technology Inc.

DS00001902A-page 3

USB332x

Table of Contents

1.0 Introduction  ..................................................................................................................................................................................... 4
2.0 USB332x Pin Locations and Definitions  ......................................................................................................................................... 6
3.0 Limiting Values ................................................................................................................................................................................ 9
4.0 Electrical Characteristics ............................................................................................................................................................... 10
5.0 Architecture Overview  ................................................................................................................................................................... 16
6.0 ULPI Operation  ............................................................................................................................................................................. 30
7.0 ULPI Register Map ........................................................................................................................................................................ 46
8.0 Application Notes  .......................................................................................................................................................................... 56
9.0 Package Outline, Tape & Reel Drawings, Package Marking ........................................................................................................ 60
Appendix A: Revision History .............................................................................................................................................................. 65
The Microchip Web Site ...................................................................................................................................................................... 67
Customer Change Notification Service  ............................................................................................................................................... 67
Customer Support ............................................................................................................................................................................... 67
Product Identification System  ............................................................................................................................................................. 68

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USB332x

DS00001902A-page 4

 2008 - 2015 Microchip Technology Inc.

1.0

INTRODUCTION

Microchip’s USB332x is a family of Hi-Speed USB 2.0 Transceivers that provides a physical layer (PHY) solution well-
suited for portable electronic devices. Both commercial and industrial temperature applications are supported.

 

Each model in the USB332x family may use a 60MHz reference clock, or the model-number specific reference clock
shown in 

Product Identification System on page 68

Several advanced features make the USB332x the transceiver of choice by reducing both electrical bill of material
(eBOM) part count and printed circuit board (PCB) area. Outstanding ESD robustness eliminates the need for external
ESD protection devices in typical applications. The internal Over-Voltage Protection circuit (OVP) protects the USB332x
from voltages up to 30V. By using a reference clock from the Link, the USB332x removes the cost of a dedicated crystal
reference from the design. And the integrated USB switch enables unique product features with a single USB port of
connection.
The USB332x meets all of the electrical requirements to be used as a Hi-Speed USB Host, Device, or an On-the-Go
(OTG) transceiver. In addition to the supporting USB signaling, the USB332x also provides USB UART mode and USB
Audio mode.
USB332x uses the industry standard UTMI+ Low Pin Interface (ULPI) to connect the USB PHY to the Link. ULPI uses
a method of in-band signaling and status byte transfers between the Link and PHY to facilitate a USB session with only
12 pins.
The USB332x uses Microchip’s “wrapper-less” technology to implement the ULPI interface. This “wrapper-less” tech-
nology allows the PHY to achieve a low latency transmit and receive time. Microchip’s low latency transceiver allows an
existing UTMI Link to be reused by adding a UTMI to ULPI bridge. By adding a bridge to the ASIC the existing and
proven UTMI Link IP can be reused.

The USB332x includes an integrated 3.3V Low Drop Out (LDO) linear voltage regulator that may optionally be used to
generate 3.3V from power applied at the VBAT pin. The voltage on the VBAT pin can range from 3.1 to 5.5V. The reg-
ulator dropout voltage is less than 100mV which allows the PHY to continue USB signaling when the voltage on VBAT
drops to 3.1V. The USB transceiver will continue to operate at lower voltages, although some parameters may be out-
side the limits of the USB specifications. If the user would like to provide a 3.3V supply to the USB332x, the VBAT and
VDD33

 pins should be connected together as described in 

Section 5.5.1

.

FIGURE 1-1:

USB332X BLOCK DIAGRAM

OTG

USB

DP/DM

Switch

Hi-Speed 

USB 

Transceiver

ULPI 

Interface

ULPI 

Registers 

and State 

Machine

BIAS

Low Jitter

Integrated 

PLL

Integrated 

Power 

Management

VBUS

ID

DP

DM

RBIAS

E

S

D Protection

SP

K

_

L

SPK

_R

REFCLK

DATA[7:0]

RESETB

VDD18

VDD33

VBAT

DIR

NXT

STP

CLKOUT

OVP

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DS00001902A-page 5

USB332x

The USB332x also includes integrated pull-up resistors that can be used for detecting the attachment of a USB Charger.
By sensing the attachment to a USB Charger, a product using the USB332x can charge its battery at more than the
500mA allowed when charging from a USB Host as described in 

Section 8.2

.

In USB UART mode, the USB332x DP and DM pins are redefined to enable pass-through of asynchronous serial data.
The USB332x can only enter UART mode when the user programs the part into this mode, as described in

Section 6.5.1

.

In USB audio mode, a switch connects the DP pin to the SPK_R pin, and another switch connects he DM pin to the
SPK_L

 pin. These switches are shown in the lower left-hand corner of 

Figure 5-1

. The USB332x can be configured to

enter USB audio mode as described in 

Section 6.5.2

. In addition, these switches are on when the RESETB pin of the

USB332x is asserted. The USB audio mode enables audio signaling from a single USB port of connection, and the
switches may also be used to connect Full Speed USB from another PHY onto the USB cable.

1.1

Reference Documents

• Universal Serial Bus Specification, Revision 2.0, April 27, 2000
• On-The-Go Supplement to the USB 2.0 Specification, Revision 2.0, May 8, 2009
• 27% Resistor ECN
• USB 2.0 Transceiver Macrocell Interface (UTMI) Specification, Version 1.12, May 27, 2000
• UTMI+ Specification, Revision 1.1, February 25, 2004
• UTMI+ Low Pin Interface (ULPI) Specification, Revision 1.1, October 20th, 2004
• Technical Requirements and Test Methods of Charger and Interface for Mobile Telecommunication Terminal 

Equipment (Chinese Charger Specification Approval Draft 11/29/2006)

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USB332x

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 2008 - 2015 Microchip Technology Inc.

2.0

USB332X PIN LOCATIONS AND DEFINITIONS

2.1

USB332x

 

Ball Locations and Descriptions

2.1.1

PACKAGE DIAGRAM WITH BALL LOCATIONS

The illustration below is viewed from the top of the package.

2.1.2

BALL DEFINITIONS

The following table details the ball definitions for the figure above.

FIGURE 2-1:

USB332X BALL LOCATIONS - TOP VIEW

TABLE 2-1:

USB332X PIN DESCRIPTION

Ball

Name

Direction/

Type

Active 

Level

Description

B1

ID

Input,

Analog

N/A

ID 

pin of the USB cable. For applications 

not using ID this pin can be connected to 
VDD33

. For an A-Device ID is grounded. 

For a B-Device ID is floated.

C2

VBUS

I/O,

Analog

N/A

This pin connects to an external resistor 

(R

VBUS

) connected to the VBUS pin of the 

USB cable. This pin is used for the VBUS 

comparator inputs and for VBUS pulsing 

during session request protocol. See 

Table 5-6, "Required RVBUS Resistor 

Value"

.

C1

VBAT

Power

N/A

Regulator input.

D2

VDD33

Power

N/A

3.3V Regulator Output. A 2.2uF (<1 ohm 

ESR) bypass capacitor to ground is 

required for regulator stability. The bypass 

capacitor should be placed as close as 

possible to the USB332x.

D1

DM

I/O,

Analog

N/A

D- pin of the USB cable.

A

E

D

C

B

1

5

4

3

2

TOP VIEW

RESETB

ID

VBUS

VBAT

VDD33

DM

DP

SPK_R

SPK_L

DATA[7]

DATA[4]

DATA[6]

DATA[5]

CLKOUT

DATA[3]

DATA[2]

DATA[1]

DATA[0]

NXT

DIR

STP

VDD18

REFCLK

RBIAS

GND

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USB332x

E1

DP

I/O,

Analog

N/A

D+ pin of the USB cable.

E2

SPK_R

I/O,

Analog

N/A

USB switch in/out for DP signals

E3

SPK_L

I/O,

Analog

N/A

USB switch in/out for DM signals

D3

DATA[7]

I/O,

CMOS

N/A

ULPI bi-directional data bus. DATA[7] is 

the MSB.

E4

DATA[6]

I/O,

CMOS

N/A

ULPI bi-directional data bus.

E5

DATA[5]

I/O,

CMOS

N/A

ULPI bi-directional data bus.

D4

DATA[4]

I/O,

CMOS

N/A

ULPI bi-directional data bus.

A5

CLKOUT

Output,

CMOS

N/A

ULPI Clock Out Mode:

60MHz ULPI clock output. All ULPI signals 

are driven synchronous to the rising edge 

of this clock. 
ULPI Clock In Mode:

This pin is connected to VDD18 to 

configure 60MHz ULPI Clock IN mode as 

described in 

Section 5.4.1

.

D5

DATA[3]

I/O,

CMOS

N/A

ULPI bi-directional data bus.

C4

DATA[2]

I/O,

CMOS

N/A

ULPI bi-directional data bus.

C5

DATA[1]

I/O,

CMOS

N/A

ULPI bi-directional data bus.

B4

DATA[0]

I/O,

CMOS

N/A

ULPI bi-directional data bus. DATA[0] is 

the LSB.

B5

NXT

Output,

CMOS

High

The PHY asserts NXT to throttle the data. 

When the Link is sending data to the PHY, 
NXT

 indicates when the current byte has 

been accepted by the PHY. The Link 

places the next byte on the data bus in the 

following clock cycle.

A4

DIR

Output,

CMOS

N/A

Controls the direction of the data bus. 

When the PHY has data to transfer to the 

Link, it drives DIR high to take ownership 

of the bus. When the PHY has no data to 

transfer it drives DIR low and monitors the 

bus for commands from the Link.

A3

STP

Input,

CMOS

High

The Link asserts STP for one clock cycle 

to stop the data stream currently on the 

bus. If the Link is sending data to the PHY, 
STP

 indicates the last byte of data was on 

the bus in the previous cycle.

B3

VDD18

Power

N/A

External 1.8V Supply input pin. This pad 

needs to be bypassed with a 0.1uF 

capacitor to ground, placed as close as 

possible to the USB332x.

TABLE 2-1:

USB332X PIN DESCRIPTION (CONTINUED) 

Ball

Name

Direction/

Type

Active 

Level

Description

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USB332x

DS00001902A-page 8

 2008 - 2015 Microchip Technology Inc.

B2

RESETB

Input,

CMOS,

Low

When low, the part is suspended with all 

ULPI outputs tri-stated. When high, the 

USB332x will operate as a normal ULPI 

device, as described in 

Section 5.5.2

. The 

state of this pin may be changed 

asynchronously to the clock signals. When 

asserted for a minimum of 1 microsecond 

and then de-asserted, the ULPI registers 

are reset to their default state and all 

internal state machines are reset.

A2

REFCLK

Input,

CMOS

N/A

ULPI Clock Out Mode:

Model-specific reference clock.

See 

Product Identification System on page 

68

ULPI Clock In Mode:

60MHz ULPI clock input.

A1

RBIAS

Analog,

CMOS

N/A

Bias Resistor pin. This pin requires an 

8.06kΩ (±1%) resistor to ground, placed as 

close as possible to the USB332x. 

Nominal voltage during ULPI operation is 

0.8V.

C3

GND

Ground

N/A

Ground. 

TABLE 2-1:

USB332X PIN DESCRIPTION (CONTINUED) 

Ball

Name

Direction/

Type

Active 

Level

Description

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DS00001902A-page 9

USB332x

3.0

LIMITING VALUES

3.1

Absolute Maximum Ratings

3.2

Recommended Operating Conditions

TABLE 3-1:

ABSOLUTE MAXIMUM RATINGS

Parameter

Symbol

Conditions

MIN

TYP MAX  Units

VBUS

VBATIDDPDM

SPK_L

, and SPK_R 

voltage to GND

V

MAX_5V

Voltage measured at pin. 
VBUS

 tolerant to 30V with 

external R

VBUS

.

-0.5

+6.0

V

Maximum VDD18 voltage 

to Ground

V

MAX_18V

-0.5

2.5

V

Maximum VDD33 voltage 

to Ground

V

MAX_33V

-0.5

4.0

V

Maximum I/O voltage to 

Ground

V

MAX_IN

-0.5

V

DD18

 + 0.7

V

Operating Temperature

T

MAX_OP

-40

85

C

Storage Temperature

T

MAX_STG

-55

150

C

Note:

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the
device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

TABLE 3-2:

RECOMMENDED OPERATING CONDITIONS

Parameter

Symbol

Conditions

MIN

TYP MAX 

Units

VBAT

 to GND

V

VBAT

3.1

5.5

V

VDD33

 to GND

V

DD33

3.0

3.3

3.6

V

VDD18 

to GND

V

DD18

1.6

1.8

2.0

V

Input Voltage on Digital 

Pins (RESETBSTPDIR
NXT

DATA[7:0])

V

I

0.0

V

DD18

V

Voltage on Analog I/O 

Pins (DPDMIDSPK_L
SPK_R

)

V

I(I/O)

0.0

V

DD33

V

VBUS

 to GND

V

VMAX

0.0

5.5

Ambient Temperature

T

A

-40

85

C

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4.0

ELECTRICAL CHARACTERISTICS

The following conditions are assumed unless otherwise specified:
V

VBAT

 = 3.1 to 5.5V; V

DD18

 = 1.6 to 2.0V; V

SS

 = 0V; T

A

 = -40C to +85C

The current for 3.3V circuits is sourced at the VBAT pin, except when using an external 3.3V supply as shown in

Figure 5-6

.

4.1

Operating Current

Note 4-1

ClockSuspendM

 bit = 0.

Note 4-2

SessEnd, VbusVld, and IdFloat comparators disabled. STP Interface protection disabled.

TABLE 4-1:

OPERATING CURRENT

Parameter

Symbol

Conditions

MIN

TYP MAX Units

Synchronous Mode Current

(Default Configuration)

I

33AVG(SYNC)

Start-up sequence defined in 

Section 5.5.4

 has 

completed.

5

5.7

5.9

mA

I

18AVG(SYNC)

19

22.6

27.5

mA

Synchronous Mode Current

(HS USB operation)

I

33AVG(HS)

Active USB Transfer

10

11.5

13.5

mA

I

18AVG(HS)

28

33.6

37

mA

Synchronous Mode Current

(FS/LS USB operation) 

I

33AVG(FS)

Active USB Transfer

10

10.5

11.3

mA

I

18AVG(FS)

23

27.2

29.4

mA

Serial Mode Current

(FS/LS USB)

Note 4-1

I

33AVG(FS_S)

5

5.7

5.9

mA

I

18AVG(FS_S)

2

2.9

3.9

mA

USB UART Current

Note 4-1

I

33AVG(UART)

5

5.7

5.9

mA

I

18AVG(UART)

2

2.9

3.9

mA

USB Audio Mode

I

33AVG(AUDIO)

V

VBAT

 = 4.2V

V

DD18

 = 1.8V

17

22

32.3

uA

I

18AVG(AUDIO)

30

36.3

60

uA

Low Power Mode

Note 4-2

I

DD33(LPM)

V

VBAT

 = 4.2V

V

DD18

 = 1.8V

17

22.1

34

uA

I

DD18(LPM)

1.2

32

uA

Standby Mode

I

DD33(RSTB)

RESETB = 0

V

VBAT

 = 4.2V

V

DD18

 = 1.8V

17

20.8

34

uA

I

DD18(RSTB)

0.9

32

uA

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DS00001902A-page 1

Highlights

• Integrated ESD protection circuits

- Up to ±15kV IEC Air Discharge without exter-

nal devices

• Over-Voltage Protection circuit (OVP) protects the 

VBUS pin from continuous DC voltages up to 30V

• Integrated USB Switch

- No degradation of Hi-Speed electrical char-

acteristics

- Allows single USB port of connection by pro-

viding switching function for:

- Battery charging
- Stereo and mono/mic audio
- USB Full-Speed/Low-Speed data

• flexPWR

®

 Technology

- Low current design ideal for battery powered 

applications

- “Sleep” mode tri-states all ULPI pins and 

places the part in a low current state

- 1.8V IO Voltage (±10%)

• Integrated battery to 3.3V LDO regulator

- 2.2uF bypass capacitor
- 100mV dropout voltage

• “Wrapper-less” design for optimal timing perfor-

mance and design ease
- Low Latency Hi-Speed Receiver (43 Hi-

Speed clocks Max) allows use of legacy 
UTMI Links with a ULPI bridge

• External Reference Clock operation

- ULPI Input Clock Mode (60MHz sourced by 

Link)

- 0 to 3.6V input drive tolerant
- Able to accept “noisy” clock sources as refer-

ence to internal, low-jitter PLL

- Frequencies: 12, 13, 19.2, 26, or 27MHz

• Smart detection circuits allow identification of 

USB charger, headset, or data cable insertion

• Includes full support for the optional On-The-Go 

(OTG) protocol detailed in the On-The-Go Sup-
plement Revision 2.0 specification

• Supports the OTG Host Negotiation Protocol 

(HNP) and Session Request Protocol (SRP)

• UART mode for non-USB serial data transfers

• Internal 5V cable short-circuit protection of ID, DP 

and DM lines to VBUS or ground

• Industrial Operating Temperature -40

°C to +85°C

• 25-ball WLCSP RoHS compliant package; 

(2.0 x 2.0 x 0.53mm height)

Applications

The USB332x is targeted for any application where a
Hi-Speed USB connection is desired and when board
space, power, and interface pins must be minimized.
The USB332x is well suited for:
• Cell Phones
• PDAs
• MP3 Players
• GPS Personal Navigation Devices
• Datacards
• Scanners
• External Hard Drives
• Digital Still and Video Cameras
• Portable Media Players
• Entertainment Devices
• Printers
• HDTVs
• Set Top Boxes/DVR/PVR
• Video Record/Playback Systems
• IP and Video Phones
• Gaming Consoles
• POS Terminals

USB332x

Industry’s Smallest Hi-Speed USB Transceiver with 1.8V 

ULPI Interface

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USB332x

DS00001902A-page 2

 2008 - 2015 Microchip Technology Inc.

TO OUR VALUED CUSTOMERS

It is our intention to provide our valued customers with the best documentation possible to ensure successful use of your Microchip
products. To this end, we will continue to improve our publications to better suit your needs. Our publications will be refined and
enhanced as new volumes and updates are introduced. 
If you have any questions or comments regarding this publication, please contact the Marketing Communications Department via
E-mail at 

docerrors@microchip.com

. We welcome your feedback.

Most Current Data Sheet

To obtain the most up-to-date version of this data sheet, please register at our Worldwide Web site at:

http://www.microchip.com

You can determine the version of a data sheet by examining its literature number found on the bottom outside corner of any page. 
The last character of the literature number is the version number, (e.g., DS30000000A is version A of document DS30000000).

Errata

An errata sheet, describing minor operational differences from the data sheet and recommended workarounds, may exist for cur-
rent devices. As device/documentation issues become known to us, we will publish an errata sheet. The errata will specify the
revision of silicon and revision of document to which it applies.
To determine if an errata sheet exists for a particular device, please check with one of the following:
• Microchip’s Worldwide Web site; 

http://www.microchip.com

• Your local Microchip sales office (see last page)
When contacting a sales office, please specify which device, revision of silicon and data sheet (include -literature number) you are
using.

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 to receive the most current information on all of our products.

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 2008 - 2015 Microchip Technology Inc.

DS00001902A-page 3

USB332x

Table of Contents

1.0 Introduction  ..................................................................................................................................................................................... 4
2.0 USB332x Pin Locations and Definitions  ......................................................................................................................................... 6
3.0 Limiting Values ................................................................................................................................................................................ 9
4.0 Electrical Characteristics ............................................................................................................................................................... 10
5.0 Architecture Overview  ................................................................................................................................................................... 16
6.0 ULPI Operation  ............................................................................................................................................................................. 30
7.0 ULPI Register Map ........................................................................................................................................................................ 46
8.0 Application Notes  .......................................................................................................................................................................... 56
9.0 Package Outline, Tape & Reel Drawings, Package Marking ........................................................................................................ 60
Appendix A: Revision History .............................................................................................................................................................. 65
The Microchip Web Site ...................................................................................................................................................................... 67
Customer Change Notification Service  ............................................................................................................................................... 67
Customer Support ............................................................................................................................................................................... 67
Product Identification System  ............................................................................................................................................................. 68

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USB332x

DS00001902A-page 4

 2008 - 2015 Microchip Technology Inc.

1.0

INTRODUCTION

Microchip’s USB332x is a family of Hi-Speed USB 2.0 Transceivers that provides a physical layer (PHY) solution well-
suited for portable electronic devices. Both commercial and industrial temperature applications are supported.

 

Each model in the USB332x family may use a 60MHz reference clock, or the model-number specific reference clock
shown in 

Product Identification System on page 68

Several advanced features make the USB332x the transceiver of choice by reducing both electrical bill of material
(eBOM) part count and printed circuit board (PCB) area. Outstanding ESD robustness eliminates the need for external
ESD protection devices in typical applications. The internal Over-Voltage Protection circuit (OVP) protects the USB332x
from voltages up to 30V. By using a reference clock from the Link, the USB332x removes the cost of a dedicated crystal
reference from the design. And the integrated USB switch enables unique product features with a single USB port of
connection.
The USB332x meets all of the electrical requirements to be used as a Hi-Speed USB Host, Device, or an On-the-Go
(OTG) transceiver. In addition to the supporting USB signaling, the USB332x also provides USB UART mode and USB
Audio mode.
USB332x uses the industry standard UTMI+ Low Pin Interface (ULPI) to connect the USB PHY to the Link. ULPI uses
a method of in-band signaling and status byte transfers between the Link and PHY to facilitate a USB session with only
12 pins.
The USB332x uses Microchip’s “wrapper-less” technology to implement the ULPI interface. This “wrapper-less” tech-
nology allows the PHY to achieve a low latency transmit and receive time. Microchip’s low latency transceiver allows an
existing UTMI Link to be reused by adding a UTMI to ULPI bridge. By adding a bridge to the ASIC the existing and
proven UTMI Link IP can be reused.

The USB332x includes an integrated 3.3V Low Drop Out (LDO) linear voltage regulator that may optionally be used to
generate 3.3V from power applied at the VBAT pin. The voltage on the VBAT pin can range from 3.1 to 5.5V. The reg-
ulator dropout voltage is less than 100mV which allows the PHY to continue USB signaling when the voltage on VBAT
drops to 3.1V. The USB transceiver will continue to operate at lower voltages, although some parameters may be out-
side the limits of the USB specifications. If the user would like to provide a 3.3V supply to the USB332x, the VBAT and
VDD33

 pins should be connected together as described in 

Section 5.5.1

.

FIGURE 1-1:

USB332X BLOCK DIAGRAM

OTG

USB

DP/DM

Switch

Hi-Speed 

USB 

Transceiver

ULPI 

Interface

ULPI 

Registers 

and State 

Machine

BIAS

Low Jitter

Integrated 

PLL

Integrated 

Power 

Management

VBUS

ID

DP

DM

RBIAS

E

S

D Protection

SP

K

_

L

SPK

_R

REFCLK

DATA[7:0]

RESETB

VDD18

VDD33

VBAT

DIR

NXT

STP

CLKOUT

OVP

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 2008 - 2015 Microchip Technology Inc.

DS00001902A-page 5

USB332x

The USB332x also includes integrated pull-up resistors that can be used for detecting the attachment of a USB Charger.
By sensing the attachment to a USB Charger, a product using the USB332x can charge its battery at more than the
500mA allowed when charging from a USB Host as described in 

Section 8.2

.

In USB UART mode, the USB332x DP and DM pins are redefined to enable pass-through of asynchronous serial data.
The USB332x can only enter UART mode when the user programs the part into this mode, as described in

Section 6.5.1

.

In USB audio mode, a switch connects the DP pin to the SPK_R pin, and another switch connects he DM pin to the
SPK_L

 pin. These switches are shown in the lower left-hand corner of 

Figure 5-1

. The USB332x can be configured to

enter USB audio mode as described in 

Section 6.5.2

. In addition, these switches are on when the RESETB pin of the

USB332x is asserted. The USB audio mode enables audio signaling from a single USB port of connection, and the
switches may also be used to connect Full Speed USB from another PHY onto the USB cable.

1.1

Reference Documents

• Universal Serial Bus Specification, Revision 2.0, April 27, 2000
• On-The-Go Supplement to the USB 2.0 Specification, Revision 2.0, May 8, 2009
• 27% Resistor ECN
• USB 2.0 Transceiver Macrocell Interface (UTMI) Specification, Version 1.12, May 27, 2000
• UTMI+ Specification, Revision 1.1, February 25, 2004
• UTMI+ Low Pin Interface (ULPI) Specification, Revision 1.1, October 20th, 2004
• Technical Requirements and Test Methods of Charger and Interface for Mobile Telecommunication Terminal 

Equipment (Chinese Charger Specification Approval Draft 11/29/2006)

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USB332x

DS00001902A-page 6

 2008 - 2015 Microchip Technology Inc.

2.0

USB332X PIN LOCATIONS AND DEFINITIONS

2.1

USB332x

 

Ball Locations and Descriptions

2.1.1

PACKAGE DIAGRAM WITH BALL LOCATIONS

The illustration below is viewed from the top of the package.

2.1.2

BALL DEFINITIONS

The following table details the ball definitions for the figure above.

FIGURE 2-1:

USB332X BALL LOCATIONS - TOP VIEW

TABLE 2-1:

USB332X PIN DESCRIPTION

Ball

Name

Direction/

Type

Active 

Level

Description

B1

ID

Input,

Analog

N/A

ID 

pin of the USB cable. For applications 

not using ID this pin can be connected to 
VDD33

. For an A-Device ID is grounded. 

For a B-Device ID is floated.

C2

VBUS

I/O,

Analog

N/A

This pin connects to an external resistor 

(R

VBUS

) connected to the VBUS pin of the 

USB cable. This pin is used for the VBUS 

comparator inputs and for VBUS pulsing 

during session request protocol. See 

Table 5-6, "Required RVBUS Resistor 

Value"

.

C1

VBAT

Power

N/A

Regulator input.

D2

VDD33

Power

N/A

3.3V Regulator Output. A 2.2uF (<1 ohm 

ESR) bypass capacitor to ground is 

required for regulator stability. The bypass 

capacitor should be placed as close as 

possible to the USB332x.

D1

DM

I/O,

Analog

N/A

D- pin of the USB cable.

A

E

D

C

B

1

5

4

3

2

TOP VIEW

RESETB

ID

VBUS

VBAT

VDD33

DM

DP

SPK_R

SPK_L

DATA[7]

DATA[4]

DATA[6]

DATA[5]

CLKOUT

DATA[3]

DATA[2]

DATA[1]

DATA[0]

NXT

DIR

STP

VDD18

REFCLK

RBIAS

GND

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USB332x

E1

DP

I/O,

Analog

N/A

D+ pin of the USB cable.

E2

SPK_R

I/O,

Analog

N/A

USB switch in/out for DP signals

E3

SPK_L

I/O,

Analog

N/A

USB switch in/out for DM signals

D3

DATA[7]

I/O,

CMOS

N/A

ULPI bi-directional data bus. DATA[7] is 

the MSB.

E4

DATA[6]

I/O,

CMOS

N/A

ULPI bi-directional data bus.

E5

DATA[5]

I/O,

CMOS

N/A

ULPI bi-directional data bus.

D4

DATA[4]

I/O,

CMOS

N/A

ULPI bi-directional data bus.

A5

CLKOUT

Output,

CMOS

N/A

ULPI Clock Out Mode:

60MHz ULPI clock output. All ULPI signals 

are driven synchronous to the rising edge 

of this clock. 
ULPI Clock In Mode:

This pin is connected to VDD18 to 

configure 60MHz ULPI Clock IN mode as 

described in 

Section 5.4.1

.

D5

DATA[3]

I/O,

CMOS

N/A

ULPI bi-directional data bus.

C4

DATA[2]

I/O,

CMOS

N/A

ULPI bi-directional data bus.

C5

DATA[1]

I/O,

CMOS

N/A

ULPI bi-directional data bus.

B4

DATA[0]

I/O,

CMOS

N/A

ULPI bi-directional data bus. DATA[0] is 

the LSB.

B5

NXT

Output,

CMOS

High

The PHY asserts NXT to throttle the data. 

When the Link is sending data to the PHY, 
NXT

 indicates when the current byte has 

been accepted by the PHY. The Link 

places the next byte on the data bus in the 

following clock cycle.

A4

DIR

Output,

CMOS

N/A

Controls the direction of the data bus. 

When the PHY has data to transfer to the 

Link, it drives DIR high to take ownership 

of the bus. When the PHY has no data to 

transfer it drives DIR low and monitors the 

bus for commands from the Link.

A3

STP

Input,

CMOS

High

The Link asserts STP for one clock cycle 

to stop the data stream currently on the 

bus. If the Link is sending data to the PHY, 
STP

 indicates the last byte of data was on 

the bus in the previous cycle.

B3

VDD18

Power

N/A

External 1.8V Supply input pin. This pad 

needs to be bypassed with a 0.1uF 

capacitor to ground, placed as close as 

possible to the USB332x.

TABLE 2-1:

USB332X PIN DESCRIPTION (CONTINUED) 

Ball

Name

Direction/

Type

Active 

Level

Description

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USB332x

DS00001902A-page 8

 2008 - 2015 Microchip Technology Inc.

B2

RESETB

Input,

CMOS,

Low

When low, the part is suspended with all 

ULPI outputs tri-stated. When high, the 

USB332x will operate as a normal ULPI 

device, as described in 

Section 5.5.2

. The 

state of this pin may be changed 

asynchronously to the clock signals. When 

asserted for a minimum of 1 microsecond 

and then de-asserted, the ULPI registers 

are reset to their default state and all 

internal state machines are reset.

A2

REFCLK

Input,

CMOS

N/A

ULPI Clock Out Mode:

Model-specific reference clock.

See 

Product Identification System on page 

68

ULPI Clock In Mode:

60MHz ULPI clock input.

A1

RBIAS

Analog,

CMOS

N/A

Bias Resistor pin. This pin requires an 

8.06kΩ (±1%) resistor to ground, placed as 

close as possible to the USB332x. 

Nominal voltage during ULPI operation is 

0.8V.

C3

GND

Ground

N/A

Ground. 

TABLE 2-1:

USB332X PIN DESCRIPTION (CONTINUED) 

Ball

Name

Direction/

Type

Active 

Level

Description

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DS00001902A-page 9

USB332x

3.0

LIMITING VALUES

3.1

Absolute Maximum Ratings

3.2

Recommended Operating Conditions

TABLE 3-1:

ABSOLUTE MAXIMUM RATINGS

Parameter

Symbol

Conditions

MIN

TYP MAX  Units

VBUS

VBATIDDPDM

SPK_L

, and SPK_R 

voltage to GND

V

MAX_5V

Voltage measured at pin. 
VBUS

 tolerant to 30V with 

external R

VBUS

.

-0.5

+6.0

V

Maximum VDD18 voltage 

to Ground

V

MAX_18V

-0.5

2.5

V

Maximum VDD33 voltage 

to Ground

V

MAX_33V

-0.5

4.0

V

Maximum I/O voltage to 

Ground

V

MAX_IN

-0.5

V

DD18

 + 0.7

V

Operating Temperature

T

MAX_OP

-40

85

C

Storage Temperature

T

MAX_STG

-55

150

C

Note:

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the
device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

TABLE 3-2:

RECOMMENDED OPERATING CONDITIONS

Parameter

Symbol

Conditions

MIN

TYP MAX 

Units

VBAT

 to GND

V

VBAT

3.1

5.5

V

VDD33

 to GND

V

DD33

3.0

3.3

3.6

V

VDD18 

to GND

V

DD18

1.6

1.8

2.0

V

Input Voltage on Digital 

Pins (RESETBSTPDIR
NXT

DATA[7:0])

V

I

0.0

V

DD18

V

Voltage on Analog I/O 

Pins (DPDMIDSPK_L
SPK_R

)

V

I(I/O)

0.0

V

DD33

V

VBUS

 to GND

V

VMAX

0.0

5.5

Ambient Temperature

T

A

-40

85

C

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4.0

ELECTRICAL CHARACTERISTICS

The following conditions are assumed unless otherwise specified:
V

VBAT

 = 3.1 to 5.5V; V

DD18

 = 1.6 to 2.0V; V

SS

 = 0V; T

A

 = -40C to +85C

The current for 3.3V circuits is sourced at the VBAT pin, except when using an external 3.3V supply as shown in

Figure 5-6

.

4.1

Operating Current

Note 4-1

ClockSuspendM

 bit = 0.

Note 4-2

SessEnd, VbusVld, and IdFloat comparators disabled. STP Interface protection disabled.

TABLE 4-1:

OPERATING CURRENT

Parameter

Symbol

Conditions

MIN

TYP MAX Units

Synchronous Mode Current

(Default Configuration)

I

33AVG(SYNC)

Start-up sequence defined in 

Section 5.5.4

 has 

completed.

5

5.7

5.9

mA

I

18AVG(SYNC)

19

22.6

27.5

mA

Synchronous Mode Current

(HS USB operation)

I

33AVG(HS)

Active USB Transfer

10

11.5

13.5

mA

I

18AVG(HS)

28

33.6

37

mA

Synchronous Mode Current

(FS/LS USB operation) 

I

33AVG(FS)

Active USB Transfer

10

10.5

11.3

mA

I

18AVG(FS)

23

27.2

29.4

mA

Serial Mode Current

(FS/LS USB)

Note 4-1

I

33AVG(FS_S)

5

5.7

5.9

mA

I

18AVG(FS_S)

2

2.9

3.9

mA

USB UART Current

Note 4-1

I

33AVG(UART)

5

5.7

5.9

mA

I

18AVG(UART)

2

2.9

3.9

mA

USB Audio Mode

I

33AVG(AUDIO)

V

VBAT

 = 4.2V

V

DD18

 = 1.8V

17

22

32.3

uA

I

18AVG(AUDIO)

30

36.3

60

uA

Low Power Mode

Note 4-2

I

DD33(LPM)

V

VBAT

 = 4.2V

V

DD18

 = 1.8V

17

22.1

34

uA

I

DD18(LPM)

1.2

32

uA

Standby Mode

I

DD33(RSTB)

RESETB = 0

V

VBAT

 = 4.2V

V

DD18

 = 1.8V

17

20.8

34

uA

I

DD18(RSTB)

0.9

32

uA

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Highlights

• Integrated ESD protection circuits

- Up to ±15kV IEC Air Discharge without exter-

nal devices

• Over-Voltage Protection circuit (OVP) protects the 

VBUS pin from continuous DC voltages up to 30V

• Integrated USB Switch

- No degradation of Hi-Speed electrical char-

acteristics

- Allows single USB port of connection by pro-

viding switching function for:

- Battery charging
- Stereo and mono/mic audio
- USB Full-Speed/Low-Speed data

• flexPWR

®

 Technology

- Low current design ideal for battery powered 

applications

- “Sleep” mode tri-states all ULPI pins and 

places the part in a low current state

- 1.8V IO Voltage (±10%)

• Integrated battery to 3.3V LDO regulator

- 2.2uF bypass capacitor
- 100mV dropout voltage

• “Wrapper-less” design for optimal timing perfor-

mance and design ease
- Low Latency Hi-Speed Receiver (43 Hi-

Speed clocks Max) allows use of legacy 
UTMI Links with a ULPI bridge

• External Reference Clock operation

- ULPI Input Clock Mode (60MHz sourced by 

Link)

- 0 to 3.6V input drive tolerant
- Able to accept “noisy” clock sources as refer-

ence to internal, low-jitter PLL

- Frequencies: 12, 13, 19.2, 26, or 27MHz

• Smart detection circuits allow identification of 

USB charger, headset, or data cable insertion

• Includes full support for the optional On-The-Go 

(OTG) protocol detailed in the On-The-Go Sup-
plement Revision 2.0 specification

• Supports the OTG Host Negotiation Protocol 

(HNP) and Session Request Protocol (SRP)

• UART mode for non-USB serial data transfers

• Internal 5V cable short-circuit protection of ID, DP 

and DM lines to VBUS or ground

• Industrial Operating Temperature -40

°C to +85°C

• 25-ball WLCSP RoHS compliant package; 

(2.0 x 2.0 x 0.53mm height)

Applications

The USB332x is targeted for any application where a
Hi-Speed USB connection is desired and when board
space, power, and interface pins must be minimized.
The USB332x is well suited for:
• Cell Phones
• PDAs
• MP3 Players
• GPS Personal Navigation Devices
• Datacards
• Scanners
• External Hard Drives
• Digital Still and Video Cameras
• Portable Media Players
• Entertainment Devices
• Printers
• HDTVs
• Set Top Boxes/DVR/PVR
• Video Record/Playback Systems
• IP and Video Phones
• Gaming Consoles
• POS Terminals

USB332x

Industry’s Smallest Hi-Speed USB Transceiver with 1.8V 

ULPI Interface

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USB332x

DS00001902A-page 2

 2008 - 2015 Microchip Technology Inc.

TO OUR VALUED CUSTOMERS

It is our intention to provide our valued customers with the best documentation possible to ensure successful use of your Microchip
products. To this end, we will continue to improve our publications to better suit your needs. Our publications will be refined and
enhanced as new volumes and updates are introduced. 
If you have any questions or comments regarding this publication, please contact the Marketing Communications Department via
E-mail at 

docerrors@microchip.com

. We welcome your feedback.

Most Current Data Sheet

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You can determine the version of a data sheet by examining its literature number found on the bottom outside corner of any page. 
The last character of the literature number is the version number, (e.g., DS30000000A is version A of document DS30000000).

Errata

An errata sheet, describing minor operational differences from the data sheet and recommended workarounds, may exist for cur-
rent devices. As device/documentation issues become known to us, we will publish an errata sheet. The errata will specify the
revision of silicon and revision of document to which it applies.
To determine if an errata sheet exists for a particular device, please check with one of the following:
• Microchip’s Worldwide Web site; 

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• Your local Microchip sales office (see last page)
When contacting a sales office, please specify which device, revision of silicon and data sheet (include -literature number) you are
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DS00001902A-page 3

USB332x

Table of Contents

1.0 Introduction  ..................................................................................................................................................................................... 4
2.0 USB332x Pin Locations and Definitions  ......................................................................................................................................... 6
3.0 Limiting Values ................................................................................................................................................................................ 9
4.0 Electrical Characteristics ............................................................................................................................................................... 10
5.0 Architecture Overview  ................................................................................................................................................................... 16
6.0 ULPI Operation  ............................................................................................................................................................................. 30
7.0 ULPI Register Map ........................................................................................................................................................................ 46
8.0 Application Notes  .......................................................................................................................................................................... 56
9.0 Package Outline, Tape & Reel Drawings, Package Marking ........................................................................................................ 60
Appendix A: Revision History .............................................................................................................................................................. 65
The Microchip Web Site ...................................................................................................................................................................... 67
Customer Change Notification Service  ............................................................................................................................................... 67
Customer Support ............................................................................................................................................................................... 67
Product Identification System  ............................................................................................................................................................. 68

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USB332x

DS00001902A-page 4

 2008 - 2015 Microchip Technology Inc.

1.0

INTRODUCTION

Microchip’s USB332x is a family of Hi-Speed USB 2.0 Transceivers that provides a physical layer (PHY) solution well-
suited for portable electronic devices. Both commercial and industrial temperature applications are supported.

 

Each model in the USB332x family may use a 60MHz reference clock, or the model-number specific reference clock
shown in 

Product Identification System on page 68

Several advanced features make the USB332x the transceiver of choice by reducing both electrical bill of material
(eBOM) part count and printed circuit board (PCB) area. Outstanding ESD robustness eliminates the need for external
ESD protection devices in typical applications. The internal Over-Voltage Protection circuit (OVP) protects the USB332x
from voltages up to 30V. By using a reference clock from the Link, the USB332x removes the cost of a dedicated crystal
reference from the design. And the integrated USB switch enables unique product features with a single USB port of
connection.
The USB332x meets all of the electrical requirements to be used as a Hi-Speed USB Host, Device, or an On-the-Go
(OTG) transceiver. In addition to the supporting USB signaling, the USB332x also provides USB UART mode and USB
Audio mode.
USB332x uses the industry standard UTMI+ Low Pin Interface (ULPI) to connect the USB PHY to the Link. ULPI uses
a method of in-band signaling and status byte transfers between the Link and PHY to facilitate a USB session with only
12 pins.
The USB332x uses Microchip’s “wrapper-less” technology to implement the ULPI interface. This “wrapper-less” tech-
nology allows the PHY to achieve a low latency transmit and receive time. Microchip’s low latency transceiver allows an
existing UTMI Link to be reused by adding a UTMI to ULPI bridge. By adding a bridge to the ASIC the existing and
proven UTMI Link IP can be reused.

The USB332x includes an integrated 3.3V Low Drop Out (LDO) linear voltage regulator that may optionally be used to
generate 3.3V from power applied at the VBAT pin. The voltage on the VBAT pin can range from 3.1 to 5.5V. The reg-
ulator dropout voltage is less than 100mV which allows the PHY to continue USB signaling when the voltage on VBAT
drops to 3.1V. The USB transceiver will continue to operate at lower voltages, although some parameters may be out-
side the limits of the USB specifications. If the user would like to provide a 3.3V supply to the USB332x, the VBAT and
VDD33

 pins should be connected together as described in 

Section 5.5.1

.

FIGURE 1-1:

USB332X BLOCK DIAGRAM

OTG

USB

DP/DM

Switch

Hi-Speed 

USB 

Transceiver

ULPI 

Interface

ULPI 

Registers 

and State 

Machine

BIAS

Low Jitter

Integrated 

PLL

Integrated 

Power 

Management

VBUS

ID

DP

DM

RBIAS

E

S

D Protection

SP

K

_

L

SPK

_R

REFCLK

DATA[7:0]

RESETB

VDD18

VDD33

VBAT

DIR

NXT

STP

CLKOUT

OVP

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 2008 - 2015 Microchip Technology Inc.

DS00001902A-page 5

USB332x

The USB332x also includes integrated pull-up resistors that can be used for detecting the attachment of a USB Charger.
By sensing the attachment to a USB Charger, a product using the USB332x can charge its battery at more than the
500mA allowed when charging from a USB Host as described in 

Section 8.2

.

In USB UART mode, the USB332x DP and DM pins are redefined to enable pass-through of asynchronous serial data.
The USB332x can only enter UART mode when the user programs the part into this mode, as described in

Section 6.5.1

.

In USB audio mode, a switch connects the DP pin to the SPK_R pin, and another switch connects he DM pin to the
SPK_L

 pin. These switches are shown in the lower left-hand corner of 

Figure 5-1

. The USB332x can be configured to

enter USB audio mode as described in 

Section 6.5.2

. In addition, these switches are on when the RESETB pin of the

USB332x is asserted. The USB audio mode enables audio signaling from a single USB port of connection, and the
switches may also be used to connect Full Speed USB from another PHY onto the USB cable.

1.1

Reference Documents

• Universal Serial Bus Specification, Revision 2.0, April 27, 2000
• On-The-Go Supplement to the USB 2.0 Specification, Revision 2.0, May 8, 2009
• 27% Resistor ECN
• USB 2.0 Transceiver Macrocell Interface (UTMI) Specification, Version 1.12, May 27, 2000
• UTMI+ Specification, Revision 1.1, February 25, 2004
• UTMI+ Low Pin Interface (ULPI) Specification, Revision 1.1, October 20th, 2004
• Technical Requirements and Test Methods of Charger and Interface for Mobile Telecommunication Terminal 

Equipment (Chinese Charger Specification Approval Draft 11/29/2006)

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USB332x

DS00001902A-page 6

 2008 - 2015 Microchip Technology Inc.

2.0

USB332X PIN LOCATIONS AND DEFINITIONS

2.1

USB332x

 

Ball Locations and Descriptions

2.1.1

PACKAGE DIAGRAM WITH BALL LOCATIONS

The illustration below is viewed from the top of the package.

2.1.2

BALL DEFINITIONS

The following table details the ball definitions for the figure above.

FIGURE 2-1:

USB332X BALL LOCATIONS - TOP VIEW

TABLE 2-1:

USB332X PIN DESCRIPTION

Ball

Name

Direction/

Type

Active 

Level

Description

B1

ID

Input,

Analog

N/A

ID 

pin of the USB cable. For applications 

not using ID this pin can be connected to 
VDD33

. For an A-Device ID is grounded. 

For a B-Device ID is floated.

C2

VBUS

I/O,

Analog

N/A

This pin connects to an external resistor 

(R

VBUS

) connected to the VBUS pin of the 

USB cable. This pin is used for the VBUS 

comparator inputs and for VBUS pulsing 

during session request protocol. See 

Table 5-6, "Required RVBUS Resistor 

Value"

.

C1

VBAT

Power

N/A

Regulator input.

D2

VDD33

Power

N/A

3.3V Regulator Output. A 2.2uF (<1 ohm 

ESR) bypass capacitor to ground is 

required for regulator stability. The bypass 

capacitor should be placed as close as 

possible to the USB332x.

D1

DM

I/O,

Analog

N/A

D- pin of the USB cable.

A

E

D

C

B

1

5

4

3

2

TOP VIEW

RESETB

ID

VBUS

VBAT

VDD33

DM

DP

SPK_R

SPK_L

DATA[7]

DATA[4]

DATA[6]

DATA[5]

CLKOUT

DATA[3]

DATA[2]

DATA[1]

DATA[0]

NXT

DIR

STP

VDD18

REFCLK

RBIAS

GND

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USB332x

E1

DP

I/O,

Analog

N/A

D+ pin of the USB cable.

E2

SPK_R

I/O,

Analog

N/A

USB switch in/out for DP signals

E3

SPK_L

I/O,

Analog

N/A

USB switch in/out for DM signals

D3

DATA[7]

I/O,

CMOS

N/A

ULPI bi-directional data bus. DATA[7] is 

the MSB.

E4

DATA[6]

I/O,

CMOS

N/A

ULPI bi-directional data bus.

E5

DATA[5]

I/O,

CMOS

N/A

ULPI bi-directional data bus.

D4

DATA[4]

I/O,

CMOS

N/A

ULPI bi-directional data bus.

A5

CLKOUT

Output,

CMOS

N/A

ULPI Clock Out Mode:

60MHz ULPI clock output. All ULPI signals 

are driven synchronous to the rising edge 

of this clock. 
ULPI Clock In Mode:

This pin is connected to VDD18 to 

configure 60MHz ULPI Clock IN mode as 

described in 

Section 5.4.1

.

D5

DATA[3]

I/O,

CMOS

N/A

ULPI bi-directional data bus.

C4

DATA[2]

I/O,

CMOS

N/A

ULPI bi-directional data bus.

C5

DATA[1]

I/O,

CMOS

N/A

ULPI bi-directional data bus.

B4

DATA[0]

I/O,

CMOS

N/A

ULPI bi-directional data bus. DATA[0] is 

the LSB.

B5

NXT

Output,

CMOS

High

The PHY asserts NXT to throttle the data. 

When the Link is sending data to the PHY, 
NXT

 indicates when the current byte has 

been accepted by the PHY. The Link 

places the next byte on the data bus in the 

following clock cycle.

A4

DIR

Output,

CMOS

N/A

Controls the direction of the data bus. 

When the PHY has data to transfer to the 

Link, it drives DIR high to take ownership 

of the bus. When the PHY has no data to 

transfer it drives DIR low and monitors the 

bus for commands from the Link.

A3

STP

Input,

CMOS

High

The Link asserts STP for one clock cycle 

to stop the data stream currently on the 

bus. If the Link is sending data to the PHY, 
STP

 indicates the last byte of data was on 

the bus in the previous cycle.

B3

VDD18

Power

N/A

External 1.8V Supply input pin. This pad 

needs to be bypassed with a 0.1uF 

capacitor to ground, placed as close as 

possible to the USB332x.

TABLE 2-1:

USB332X PIN DESCRIPTION (CONTINUED) 

Ball

Name

Direction/

Type

Active 

Level

Description

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USB332x

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 2008 - 2015 Microchip Technology Inc.

B2

RESETB

Input,

CMOS,

Low

When low, the part is suspended with all 

ULPI outputs tri-stated. When high, the 

USB332x will operate as a normal ULPI 

device, as described in 

Section 5.5.2

. The 

state of this pin may be changed 

asynchronously to the clock signals. When 

asserted for a minimum of 1 microsecond 

and then de-asserted, the ULPI registers 

are reset to their default state and all 

internal state machines are reset.

A2

REFCLK

Input,

CMOS

N/A

ULPI Clock Out Mode:

Model-specific reference clock.

See 

Product Identification System on page 

68

ULPI Clock In Mode:

60MHz ULPI clock input.

A1

RBIAS

Analog,

CMOS

N/A

Bias Resistor pin. This pin requires an 

8.06kΩ (±1%) resistor to ground, placed as 

close as possible to the USB332x. 

Nominal voltage during ULPI operation is 

0.8V.

C3

GND

Ground

N/A

Ground. 

TABLE 2-1:

USB332X PIN DESCRIPTION (CONTINUED) 

Ball

Name

Direction/

Type

Active 

Level

Description

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DS00001902A-page 9

USB332x

3.0

LIMITING VALUES

3.1

Absolute Maximum Ratings

3.2

Recommended Operating Conditions

TABLE 3-1:

ABSOLUTE MAXIMUM RATINGS

Parameter

Symbol

Conditions

MIN

TYP MAX  Units

VBUS

VBATIDDPDM

SPK_L

, and SPK_R 

voltage to GND

V

MAX_5V

Voltage measured at pin. 
VBUS

 tolerant to 30V with 

external R

VBUS

.

-0.5

+6.0

V

Maximum VDD18 voltage 

to Ground

V

MAX_18V

-0.5

2.5

V

Maximum VDD33 voltage 

to Ground

V

MAX_33V

-0.5

4.0

V

Maximum I/O voltage to 

Ground

V

MAX_IN

-0.5

V

DD18

 + 0.7

V

Operating Temperature

T

MAX_OP

-40

85

C

Storage Temperature

T

MAX_STG

-55

150

C

Note:

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the
device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

TABLE 3-2:

RECOMMENDED OPERATING CONDITIONS

Parameter

Symbol

Conditions

MIN

TYP MAX 

Units

VBAT

 to GND

V

VBAT

3.1

5.5

V

VDD33

 to GND

V

DD33

3.0

3.3

3.6

V

VDD18 

to GND

V

DD18

1.6

1.8

2.0

V

Input Voltage on Digital 

Pins (RESETBSTPDIR
NXT

DATA[7:0])

V

I

0.0

V

DD18

V

Voltage on Analog I/O 

Pins (DPDMIDSPK_L
SPK_R

)

V

I(I/O)

0.0

V

DD33

V

VBUS

 to GND

V

VMAX

0.0

5.5

Ambient Temperature

T

A

-40

85

C

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4.0

ELECTRICAL CHARACTERISTICS

The following conditions are assumed unless otherwise specified:
V

VBAT

 = 3.1 to 5.5V; V

DD18

 = 1.6 to 2.0V; V

SS

 = 0V; T

A

 = -40C to +85C

The current for 3.3V circuits is sourced at the VBAT pin, except when using an external 3.3V supply as shown in

Figure 5-6

.

4.1

Operating Current

Note 4-1

ClockSuspendM

 bit = 0.

Note 4-2

SessEnd, VbusVld, and IdFloat comparators disabled. STP Interface protection disabled.

TABLE 4-1:

OPERATING CURRENT

Parameter

Symbol

Conditions

MIN

TYP MAX Units

Synchronous Mode Current

(Default Configuration)

I

33AVG(SYNC)

Start-up sequence defined in 

Section 5.5.4

 has 

completed.

5

5.7

5.9

mA

I

18AVG(SYNC)

19

22.6

27.5

mA

Synchronous Mode Current

(HS USB operation)

I

33AVG(HS)

Active USB Transfer

10

11.5

13.5

mA

I

18AVG(HS)

28

33.6

37

mA

Synchronous Mode Current

(FS/LS USB operation) 

I

33AVG(FS)

Active USB Transfer

10

10.5

11.3

mA

I

18AVG(FS)

23

27.2

29.4

mA

Serial Mode Current

(FS/LS USB)

Note 4-1

I

33AVG(FS_S)

5

5.7

5.9

mA

I

18AVG(FS_S)

2

2.9

3.9

mA

USB UART Current

Note 4-1

I

33AVG(UART)

5

5.7

5.9

mA

I

18AVG(UART)

2

2.9

3.9

mA

USB Audio Mode

I

33AVG(AUDIO)

V

VBAT

 = 4.2V

V

DD18

 = 1.8V

17

22

32.3

uA

I

18AVG(AUDIO)

30

36.3

60

uA

Low Power Mode

Note 4-2

I

DD33(LPM)

V

VBAT

 = 4.2V

V

DD18

 = 1.8V

17

22.1

34

uA

I

DD18(LPM)

1.2

32

uA

Standby Mode

I

DD33(RSTB)

RESETB = 0

V

VBAT

 = 4.2V

V

DD18

 = 1.8V

17

20.8

34

uA

I

DD18(RSTB)

0.9

32

uA

Maker
Microchip Technology Inc.
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