18-Bit ADC with I2C Interface and Onboard Reference DS

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 2016 Microchip Technology Inc.

DS20005516A-page 1

2N6661

Features

• Free from secondary breakdown
• Low power drive requirement
• Ease of paralleling
• Low C

ISS

 and fast switching speeds

• Excellent thermal stability
• Integral source-drain diode
• High input impedance and high gain

Applications

• Motor controls
• Converters
• Amplifiers
• Switches
• Power supply circuits
• Drivers: relays, hammers, solenoids, lamps, 

memories, displays, bipolar transistors, etc.

Description

2N6661 is an enhancement-mode (normally-off) tran-
sistor that utilizes a vertical DMOS structure and a well-
proven silicon-gate manufacturing process. This com-
bination produces a device with the power-handling
capabilities of bipolar transistors, and the high input
impedance and positive temperature coefficient inher-
ent in MOS devices. Characteristic of all MOS struc-
tures, this device is free from thermal runaway and
thermally-induced secondary breakdown.

Vertical DMOS FETs are ideally suited to a wide range
of switching and amplifying applications where very-
low threshold voltage, high breakdown voltage, high-
input impedance, low-input capacitance, and fast
switching speeds are desired.

Package Types

TO-39

See 

Table 2-1

 for pin information

Case: Drain

GATE

SOURCE

DRAIN

N-Channel, Enhancement-Mode, Vertical DMOS FET

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2N6661

DS20005516A-page 2

 2016 Microchip Technology Inc.

1.0

 ELECTRICAL CHARACTERISTICS

ABSOLUTE MAXIMUM RATINGS

 

Drain-to-source voltage .........................................................................................................................................BV

DSS

Drain-to-gate voltage.............................................................................................................................................BV

DGS

Gate-to-source voltage............................................................................................................................................ ±20V
Operating and Storage Temperature.......................................................................................................... -55 to 150 °C

Note 1: All DC parameters are 100% tested at 25°C unless otherwise stated. Pulse test: 300 µs pulse, 2% duty cycle. 

2: Specification is obtained by characterization and is not 100% tested.

† Notice: Stresses above those listed under “Maximum Ratings” may cause permanent damage to the device. This is 
a stress rating only and functional operation of the device at those or any other conditions above those indicated in the 
operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods 
may affect device reliability.

ELECTRICAL CHARACTERISTICS

Electrical Specifications: Unless otherwise specified, for all specifications T

A

 = +25°C

Parameter

Symbol

Min

Typ

Max

Units Conditions

DC Parameters (

Note 1

unless otherwise stated)

Drain-to-source breakdown voltage

BV

DSS

90

-

-

V

V

GS

= 0V, I

D

= 10µA

Gate threshold voltage

V

GS(th)

0.8

-

2.0

V

V

GS

= V

DS

, I

D

= 1.0mA

V

GS(th)

 change with temperature

∆V

GS(th)

-

-3.8

-5.5

mV/°C V

GS

= V

DS

, I

D

= 1.0mA (

Note 2

)

Gate body leakage current

I

GSS

-

-

100

nA

V

GS

= ±20V, V

DS

= 0V

Zero gate voltage drain current

I

DSS

-

-

10

µA

V

GS

= 0V, V

DS

= Max rating

-

-

500

V

DS

= 0.8 Max Rating,

V

GS

= 0V, T

A

= 125°C (

Note 2

)

On-state drain current

I

D(ON)

1.5

-

-

A

V

GS

= 10V, V

DS

= 10V

Static drain-to-source on-state
resistance

R

DS(ON)

-

-

5.0

V

GS

= 5.0V, I

D

= 0.3A

-

-

4.0

V

GS

= 10V, I

D

= 1.0A

AC Parameters (

Note 2

)

Forward transconductance

G

FS

170

-

-

mmho V

DS

= 25V, I

D

= 0.5A

Input capacitance

C

ISS

-

-

50

pF

V

GS

= 0V,

V

DS

= 24V,

f = 1.0MHz

Common source output capacitance

C

OSS

-

-

40

Reverse transfer capacitance

C

RSS

-

-

10

Turn-on time

t

(ON)

-

-

10

ns

V

DD

= 25V, I

D

= 1.0A,

R

GEN

= 25Ω

Turn-off time

t

(OFF)

-

-

10

Diode Parameters 
Diode forward voltage drop

V

SD

-

1.2

-

V

V

GS

= 0V, I

SD

= 1.0A (

Note 1

)

Reverse recovery time

t

rr

-

350

-

ns

V

GS

= 0V, I

SD

= 1.0A (

Note 2

)

TEMPERATURE SPECIFICATIONS

Parameter

Symbol

Min

Typ

Max

Units Conditions

Temperature Ranges
Operating and Storage Temperature

T

A

-55

150

°C

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 2016 Microchip Technology Inc.

DS20005516A-page 3

2N6661

Note 1: I

D

 (continuous) is limited by max rated T

J

2.0

 

PIN DESCRIPTION

The locations of the pins are listed in 

Package Types

and 

Packaging Information

.

THERMAL CHARACTERISTICS

Package

 I

D

(

1

)

continuous

(mA)

 I

D

pulsed

(A)

Power 

Dissipation

@T

A

 = 25°C (W)

I

DR

(

1

)

(mA)

I

DRM

(A)

TO-39 350

3.0

6.25

350

3.0

Product Summary

BV

DSX

/BV

DGS

(V)

R

DS(ON)

(max) (Ω)

I

DSS

(min) (A)

90

4.0

1.5

TABLE 2-1:

PIN DESCRIPTION

Pin # TO-39

Function

1

SOURCE

2

GATE

3

DRAIN

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2N6661

DS20005516A-page 4

 2016 Microchip Technology Inc.

3.0

FUNCTIONAL DESCRIPTION

Figure 3-1

 shows the switching waveform and test cir-

cuit for 2N6661. 

 

FIGURE 3-1:

Switching Waveforms and Test Circuit

 

90%

10%

90%

90%

10%

10%

Pulse

Generator

VDD

R

L

OUTPUT

D.U.T.

t

(ON)

t

d(ON)

t

(OFF)

t

d(OFF)

t

r

INPUT

INPUT

OUTPUT

10V

VDD

R

GEN

0V

0V

t

f

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 2016 Microchip Technology Inc.

DS20005516A-page 5

2N6661

4.0

PACKAGING INFORMATION

4.1

Package Marking Information

Legend: XX...X

Product Code or Customer-specific information

Y

Year code (last digit of calendar year)

YY

Year code (last 2 digits of calendar year)

WW

Week code (week of January 1 is week ‘01’)

NNN

Alphanumeric traceability code

  

Pb-free JEDEC

®

 designator for Matte Tin (Sn)

*

This package is Pb-free. The Pb-free JEDEC designator (     )
can be found on the outer packaging for this package.

Note:

In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for product code or customer-specific information. Package may or
not include the corporate logo.

3

e

3

e

3-Lead TO-39

Example

NNN

YYWW

XXXXXXXXXX

XX

e4

343

1605

2N6661

e4

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2N6661

DS20005516A-page 6

 2016 Microchip Technology Inc.

Note: For the most current package drawings, see the Microchip Packaging Specification at www.microchip.com/packaging.

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 2016 Microchip Technology Inc.

DS20005516A-page 7

2N6661

APPENDIX A: REVISION HISTORY

Revision A (March 2016)

• Converted Supertex Doc #DSFP-2N6661 to 

Microchip DS20005516A.

• Minor text changes throughout.
• Update to 

Features

.

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2N6661

DS20005516A-page 8

 2016 Microchip Technology Inc.

PRODUCT IDENTIFICATION SYSTEM

To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office

.

   

Device:

2N6661 = N-Channel, Enhancement-Mode, 

Vertical DMOS FET

Package:

(blank) = TO-39, 3-lead

Environmental

(blank) =  Lead (Pb)-free/ROHS-compliant package

Media Type:

(blank) = 500/Bag for TO-39 packages

Examples:

a)

2N6661

TO-39 package, 
500/bag

PART NO.

X

Device

X

Environmental

XX

Package

Options

Media

-

-

Type

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 2016 Microchip Technology Inc.

DS20005516A-page 9

Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE.  Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights unless otherwise stated.

Trademarks

The Microchip name and logo, the Microchip logo, AnyRate, 
dsPIC, FlashFlex, flexPWR, Heldo, JukeBlox, KeeLoq, 
KeeLoq logo, Kleer, LANCheck, LINK MD, MediaLB, MOST, 
MOST logo, MPLAB, OptoLyzer, PIC, PICSTART, PIC32 logo, 
RightTouch, SpyNIC, SST, SST Logo, SuperFlash and UNI/O 
are registered trademarks of Microchip Technology 
Incorporated in the U.S.A. and other countries.

ClockWorks, The Embedded Control Solutions Company, 
ETHERSYNCH, Hyper Speed Control, HyperLight Load, 
IntelliMOS, mTouch, Precision Edge, and QUIET-WIRE are 
registered trademarks of Microchip Technology Incorporated 
in the U.S.A.

Analog-for-the-Digital Age, Any Capacitor, AnyIn, AnyOut, 
BodyCom, chipKIT, chipKIT logo, CodeGuard, dsPICDEM, 
dsPICDEM.net, Dynamic Average Matching, DAM, ECAN, 
EtherGREEN, In-Circuit Serial Programming, ICSP, Inter-Chip 
Connectivity, JitterBlocker, KleerNet, KleerNet logo, MiWi, 
motorBench, MPASM, MPF, MPLAB Certified logo, MPLIB, 
MPLINK, MultiTRAK, NetDetach, Omniscient Code 
Generation, PICDEM, PICDEM.net, PICkit, PICtail, 
PureSilicon, RightTouch logo, REAL ICE, Ripple Blocker, 
Serial Quad I/O, SQI, SuperSwitcher, SuperSwitcher II, Total 
Endurance, TSHARC, USBCheck, VariSense, ViewSpan, 
WiperLock, Wireless DNA, and ZENA are trademarks of 
Microchip Technology Incorporated in the U.S.A. and other 
countries.

SQTP is a service mark of Microchip Technology Incorporated 
in the U.S.A.

Silicon Storage Technology is a registered trademark of 
Microchip Technology Inc. in other countries.

GestIC is a registered trademarks of Microchip Technology 
Germany II GmbH & Co. KG, a subsidiary of Microchip 
Technology Inc., in other countries. 

All other trademarks mentioned herein are property of their 
respective companies.

© 2016, Microchip Technology Incorporated, Printed in the 
U.S.A., All Rights Reserved. 

ISBN: 978-1-5224-0432-3

Note the following details of the code protection feature on Microchip devices:

Microchip products meet the specification contained in their particular Microchip Data Sheet.

Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the 
intended manner and under normal conditions.

There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our 
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data 
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.

Microchip is willing to work with the customer who is concerned about the integrity of their code.

Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not 
mean that we are guaranteeing the product as “unbreakable.”

Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.

Microchip received ISO/TS-16949:2009 certification for its worldwide 

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are for its PIC

®

 

MCUs and dsPIC

®

 DSCs, K

EE

L

OQ

®

 

code hopping 

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QUALITY MANAGEMENT SYSTEM

CERTIFIED BY DNV

== 

ISO/TS 16949

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DS20005516A-page 10

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