DM74LS377 Octal D-Type Flip-Flop with Common Enable and Clock Datasheet

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© 2000 Fairchild Semiconductor Corporation

DS009831

www.fairchildsemi.com

October 1988

Revised March 2000

DM74LS377

 Octa

l D-T

ype Fli

p

-Fl
op w

it

h

 Comm

on Enabl

and Clo

c

k

DM74LS377
Octal D-Type Flip-Flop with Common Enable and Clock

General Description

The DM74LS377 is an 8-bit register built using advanced
low power Schottky technology. This register consists of
eight D-type flip-flops with a buffered common clock and a
buffered common input enable. The device is packaged in
the space-saving (0.3 inch row spacing) 20-pin package.

Features

8-bit high speed parallel registers

Positive edge-triggered D-type flip-flops

Fully buffered common clock and enable inputs

 

Ordering Code:

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Logic Symbol

V

CC

 

=

 Pin 20

GND 

=

 Pin 10

Pin Descriptions

Connection Diagram

Truth Table

=

 HIGH Voltage Level

=

 LOW Voltage Level

=

 Immaterial

Order Number

Package Number

Package Description

DM74LS377WM

M20B

20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide

DM74LS377N

N20A

20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

Pin Names

Description

E

Enable Input (Active LOW)

D0–D7

Data Inputs

CP

Clock Pulse Input (Active Rising Edge)

Q0–Q7

Flip-Flop Outputs

Inputs

Output

E

CP

D

n

Q

n

H

X

X

No Change

L

H

H

L

L

L

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2

DM74LS377

Functional Description

The DM74LS377 consists of eight edge-triggered D flip-flops with individual D inputs and Q outputs. The Clock (CP) and
Enable input (E) are common to all flip-flops.

When E is LOW, new data is entered into the register on the next LOW-to-HIGH transition of CP. When E is HIGH, the reg-
ister will retain the present data independent of the CP.

Logic Diagram

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DM74LS377

Absolute Maximum Ratings

(Note 1)

Note 1: The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.

Recommended Operating Conditions

Electrical Characteristics 

over recommended operating free air temperature range (unless otherwise noted)

Note 2: All typicals are at V

CC

 

=

 5V, T

A

 

=

 25

°

C.

Note 3: Not more than one output should be shorted at a time, and the duration should not exceed one second.

Switching Characteristics 

V

CC

 

=

 

+

5.0V, T

A

 

=

 

+

25

°

Supply Voltage

7V

Input Voltage

7V

Operating Free Air Temperature Range

0

°

C to 

+

70

°

C

Storage Temperature Range

65

°

C to 

+

150

°

C

Symbol

Parameter

Min

Nom

Max

Units

V

CC

Supply Voltage

4.75

5

5.25

V

V

IH

HIGH Level Input Voltage

2

V

V

IL

LOW Level Input Voltage

0.8

V

I

OH

HIGH Level Output Current

0.4

mA

I

OL

LOW Level Output Current

8

mA

T

A

Free Air Operating Temperature

0

70

°

C

t

S

 (H)

Setup Time HIGH or LOW

10

ns

t

S

 (L)

D

n

 to CP

10

t

H

 (H)

Hold Time HIGH or LOW

5.0

ns

t

H

 (L)

D

n

 to CP

5.0

t

S

 (H)

Setup Time HIGH or LOW

10

ns

t

S

 (L)

E to CP

20

t

H

 (H)

Hold Time HIGH or LOW

5.0

ns

t

H

 (L)

E to CP

5.0

t

W

 (H)

CP Pulse Width HIGH or LOW

20

ns

t

W

 (L)

20

Symbol

Parameter

Conditions

Min

Typ

Max

Units

(Note 2)

V

I

Input Clamp Voltage

V

CC

 

=

 Min, I

I

 

=

 

18 mA

1.5

V

V

OH

HIGH Level 

V

CC

 

=

 Min, I

OH

 

=

 Max

2.7

3.4

V

Output Voltage

V

IL

 

=

 Max

V

OL

LOW 

Level V

CC

 

=

 Min, I

OL

 

=

 Max

0.35

0.5

Output Voltage

V

IH

 

=

 Min

V

I

OL

 

=

 4 mA, V

CC

 

=

 Min

0.25

0.4

I

I

Input Current @ Max

V

CC

 

=

 Max, V

I

 

=

 7V

0.1

mA

Input Voltage

V

I

 

=

 10V

I

IH

HIGH Level Input Current

V

CC

 

=

 Max, V

I

 

=

 2.7V

20.0

µ

A

I

IL

LOW Level Input Current

V

CC

 

=

 Max, V

I

 

=

 0.4V

0.4

mA

I

OS

Short Circuit Output Current

V

CC

 

=

 Max (Note 3)

20

100

mA

I

CC

Supply Current

V

CC

 

=

 Max

28

mA

Symbol

Parameter

R

L

 

=

 2 k

, C

L

 

=

 15 pF

Units

Min

Max

f

MAX

Maximum Clock Frequency

30

MHz

t

PLH

Propagation Delay

25

ns

t

PHL

CP to Q

n

25

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DM74LS377

Physical Dimensions 

inches (millimeters) unless otherwise noted

20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide

Package Number M20B

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DM74LS377

 Octa

l D-T

ype Fli

p

-Fl
op w

it

h

 Comm

on Enabl

and Clo

c

k

Physical Dimensions 

inches (millimeters) unless otherwise noted (Continued)

20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

Package Number N20A

Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or systems

which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.

2. A critical component in any component of a life support

device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.

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Maker
Fairchild
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